CN101471269A - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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Publication number
CN101471269A
CN101471269A CNA2008101892195A CN200810189219A CN101471269A CN 101471269 A CN101471269 A CN 101471269A CN A2008101892195 A CNA2008101892195 A CN A2008101892195A CN 200810189219 A CN200810189219 A CN 200810189219A CN 101471269 A CN101471269 A CN 101471269A
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China
Prior art keywords
semiconductor device
metal layer
layer
wiring pattern
connection terminal
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CNA2008101892195A
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English (en)
Chinese (zh)
Inventor
山野孝治
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Shinko Electric Industries Co Ltd
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication of CN101471269A publication Critical patent/CN101471269A/zh
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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNA2008101892195A 2007-12-27 2008-12-26 半导体器件的制造方法 Pending CN101471269A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007335688 2007-12-27
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