CN101369546A - 制造半导体器件的方法 - Google Patents

制造半导体器件的方法 Download PDF

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Publication number
CN101369546A
CN101369546A CNA2008101459885A CN200810145988A CN101369546A CN 101369546 A CN101369546 A CN 101369546A CN A2008101459885 A CNA2008101459885 A CN A2008101459885A CN 200810145988 A CN200810145988 A CN 200810145988A CN 101369546 A CN101369546 A CN 101369546A
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CN
China
Prior art keywords
wiring pattern
internal connection
splicing ear
metal level
connection terminal
Prior art date
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Pending
Application number
CNA2008101459885A
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English (en)
Chinese (zh)
Inventor
风间拓也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication date
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Publication of CN101369546A publication Critical patent/CN101369546A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
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    • H01L24/10Bump connectors ; Manufacturing methods related thereto
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    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNA2008101459885A 2007-08-17 2008-08-15 制造半导体器件的方法 Pending CN101369546A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007212949 2007-08-17
JP2007212949A JP5048420B2 (ja) 2007-08-17 2007-08-17 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
CN101369546A true CN101369546A (zh) 2009-02-18

Family

ID=39766905

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CNA2008101459885A Pending CN101369546A (zh) 2007-08-17 2008-08-15 制造半导体器件的方法

Country Status (5)

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US (2) US7719123B2 (enExample)
EP (1) EP2026380A3 (enExample)
JP (1) JP5048420B2 (enExample)
KR (1) KR20090018576A (enExample)
CN (1) CN101369546A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010103300A (ja) * 2008-10-23 2010-05-06 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US7956471B2 (en) 2008-11-12 2011-06-07 Freescale Semiconductor, Inc. Mold and substrate for use with mold
JP5383460B2 (ja) * 2009-12-04 2014-01-08 新光電気工業株式会社 半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5412539A (en) * 1993-10-18 1995-05-02 Hughes Aircraft Company Multichip module with a mandrel-produced interconnecting decal
JP3502776B2 (ja) * 1998-11-26 2004-03-02 新光電気工業株式会社 バンプ付き金属箔及び回路基板及びこれを用いた半導体装置
JP4707283B2 (ja) * 2001-08-30 2011-06-22 イビデン株式会社 半導体チップ
JP3717899B2 (ja) * 2002-04-01 2005-11-16 Necエレクトロニクス株式会社 半導体装置及びその製造方法
JP3614828B2 (ja) * 2002-04-05 2005-01-26 沖電気工業株式会社 チップサイズパッケージの製造方法
JP2004193497A (ja) * 2002-12-13 2004-07-08 Nec Electronics Corp チップサイズパッケージおよびその製造方法
JP2008108849A (ja) * 2006-10-24 2008-05-08 Shinko Electric Ind Co Ltd 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
KR20090018576A (ko) 2009-02-20
EP2026380A2 (en) 2009-02-18
US8148254B2 (en) 2012-04-03
US20090045529A1 (en) 2009-02-19
US20100184257A1 (en) 2010-07-22
JP5048420B2 (ja) 2012-10-17
US7719123B2 (en) 2010-05-18
JP2009049134A (ja) 2009-03-05
EP2026380A3 (en) 2009-11-18

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