CN101360397A - 镂空电路板的制作方法 - Google Patents

镂空电路板的制作方法 Download PDF

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CN101360397A
CN101360397A CN200710075609.5A CN200710075609A CN101360397A CN 101360397 A CN101360397 A CN 101360397A CN 200710075609 A CN200710075609 A CN 200710075609A CN 101360397 A CN101360397 A CN 101360397A
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copper foil
hollowed
opening
manufacture method
insulating substrate
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CN101360397B (zh
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黄晓君
吴孟鸿
林承贤
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Peng Ding Polytron Technologies Inc
Avary Holding Shenzhen Co Ltd
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Honsentech Co Ltd
Fukui Precision Component Shenzhen Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0397—Tab
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/281—Applying non-metallic protective coatings by means of a preformed insulating foil
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128—Assembling formed circuit to base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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Abstract

本发明涉及一种镂空电路板的制作方法，包括以下步骤：提供一铜箔，所述铜箔包括相对的第一表面与第二表面；在所述铜箔的第一表面上压合一层预先形成有第一开口的第一绝缘基材；在所述第一绝缘基材的第一开口处形成保护层以充分覆盖从所述第一开口露出的铜箔；在所述铜箔中制作线路；去除第一开口处的保护层；在铜箔的第二表面上压合一层预先形成有第二开口的第二绝缘基材，并使第一开口与第二开口相互对应。所述的镂空电路板的制作方法可避免蚀刻液进入铜箔靠近绝缘基材一侧的表面上而造成线路的侧蚀或过蚀。

Description

镂空电路板的制作方法
技术领域
本发明涉及一种印刷电路板的制作方法，尤其涉及一种镂空电路板的制作方法。
背景技术
电路板(Flexible Printed Circuit Board，FPCB)以其优异的抗挠曲性能广泛应用于各种工作时部件之间存在相对运动的电子产品例如显示器、折叠式手机、打印头、硬盘读取头中以提供电力/信号传输。
电路板通常包括绝缘基材及形成在绝缘基材上的导电线路。导电线路通常由铜制成。绝缘基材最常采用的材料为聚酰亚胺，但最近开始出现采用复合材料作为绝缘基材以提高电路板的性能，请参见Bong Sup Kim et al.，Polyimide/Carbon Nanotubes Composite Films：A Potential for FPCB，2006.ICONN′06.International Conference on Nanoscience and Nanotechnology。
镂空电路板，通常又称为浮雕板，是指部分区域的导电线路两侧的绝缘层被挖空，从而线路在两边悬空的电路板。镂空区域的导电线路可实现双面电连接。镂空电路板通常从铜箔开始制造，具体过程如下：首先在铜箔第一表面上压合一层预先形成有第一开口的绝缘基材；然后在铜箔中制作线路，制作完成线路之后再在铜箔第二表面上压合一层预先形成有第二开口的绝缘基材，第一开口与第二开口位置相互对应，从而在导电线路上定义出一镂空区，也就是说，形成一镂空电路板。
在铜箔中制作线路时第一开口处的铜箔的第一表面上需要贴保护膜予以保护。保护膜通常采用干膜，但第一开口处绝缘基材与铜箔之间存在高度差，保护膜不能充分的贴合在铜箔的第一表面，在第一开口的边界处会产生一空隙，在进行线路的制作时，蚀刻药水会进入此空隙，从而造成铜箔背面处的线路发生侧蚀以及过蚀的情形。
因此，有必要提供一种可避免在制作线路时蚀刻药水从铜箔的第一表面对线路造成侧蚀及过蚀的镂空电路板制作方法。
发明内容
以下以实施例说明一种可避免在制作线路时蚀刻药水对铜箔靠近基材一侧的表面造成侧蚀及过蚀的镂空电路板制作方法。
一种镂空电路板的制作方法，其包括以下步骤：提供一铜箔，所述铜箔包括相对的第一表面与第二表面；在所述铜箔的第一表面上压合一层预先形成有第一开口的第一绝缘基材；在所述第一绝缘基材的第一开口处形成保护层以充分覆盖从所述第一开口露出的铜箔；在所述铜箔中制作线路；去除第一开口处的保护层；在铜箔的第二表面上压合一层预先形成有第二开口的第二绝缘基材，并使第一开口与第二开口相互对应。
所述的镂空电路板的制作方法中，在铜箔中制作线路之前在绝缘基材开口处形成涂层。在铜箔中制作线路时涂层紧密贴合在铜箔上，从而避免蚀刻液进入铜箔靠近绝缘基材一侧的表面上而造成线路的侧蚀或过蚀。
附图说明
图1是本技术方案提供的镂空电路板制作方法流程图。
图2是本技术方案提供的镂空电路板制作方法采用的铜箔示意图。
图3是本技术方案提供的镂空电路板制作方法采用的第一绝缘基材示意图。
图4是本技术方案提供的镂空电路板制作方法铜箔与第一绝缘基材贴合后的示意图。
图5是本技术方案提供的镂空电路板制作方法印刷涂层的示意图。
图6是本技术方案提供的镂空电路板制作方法涂层形成后的示意图。
图7是本技术方案提供的镂空电路板制作方法得到的镂空电路板结构示意图。
具体实施方式
参阅图1，本技术方案提供的镂空电路板制作方法包括以下步骤：
步骤1，参阅图2，提供一铜箔10。铜箔10可为电解铜箔，也可为压延铜箔。铜箔10包括相对的第一表面102与第二表面104。优选的，可采用酸性清洗液对铜箔10进行处理，以除去铜箔第一表面102与第二表面104上的脏污，并增加铜箔第一表面102与第二表面104的粗糙度。
步骤2，将预先形成有第一开口122的第一绝缘基材12压合在铜箔10的第一表面102上。
参阅图3，第一绝缘基材12上具有两个第一开口122。当然第一绝缘基材12上根据需求还可开设一个或多个第一开口。第一绝缘基材12可为柔性基材如聚酰亚胺(Polyimide，PI)、聚乙烯对苯二甲酸乙二醇酯(PolyethyleneTerephtalate，PET)、聚四氟乙烯(Teflon)、聚硫胺(Polyamide)、聚甲基丙烯酸甲酯(Polymethylmethacrylate)、聚碳酸酯(Polycarbonate)或聚酰亚胺-聚乙烯-对苯二甲酯共聚物(Polyamide polyethylene-terephthalate copolymer)或者其组合物。第一绝缘基材12还可为硬性基材如玻纤布、环氧树脂等。当采用柔性基材的时候最终可得到镂空柔性电路板，当采用硬性基材时最终可得到硬性镂空电路板。第一开口122可采用冲压、激光切割等方式在第一绝缘基材12上形成。参阅图4，第一绝缘基材12压合于铜箔10后形成电路板基材。步骤1中铜箔10表面粗糙度的增加可提高铜箔10与第一绝缘基材12之间的结合力。
步骤3，参阅图5，在第一绝缘基材12的第一开口122处涂布涂层14。
涂层14成份不限，固化后在后续的线路制作过程中不会因机械作用而脱落，但可用适当的溶剂溶剂剥除。具体的，涂层14可采用各种防焊油墨(SolderResist)或各种液态光阻。防焊油墨通常又称为绿漆、可剥胶等。涂层14充分的覆盖在开口122处的铜箔10的第一表面102上。
本实施例当中，采用丝网印刷的方法在第一绝缘基材12开口122处印刷一层防焊油墨。丝网18为250目的钢丝网，丝网厚度为50微米。印刷时丝网18的离版高度为1mm，采用硬度为80单位的刮刀，刮刀角度20度，刮刀压力0.35兆帕，刮刀速度60毫米/秒。所谓250目指每平方厘米的丝网中具有250个孔，离版高度指丝网离第一绝缘基材12的高度，刮刀角度指刮刀所在平面与第一基材12表面之间的角度。当然涂层14还可采用其他的涂布方式如喷涂、刷涂、浸涂等形成。
步骤4，参见图6，固化涂层14形成保护层16。
固化是为了后续在铜箔10中制作线路时防止涂层14从铜箔10上脱落。本实施当中涂层14采用的是防焊油墨，固化时可采用红外线烤箱进行烘烤，烘烤温度90度到110度，优选100度。烘烤时间为5分钟到30分种。烘烤完之后，防焊油墨固化形成保护层16。
当然如果采用液态光阻形成保护层16，则固化过程稍有不同，如果为液态光阻为正光阻，则经过烘烤步骤即可。如果液态光阻为负光阻，则在烘烤之后须对负光阻进行全部曝光，使光阻中的聚合物分子交联从而在后续制作线路时负光阻不溶于显影液。
步骤5，在铜箔10中制作线路。
制作线路可以采用湿法蚀刻工艺。具体的，首先在铜箔10的第二表面104上施加一层干膜光阻，采用光罩对干膜光阻进行选择性的曝光，使干膜光阻有选择性的固化或分解，然后进行显影，使光阻中聚合物分子链剪断的或者未交联的溶解在显影液中，从而铜箔露出部分铜面。将铜箔放在蚀刻液中进行蚀刻，未被光阻保护的地方就被蚀刻液蚀刻掉，蚀刻完成后将光阻剥除即露出铜线路。当然制作线路时也可采用液态光阻。
步骤6，剥除保护层16。保护层16可与制作线路时铜箔10的第二表面104上的光阻同时去除。一般剥除保护层16或铜箔10的第二表面104上的光阻时可采用强碱性溶液例如氢氧化钠溶液。
步骤7，参阅图7，在铜箔10的第二表面104上压合预先形成有第二开口132的第二绝缘基材13。第二开口132与第一开口122相对应，从而在铜箔10上定义出一镂空区域，铜箔10位于此镂空区域内的线路两边分别从第一开口122与第二开口132露出。
本实施例的镂空电路板的制作方法中，在铜箔10中制作线路之前在第一绝缘基材12的第一开口122处形成保护层16。在铜箔10中制作线路时保护层16紧密贴合于铜箔，从而避免蚀刻液进入铜箔10靠近第一绝缘基材12一侧的第一表面102上而造成线路的侧蚀或过蚀。
另外，本领域技术人员还可在本发明精神内做其它变化。当然，这些依据本发明精神所做的变化，都应包含在本发明所要求保护的范围之内。

Claims (10)

1.一种镂空电路板的制作方法，其包括以下步骤：提供一铜箔，所述铜箔包括相对的第一表面与第二表面；在所述铜箔的第一表面上压合一层预先形成有第一开口的第一绝缘基材；在所述第一绝缘基材的第一开口处形成保护层以充分覆盖从所述第一开口露出的铜箔；在所述铜箔中制作线路；去除第一开口处的保护层；在铜箔的第二表面上压合一层预先形成有第二开口的第二绝缘基材，并使第一开口与第二开口相互对应。
2.如权利要求1所述的镂空电路板的制作方法，其特征在于，涂布一层涂层于所述第一开口处并固化所述涂层以形成保护层。
3.如权利要求2所述的镂空电路板的制作方法，其特征在于，所述涂层为防焊油墨或液态光阻。
4.如权利要求2所述的镂空电路板的制作方法，其特征在于，所述涂层以丝网印刷的方法涂布于所述第一开口处。
5.如权利要求4所述的镂空电路板的制作方法，其特征在于，采用250目的丝网。
6.如权利要求1所述的镂空电路板的制作方法，其特征在于，在铜箔上压合第一绝缘基材或第二绝缘基材之前采用酸性清洗液对铜箔进行表面处理。
7.如权利要求1所述的镂空电路板制作方法，其特征在于，固化所述涂层时采用烘烤。
8.如权利要求7所述的镂空电路板的制作方法，其特征在于，涂层采用负光阻，在烘烤之后对涂层进行曝光处理。
9.如权利要求7所述的镂空电路板的制作方法，其特征在于，烘烤温度为90度到110度。
10.如权利要求1所述的镂空电路板的制作方法，其特征在于，去除保护层时采用强碱性溶液清洗。
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