CN101310379B - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN101310379B
CN101310379B CN2005800520895A CN200580052089A CN101310379B CN 101310379 B CN101310379 B CN 101310379B CN 2005800520895 A CN2005800520895 A CN 2005800520895A CN 200580052089 A CN200580052089 A CN 200580052089A CN 101310379 B CN101310379 B CN 101310379B
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semiconductor element
semiconductor device
terminal
particle
semiconductor
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CN101310379A (zh
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埜本隆司
爱场喜孝
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Fujitsu Semiconductor Ltd
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Fujitsu Semiconductor Ltd
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Abstract

提供一种半导体器件。在粘接带(2)上配置至少一个半导体元件和多个外部连接用端子用导电部件(6)，电连接半导体元件的电极和导电部件(6)。在粘接带(2)上通过密封树脂(12)密封半导体元件和导电部件(6)，从半导体器件剥离粘接带(2)。导电部件(6)是分别形成的颗粒状的导电部件，从密封树脂(12)露出，作为外部连接用端子(安装用端子)发挥功能。即便半导体元件的种类不同，也可以不用专用的部件，而通过变更导电部件(6)的配置来制造不同的半导体装置。

Description

半导体器件
技术领域
本发明涉及半导体器件及其制造方法，特别涉及没有搭载半导体元件的基板(裸片台，die stage)的表面安装型的半导体器件及其制造方法。
背景技术
近年来，随着手机或笔记本个人电脑等便携式电子设备的进一步小型化，也要求构成这些电子设备中的电子电路的半导体器件更小型化。另外，该半导体器件为了减少其安装面积，适合采用所谓的表面安装型封装结构。
这种表面安装型的半导体器件中，没有采用统一的封装形态和外形，即便对于外部连接端子数不满100针(pin)的半导体器件，也提出了各种种类的封装结构及其制造方法。
作为外部连接端子数较少的半导体器件的制造方法，有如下方法：在引线框上搭载多个半导体元件，通过键合引线连接该半导体元件的电极和成为引线框的端子的部分，进行树脂密封后，通过蚀刻等对引线框的端子间进行电分离，通过切片等使封装单片化。这种制造方法中，需要对每种半导体元件分别准备不同图案的引线框，与引线框相关的成本相应地导致半导体器件的价格变高。
因此，提出了如下的半导体器件制造方法：通过蚀刻，对在粘接片上贴附的金属箔进行图案加工、形成端子部后，在该粘接片上搭载半导体元件，通过键合引线把半导体元件的电极电连接到粘接片上由金属箔构成的电极上，用树脂密封半导体元件后再分离粘接片(例如，参照专利文件1)。
根据该方法，由于通过蚀刻对金属箔进行图案加工，蚀刻工序所需时间很多，还需要对每种半导体元件准备蚀刻用的掩模。另外，作为电极为取得足够的厚度，还需要对蚀刻处理后的金属箔进行电镀等处理，相应地成本就变高了。
还提出了不采用专利文件1中蚀刻金属箔形成电极的方式，而在粘接片上贴附预先冲压加工而成的金属箔的方式，此时也必须按每种半导体元件准备冲压用的模具。
另一方面，还提出了如下方法：在形成于金属质的保持基板上的凹部嵌入并固定电极部件和半导体元件，在该保持基板上，用键合引线连接半导体元件的电极和电极部件，进行树脂密封后，再除去保持基板(例如参照专利文件2)。该制造方法中不需要在保持基板上加工电极部件，但为了嵌入并固定电极部件，需要在保持基板上形成有凹部，还是需要按每种半导体元件准备保持基板。
专利文件1：日本特开2004-63615号公报
专利文件2：日本特开平11-3953号公报
发明内容
(发明要解决的问题)
如上所述，在专利文件1及专利文件2的任一制造方法中，如果半导体元件的大小、电极端子的数量和配置不同，就不能使用相同的模具或保持基板。即，需要按搭载的半导体元件的种类来准备模具或保持基板，相应地存在半导体器件的制造成本变高的问题。
本发明正是鉴于上述问题而完成的，其目的在于，提供一种即便搭载的半导体元件的种类不同，也不需使用专门的部件，而可以以相同的制造工序进行制造的半导体器件及其制造方法。
(解决问题的手段)
为了达成上述目的，根据本发明的一个方面，提供一种半导体器件，其特征在于，具有：半导体元件、连接到该半导体元件的电极的多个颗粒状的导电部件、以及密封该半导体元件和该导电部件的密封树脂，该导电部件埋置在该密封树脂中，且该导电部件的表面从该密封树脂露出，作为该半导体元件的外部连接用端子发挥作用。
另外，根据本发明的另一方面，提供一种半导体器件的制造方法，其特征在于，在粘接带上配置至少一个半导体元件和颗粒状的导电部件，连接该半导体元件的电极和该导电部件，在该粘接带上树脂密封该半导体元件和该导电部件，然后，分离该粘接带。
另外，根据本发明的另一方面，提供一种半导体器件的制造方法，其特征在于，在粘接带上配置多个颗粒状的导电部件，在该导电部件上连接半导体元件的电极，在该粘接带上树脂密封该半导体元件和该导电部件，然后，分离该粘接带。
(发明效果)
根据本发明，可以不用引线框，而通过在成为基材的粘接带上贴附半导体元件以及成为外部连接用端子(安装用端子)的颗粒状的导电部件，而在该半导体元件的电极和颗粒状的导电部件之间能够电连接，之后利用密封树脂等进行密封，来形成半导体器件。因此，不需要对每种半导体元件必须准备的引线框等构成部件，用一个制造工序就可以对应不同种类的半导体元件。即，仅变更颗粒状的导电部件的配置，就可以制造外部连接用端子(安装用端子)的位置不同的半导体器件。由此，可以削减半导体器件的制造成本。
另外，由于不使用引线框，可以减少半导体器件的厚度(高度)，能够提供更薄型的半导体器件
而且，成为外部连接用端子(安装用端子)的颗粒状导电部件，处于埋入密封树脂内的状态，导电部件不从密封树脂突出，也可以减少半导体器件的厚度(高度)。
附图说明
图1是表示根据本发明的第1实施例的半导体器件的制造工序中的状态的图。
图2是表示根据本发明的第1实施例的半导体器件的制造工序的一部分的图。
图3是表示根据本发明的第1实施例的半导体器件的制造工序的一部分的图。
图4是表示根据本发明的第1实施例的半导体器件的制造工序的一部分的图。
图5是残留有定位用颗粒的半导体器件的剖面图。
图6是表示使用了具有两列排列的电极的半导体元件时的半导体器件的剖面图。
图7是表示在半导体元件下配置了散热板时的半导体器件的剖面图。
图8是表示在半导体元件下设置了散热用颗粒的半导体器件的剖面图。
图9是表示在半导体元件上层积半导体元件而成为一个半导体器件的例子的剖面图。
图10是表示在图9所示的半导体器件中，设置了厚度较大的颗粒的情况的剖面图。
图11是表示平面地排列两个半导体元件而成为一个半导体器件的例子的剖面图。
图12是表示图11中所示的半导体器件的制造工序中的状态的立体图。
图13是表示平面地排列两个半导体元件成为一个半导体器件而在其之间配置了中继用的半导体元件的例子的剖面图。
图14是表示图13中所示的半导体器件的制造工序中的状态的立体图。
图15是表示包含连接在半导体元件的电源端子间的电容器的半导体器件的制造工序中的状态的图。
图16是根据本发明的第2实施例的半导体器件的剖面图。
图17是表示在图16所示的半导体器件上安装了散热板30的状态的剖面图。
图18是表示在图16所示的半导体器件中，在密封树脂中埋入了散热板的状态的剖面图。
(附图标记说明)
2粘接带；4、4A、4B、4C、4D半导体元件；6端子用颗粒；8定位用颗粒；10、10A、10B键合引线；12密封树脂；14、30、32散热板；16粘接剂；20IN侧的卷轴；22剥离辊；24OUT侧的卷轴；28电容器；100半导体器件。
具体实施方式
下面，参照附图说明根据本发明的第1实施例的半导体器件及其制造方法。在根据本发明的第1实施例的半导体器件的制造工序中，示出了在粘接带上搭载了半导体元件的状态。
即，根据本发明的第1实施例的半导体器件的制造方法中，如图1所示，使用粘接带2作为支持部件，在其一个主面上以面朝上的方式(电路形成面向上的状态)搭载半导体元件4。并且，在所述半导体元件4的周围配置成为半导体器件的外部连接用端子(安装用端子)的端子用颗粒6。该端子颗粒由例如长方体状的金属片等颗粒状的导电部件形成。该半导体元件4以及端子用颗粒6，利用粘接带2的粘附性而固定在粘接带32上。
如后所述，与该半导体元件4的电极4a对应的端子用颗粒6，能够通过引线键合法连接而电连接，进一步通过在粘接带2上用树脂密封该半导体元件4和端子用颗粒6，在该粘接带2上形成半导体器件。然后，通过从半导体器件剥离粘接带2来使二者分离，在树脂密封部露出端子用颗粒6的表面，该端子用颗粒6成为半导体器件的外部连接用端子(安装用端子)。
所述粘接带2可以使用与制造半导体装置时一般使用的切片胶带或者背部磨砂胶带具有同样的粘附性的胶带。即，作为粘接带2，可以使用在树脂带基材的一个主面上形成了粘接材料层的胶带。不过，该粘接带2，需要在其上进行引线键合处理，所以需要具有耐热性，不会由于引线键合时的热发生变形，并且不会在通过树脂注模法进行密封时由于加热而发生变形。
另一方面，作为半导体器件的外部连接用端子(安装用端子)发挥功能的颗粒状的导电部件、即端子用颗粒6，由例如铜(Cu)或铝(Al)金属构成，具有在引线键合时被按压也不会变形的厚度(例如0.1mm)。该端子用颗粒6的形状一般为图1所示的长方体，但根据需要可以是立方体状、多角柱体状或者球状等。
优选在构成该端子用颗粒6的颗粒状导电部件的表面，预先施加例如金(Au)、银(Ag)或钯(Pd)等的金属电镀。即，由于端子用颗粒6贴附在粘接带2上的面最终要露出并作为外部连接用端子(安装用端子)发挥作用，所以为了确保对焊锡等的润湿性，优选先施加电镀处理。
另外，在把端子用颗粒6贴到粘接带2上时，由于成为上侧的面上要连接键合引线，所以为了该键合引线容易连接，优选先施加电镀处理。电镀处理可以在端子用颗粒6的整个表面上进行，也可以对作为外部连接用端子(安装用端子)而露出的面以及连接键合引线的面进行。另外，构成端子用颗粒6的颗粒状的导电部件件没有必要必须是金属，只要是具有良好的导电性、具有必要的刚性，金属以外的材料也可以。
并且，在图1所示的结构中，在端子用颗粒6的周围配置了定位(位置对准)用颗粒8。该定位用颗粒8，提供把半导体元件4和端子用颗粒6贴到粘接带2上时的基准位置。而且，该定位用颗粒8也被用作在树脂密封后通过切片处理使半导体元件单片化时的位置确认标记。由于该定位用颗粒8为位置确认用途而设置，所以不需有导电性。因此，可以使用与端子颗粒6不同的材料，当然也可以使用与端子用颗粒6相同的材料。
参照图2至图4详细说明这样的以粘接带部件为基体、在其一个主面上配设半导体元件及端子用颗粒的制造方法。在下面说明的半导体器件的制造方法中，所述粘接带2具有带的形状，并以预先卷在卷轴上的状态来提供。
首先，如图2(a)所示，对于从IN侧的卷轴20拉出、成平坦状态的粘接带2，在其一个主面上即形成粘附材料的面上，利用裸片键合器(未图示)贴上定位用颗粒8。
接着，如图2(b)所示，在粘接带2的所述一个主面上利用裸片键合器(未图示)贴附半导体元件4。此时，半导体元件4是以形成有电极端子4a的电路形成面朝向上侧的所谓面朝上状态而搭载的，半导体元件4的背面贴附在粘接带2上。贴附半导体元件4的位置以所述定位用颗粒8为基准来确定。
然后，如图2(c)所示，在半导体元件4周围的粘接带2上，利用裸片键合器(未图示)贴附端子用颗粒6。贴附该端子用颗粒的位置也以所述定位用颗粒8为基准来确定。另外，也可以变更在粘接带2上载置半导体元件4和端子用颗粒6的顺序。
然后，如图3(a)所示，在粘接带2上通过键合引线10连接半导体元件4的电极端子4a和对应的端子用颗粒6。
接着，如图3(b)所示，把粘接带2上的半导体元件4、端子用颗粒6以及键合引线10进行树脂密封。在本实施例中，此时把多组的半导体元件、端子用颗粒一并进行树脂密封。树脂密封可以通过在粘接带2的上侧配置模具、用模具转印密封树脂而进行。也可以不用树脂注型法，而适用印刷密封法或者浇注密封法。
在本实施例中，把沿着粘接带2配置的两个半导体元件4和分别与之对应的端子用颗粒6同时一并树脂密封，但树脂密封的半导体元件4不限于两个，可能的话也可以同时树脂密封3个以上。另外，也可以不是对在粘接带2的长度方向上排列的多个半导体元件、而是对在一个粘接带2的宽度方向上并列配置的、搭载在其他粘接带上的半导体元件、端子用颗粒一并进行树脂密封。
把半导体元件4在粘接带2上进行树脂密封后，如图3(c)所示，从树脂密封体12剥离粘接带2。粘接带2的剥离是通过利用剥离滚轮22使粘接带2的移动方向远离树脂密封体12来进行的。分离后的粘接带2卷到OUT侧的卷轴24上。
上述工序，粘接带2从IN侧卷轴20抽出到卷到OUT侧卷轴24上之间是作为一连串的工序进行的。该粘接带2并不是一直连续移动的，而是在各工序中以停止的状态来进行半导体元件、端子颗粒的搭载、引线键合、树脂密封等。
从粘接带2分离的树脂密封体12，如图4(a)所示，在室温下放置或者加热进行密封树脂的硬化处理。在此状态下，树脂密封体12包含两个半导体元件以及与其分别对应的端子用颗粒6、键合引线10以及定位用颗粒8。
密封树脂硬化后，如图4(b)所示，使从树脂密封体12露出的端子用颗粒6，接触设在探针卡25上的探针26，对半导体器件进行电特性试验。
电特性试验后，通过切削刀片切断树脂密封体12进行单片化，如图4(c)所示，形成所期望的半导体器件100。此时，切割线根据从树脂密封体12露出的定位用颗粒8进行设定。在本实施例中，如所述图4(b)所示，在切割线上配置了定位用颗粒8，该定位用颗粒8在切片时被除去。
如此，根据本实施例的半导体器件及其制造方法中，不使用引线框等，而通过把半导体元件4和成为外部连接用端子(安装用端子)的端子用颗粒6贴附到粘接带2上，而连接该半导体元件和端子用颗粒6，之后，用密封树脂进行密封，来形成半导体器件。因此，不需要对每种半导体元件4必须准备的引线框等构成部件，以一个制造工序就可以对应不同种类的半导体元件。由此，可以削减半导体器件的制造成本。而且，相应于削减了引线框，可以减少作为半导体器件的厚度，能够提供更薄型的半导体器件。
用根据本实施例的制造方法制造的半导体器件中，成为外部连接用端子(安装用端子)的端子用颗粒6，处于几乎整体埋入密封树脂12内的状态，该端子用颗粒6不从密封树脂12的底面突出，仅其一面露出。因此，由于这一点也可以减少半导体器件的厚度。
另外，该端子用颗粒6并不是在半导体器件的制造工序中加工金属板或金属箔而成为多个端子的，而是预先形成为颗粒状的导电部件而供给的。即，成为外部连接用端子(安装用端子)的端子用颗粒6不是在制造工序中形成的。这一点上，根据本实施例的半导体器件，安装端子的结构及形状与通过过去的制造方法所制造的半导体器件的外部连接用端子不同。
另外，在所述图4(c)所示的半导体器件中，定位用颗粒8在切片时被去除，但没有必要一定去除该定位用颗粒8，也可以如图5所示那样在完成的半导体器件上残留该定位用颗粒8。
下面，对根据上述实施例的半导体器件的变形例进行说明。
图6中表示使用了排列有两列电极端子的半导体元件4的半导体器件的结构。
成为外部连接用端子(安装用端子)的端子用颗粒6，在半导体元件4的周围排列成两列。这样在外部连接用端子(安装用端子)数目较多，不能在半导体元件4的周围把端子用颗粒配置成一列的情况下，可以通过在能够进行引线键合的范围内配置多列端子用颗粒6来对应。
另一方面，图7示出了在半导体元件4的下表面上配设了散热板14的半导体器件的结构。
该散热板14在贴附半导体元件4之前先贴在粘接带2上搭载半导体元件4的地方，半导体元件4通过粘接剂16固定在该散热板14上。
另外，也可以如图8所示，不采用散热板14，而在半导体元件4下配设散热用的多个颗粒18。该散热用颗粒18需由导热性良好的材料形成，但如果端子用颗粒6或定位用颗粒8导热性良好的话，也可以用与它们相同的材料构成。
接着，对把多个半导体元件组合到一个半导体器件中的例子进行说明。
图9表示在第一半导体元件4A上层积第二半导体元件4B而成为一个半导体器件的例子。半导体元件4B配置在半导体元件4A的电路形成面上，所以半导体元件4B比半导体元件4A小。当半导体元件4B的键合引线10B与半导体元件4A的键合引线10A有接触的可能时，可以如图10所示，通过使来自半导体元件4B的键合引线10B连接的端子用颗粒6较高(厚度大)，确保键合引线之间的间隙，防止键合引线之间的接触。
图11表示在同一平面上并列两个半导体元件形成一个半导体器件的例子，图12表示该图11中所示的半导体器件的制造工序中的状态。该半导体器件中，半导体元件4A、半导体元件4B并列配置在粘接带2上，其间配置端子用颗粒6。隔着该端子用颗粒6，半导体元件4A的电极端子和与此对应的半导体元件4B的电极端子相互连接，并且共同连接对应的电位。
图13表示平面地排列两个半导体元件，在其间配置了中继用半导体元件的例子，另外图14表示该图13所示的半导体器件的制造工序中的状态。在该半导体器件中，在半导体元件4A和半导体元件4B之间配设有作为该半导体元件4A、4B之间的接口的中继用半导体元件4C。
该中继用半导体元件4C，具有连接到半导体元件4A的电极和连接到半导体元件4B的电极。也可以不采用该中继用半导体元件4C，而配设中继用基板(端子芯片)。
图15表示包含连接在半导体元件的电源端子和接地端子之间的电容器28的半导体器件的制造工序中的状态。这样，可以把电容器或者电阻元件、电感器等从动元件搭载固定在端子用颗粒6上，组合到半导体器件内。
接着参照图16至图18说明根据本发明的第2实施例的半导体器件。根据本发明的第2实施例的半导体器件，如图16所示，对配设在粘接带2上的端子用颗粒6以倒装片方式连接有半导体元件4D。
在制造图16所示的半导体器件之际，与所述第1实施例的制造方法相同，以定位用颗粒8(未图示)为基准，首先在粘接带2上贴附成为外部连接用端子(安装用端子)的端子用颗粒6。此时，该端子用颗粒6配置在与搭载的半导体元件4D的突起电极(金凸点、焊锡凸点等)4Da对应的位置上。然后，半导体元件4D，以其电路形成面及突起电极4Da朝下的状态(面朝下)，将该突起电极4Da连接到端子用颗粒6上。
以倒装片方式连接半导体元件4D后，在粘接带2上用树脂密封半导体元件4D。此时，也可以采用如图16所示，使半导体元件4D的背面从密封树脂12露出，提高散热效率且减少半导体器件的厚度的结构。树脂密封后，通过剥离粘接带2，端子用颗粒6的表面从密封树脂12露出。
在上述的半导体器件中，为了进一步提高散热效率，也可以如图17所示，在半导体元件4D的背面安装散热板30。或者，也可以如图18所示，在半导体元件4D的下侧(电路形成面侧)配设散热板3并埋入密封树脂中。此时，在制造工序中，以倒装片方式键合半导体元件4D前，通过在粘接带2上贴附散热板32，可以把散热板32埋入密封树脂12内。
产业上的可利用性
本发明可适用于要求进一步薄型化的表面安装型的半导体器件。

Claims (5)

1.一种半导体器件，其特征在于，具有：
半导体元件；
配置在所述半导体元件的一个表面上的散热板；
连接到该半导体元件的电极的多个颗粒状的导电部件；以及
密封所述半导体元件和所述导电部件的密封树脂，
所述导电部件埋置在所述密封树脂中，且所述导电部件的表面从所述密封树脂露出，所述导电部件作为所述半导体元件的外部连接用端子发挥作用，
所述散热板埋入所述密封树脂中，且所述散热板的表面从所述密封树脂露出。
2.根据权利要求1所述的半导体器件，其特征在于，从所述密封树脂中露出的所述散热板的表面与从所述密封树脂露出的所述导电部件的表面位于同一平面上。
3.根据权利要求1所述的半导体器件，其特征在于，所述半导体元件的电极和所述导电部件通过键合引线而连接。
4.根据权利要求1所述的半导体器件，其特征在于，多个颗粒状的定位部件埋入所述密封树脂中，从所述密封树脂露出的所述定位部件的表面与从所述密封树脂露出的所述导电部件的表面位于同一平面上。
5.根据权利要求1～4中的任一项所述的半导体器件，其特征在于，所述导电部件的表面上进行了电镀处理。
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2937765B1 (fr) * 2008-10-27 2010-12-17 Smart Packaging Solutions Sps Procede de montage de composants passifs sur un objet portable de faible epaisseur, et objet portable ainsi obtenu
JP5102806B2 (ja) * 2009-05-28 2012-12-19 日立ケーブルプレシジョン株式会社 リードフレームの製造方法、リードフレーム、半導体装置の製造方法、及び半導体装置
JP5137937B2 (ja) * 2009-12-16 2013-02-06 日東電工株式会社 半導体装置製造用耐熱性粘着シート、該シートに用いる粘着剤、及び該シートを用いた半導体装置の製造方法
JP5734624B2 (ja) * 2010-11-12 2015-06-17 新光電気工業株式会社 半導体パッケージの製造方法
JP2012167177A (ja) * 2011-02-14 2012-09-06 Nitto Denko Corp 半導体装置製造用耐熱性粘着テープ及びそのテープを用いた半導体チップの製造方法
CN106784300A (zh) * 2012-12-14 2017-05-31 旭化成微电子株式会社 磁传感器和磁传感器装置以及磁传感器的制造方法
TWI582863B (zh) * 2015-08-20 2017-05-11 南茂科技股份有限公司 晶片封裝製程、晶片封裝體以及具有晶片封裝體之可撓性線路載板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1251943A (zh) * 1998-10-21 2000-05-03 松下电子工业株式会社 连接端凸点架及其制造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58147037A (ja) * 1982-02-25 1983-09-01 Fuji Electric Co Ltd 混成集積回路
JP2997255B1 (ja) * 1998-10-21 2000-01-11 松下電子工業株式会社 樹脂封止型半導体装置およびその製造方法
US20020100165A1 (en) * 2000-02-14 2002-08-01 Amkor Technology, Inc. Method of forming an integrated circuit device package using a temporary substrate
US6342730B1 (en) * 2000-01-28 2002-01-29 Advanced Semiconductor Engineering, Inc. Low-pin-count chip package and manufacturing method thereof
JP4392732B2 (ja) * 2000-02-07 2010-01-06 リンテック株式会社 半導体チップの製造方法
JP2002076040A (ja) * 2000-08-30 2002-03-15 Hitachi Ltd 半導体装置及びその製造方法
JP2003078072A (ja) * 2001-09-07 2003-03-14 Hitachi Ltd 半導体装置の製造方法
JP2003303919A (ja) * 2002-04-10 2003-10-24 Hitachi Ltd 半導体装置及びその製造方法
JP2004063615A (ja) * 2002-07-26 2004-02-26 Nitto Denko Corp 半導体装置の製造方法、半導体装置製造用接着シートおよび半導体装置
JP4115228B2 (ja) * 2002-09-27 2008-07-09 三洋電機株式会社 回路装置の製造方法
JP4125668B2 (ja) * 2003-12-19 2008-07-30 日東電工株式会社 半導体装置の製造方法
TWI302561B (en) * 2004-01-28 2008-11-01 Lg Chemical Ltd Releasable adhesive composition
JP4421972B2 (ja) * 2004-04-30 2010-02-24 日東電工株式会社 半導体装置の製法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1251943A (zh) * 1998-10-21 2000-05-03 松下电子工业株式会社 连接端凸点架及其制造方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP昭58-147037A 1983.09.01
JP特开2003-78072A 2003.03.14

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