CN101272034B - 电极图形以及引线接合方法 - Google Patents
电极图形以及引线接合方法 Download PDFInfo
- Publication number
- CN101272034B CN101272034B CN2008100830350A CN200810083035A CN101272034B CN 101272034 B CN101272034 B CN 101272034B CN 2008100830350 A CN2008100830350 A CN 2008100830350A CN 200810083035 A CN200810083035 A CN 200810083035A CN 101272034 B CN101272034 B CN 101272034B
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- wire bonding
- electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4823—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a pin of the item
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
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- H01L2924/01006—Carbon [C]
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01074—Tungsten [W]
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- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007070684 | 2007-03-19 | ||
| JP2007-070684 | 2007-03-19 | ||
| JP2008-008066 | 2008-01-17 | ||
| JP2008008066A JP5176557B2 (ja) | 2007-03-19 | 2008-01-17 | 電極パターンおよびワイヤボンディング方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101272034A CN101272034A (zh) | 2008-09-24 |
| CN101272034B true CN101272034B (zh) | 2010-09-29 |
Family
ID=39985396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008100830350A Active CN101272034B (zh) | 2007-03-19 | 2008-03-18 | 电极图形以及引线接合方法 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5176557B2 (enExample) |
| KR (1) | KR100941106B1 (enExample) |
| CN (1) | CN101272034B (enExample) |
| TW (1) | TWI387171B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5441590B2 (ja) * | 2009-09-29 | 2014-03-12 | 大王製紙株式会社 | パンツタイプ使い捨ておむつ |
| JP6901902B2 (ja) * | 2017-04-27 | 2021-07-14 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| KR102706879B1 (ko) * | 2021-12-24 | 2024-09-13 | 주식회사 유라코퍼레이션 | Pcb기판 |
| CN121097496A (zh) * | 2025-11-10 | 2025-12-09 | 长春理工大学 | 一种提高半导体激光器调制速率的方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1630189A (zh) * | 2003-12-19 | 2005-06-22 | Tdk株式会社 | 安装基板和使用它的电子部件 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62291126A (ja) | 1986-06-11 | 1987-12-17 | Fuji Xerox Co Ltd | パタ−ン認識マ−ク |
| JPS63133638A (ja) * | 1986-11-26 | 1988-06-06 | Toshiba Corp | ワイヤボンデイング方法 |
| JP2621420B2 (ja) * | 1988-09-28 | 1997-06-18 | 日本電気株式会社 | 半導体装置のボンディングパッド |
| JP2992427B2 (ja) * | 1993-07-16 | 1999-12-20 | 株式会社カイジョー | ワイヤボンディング装置及びその方法 |
| JP3611948B2 (ja) * | 1997-05-16 | 2005-01-19 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置及びその製造方法 |
| JP2982794B1 (ja) | 1998-06-17 | 1999-11-29 | 日本電気株式会社 | 半導体装置 |
| JP2001024303A (ja) | 1999-07-09 | 2001-01-26 | Nippon Avionics Co Ltd | 認識マーク |
| JP4352579B2 (ja) * | 2000-05-16 | 2009-10-28 | 沖電気工業株式会社 | 半導体チップ及びその製造方法 |
| US6789724B2 (en) * | 2001-07-06 | 2004-09-14 | Erico International Corporation | Welding apparatus and method |
| WO2003100850A1 (en) * | 2002-05-28 | 2003-12-04 | Hitachi Chemical Co., Ltd. | Substrate, wiring board, semiconductor package-use substrate, semiconductor package and production methods for them |
| US7042098B2 (en) | 2003-07-07 | 2006-05-09 | Freescale Semiconductor,Inc | Bonding pad for a packaged integrated circuit |
-
2008
- 2008-01-17 JP JP2008008066A patent/JP5176557B2/ja not_active Expired - Fee Related
- 2008-03-04 TW TW097107465A patent/TWI387171B/zh not_active IP Right Cessation
- 2008-03-05 KR KR1020080020362A patent/KR100941106B1/ko not_active Expired - Fee Related
- 2008-03-18 CN CN2008100830350A patent/CN101272034B/zh active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1630189A (zh) * | 2003-12-19 | 2005-06-22 | Tdk株式会社 | 安装基板和使用它的电子部件 |
Non-Patent Citations (4)
| Title |
|---|
| JP特开2000-12603A 2000.01.14 |
| JP特开2001-21303A 2001.01.26 |
| JP特开2001-326241A 2001.11.22 |
| JP特开平10-321672A 1998.12.04 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI387171B (zh) | 2013-02-21 |
| TW200843265A (en) | 2008-11-01 |
| KR100941106B1 (ko) | 2010-02-10 |
| CN101272034A (zh) | 2008-09-24 |
| KR20080085687A (ko) | 2008-09-24 |
| JP5176557B2 (ja) | 2013-04-03 |
| JP2008263165A (ja) | 2008-10-30 |
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| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |