CN101188216A - 提高散热性的绝缘体上硅器件及其制造方法 - Google Patents

提高散热性的绝缘体上硅器件及其制造方法 Download PDF

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CN101188216A
CN101188216A CNA2007101609553A CN200710160955A CN101188216A CN 101188216 A CN101188216 A CN 101188216A CN A2007101609553 A CNA2007101609553 A CN A2007101609553A CN 200710160955 A CN200710160955 A CN 200710160955A CN 101188216 A CN101188216 A CN 101188216A
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Abstract

一种在绝缘体上的硅衬底中制造的半导体器件，包括支撑硅衬底(10)、被衬底支撑的氧化硅层以及覆盖氧化硅层的硅层。在部分氧化硅层(12)上的硅层中制造电子元件，然后掩蔽和刻蚀与元件相反的衬底。然后在已被刻蚀除去的部分衬底中形成金属层，金属层提供从元件散热。在另一实施例中，用毗邻硅层的金属层除去覆盖部分衬底的氧化硅层。在制造器件中，采用择优刻蚀，以除去具有氧化硅的衬底内的硅，氧化硅起刻蚀剂阻止作用。可以采用两个步骤工序，包括刻蚀硅大部分的第一氧化刻蚀，然后是更高选择性但更慢的刻蚀。然后如同所述另一实施例中，可以通过氧化硅的择优刻蚀剂除去露出的氧化硅。

Description

提高散热性的绝缘体上硅器件及其制造方法
本申请是申请日为2002年10月30号，申请号为02821791.8，发明名称为“提高散热性的绝缘体上硅器件及其制造方法”的申请的分案申请。
技术领域
本发明一般涉及半导体器件及制造工艺，更具体地本发明涉及在绝缘体上硅(SOI)结构中制造的这种器件。
背景技术
通过在绝缘体上的硅结构中制造器件，在半导体器件中可以实现减少的寄生元件，绝缘体上的硅结构如蓝宝石上硅以及氧化物绝缘体上硅，包括市场上可买到的绝缘体和注入的氧化物上键合的硅(SIMOX)。在这种结构中，支撑衬底一般键合到用于散热的散热器，对于功率晶体管结构来说散热器是特别重要的。此外，通过衬底表面上的金属化可以提供接地。
发明内容
本发明旨在提供一种制造绝缘体上硅结构的改进方法，绝缘体上硅结构具有提高的散热性以及包括低电阻接地通路的电路接地结构。
按照本发明的一种在绝缘体上的硅衬底中制造半导体器件的方法，包括以下步骤：a)提供半导体本体，半导体本体包括支撑衬底的硅、被衬底支撑的氧化硅层以及覆盖氧化硅层的硅层；
b)在部分氧化硅层上的硅层中形成半导体元件；
c)在与元件相反的衬底表面上形成刻蚀掩模；
d)施用刻蚀剂，以有选择地刻蚀部分氧化硅层下面的衬底中的硅；以及使氧化硅层暴露，氧化硅起刻蚀剂阻止作用；
e)在衬底的刻蚀部分中与氧化硅层邻接地提供金属层，以在元件工作期间提供从元件散热。
根据本发明的一种半导体器件，包括：
a)半导体本体，包括支撑衬底的硅、被衬底支撑的硅层以及覆盖氧化硅层的硅层，
b)在覆盖通过刻蚀已除去的部分衬底的硅层中形成的半导体元件，以及
c)通过刻蚀除去的部分衬底中的金属层，金属层提供从元件散热，
其中覆盖部分衬底的氧化硅层被除去，金属层毗邻硅层，金属层包括难熔金属，金属层还包括难熔金属上的金、铝或铜。
根据本发明的另一种半导体器件，包括：
a)半导体本体，包括支撑衬底的硅、被衬底支撑的氧化硅层以及覆盖氧化硅层的硅层，
b)在覆盖通过刻蚀已除去的部分衬底的硅层中形成的半导体元件，以及
c)通过刻蚀除去的部分衬底中的金属层，金属层提供从元件散热，
其中金属层毗邻氧化硅层使得氧化硅层位于金属层和硅层之间。
根据本发明，在绝缘体上硅(SOI)衬底中制造的半导体器件包括支撑硅衬底、被衬底支撑的氧化硅层以及氧化硅层上的硅层。更具体，例如，在部分氧化硅层上的硅层中制造电子元件如晶体管或电容器，然后掩蔽和刻蚀与元件相对的部分衬底。然后在已被刻蚀除去的部分衬底中形成金属层，金属层提供从元件散热。在另一种实施例中，用毗邻硅层的金属层除去覆盖部分衬底的氧化硅层。
在制造器件中，采用择优刻蚀，以用起刻蚀剂阻止作用的氧化硅除去衬底中的硅。可以应用两个步骤刻蚀，并且后刻蚀是择优的。然后在另一实施例中，可以通过氧化硅的优先刻蚀剂除去露出的氧化硅。
例如，在衬底的表面上可以形成用于硅刻蚀的氮化硅硬掩模。在形成硬掩模中，在掩蔽和刻蚀氮化硅时可以采用红外线掩模对准或镜像对准。金属层择优包括被金覆盖的难熔金属。可以采用晶片磨蚀，以在掩蔽和刻蚀之前减薄衬底。
结合对附图的详细描述将更容易明白本发明及其目的和特点。
附图说明
图1A-1D是说明根据本发明的实施例制造半导体器件的步骤的剖视图。
图2A-2C是说明根据本发明的另一个实施例制造半导体器件的步骤的剖视图。
图3A-3C是说明在根据本发明的半导体器件中可以制造的已知电子元件的剖视图。
具体实施方式
图1A-1D是说明根据本发明的一个实施例制造绝缘体上硅器件的步骤的剖视图。在图1A中，提供了可以是键合的硅或注入氧化物的硅的SOI结构，其中硅衬底10支撑氧化硅层12，氧化硅层12具有在氧化硅层12上设置的硅层14。这种SOI结构为大家所熟知且商业上可用于半导体器件制造。
如图1B所示，使用常规的光刻胶掩蔽、刻蚀和掺杂技术在硅层14中制造电子元件16。元件16可以是任意半导体器件如：图3A的截面图中所示的横向DMOS晶体管、图3B中所示的双极晶体管或图3C所示的电容器或可变电抗器。这些及其他半导体器件为大家所熟知且采用常规的半导体加工技术制造这种器件。
如图1B进一步所示，在与元件16相反的衬底10的表面上形成氮化硅或氧化物/氮化物夹层18，该层被有选择地掩蔽和刻蚀，以在衬底10的刻蚀中起硬掩模作用，如图1C所示。有利地，可以采用择优刻蚀剂如氢氧化钾或干式等离子体刻蚀如CF4+O2，以刻蚀具有氧化硅层12的衬底10中的硅，氧化硅层12起刻蚀剂阻止作用，由此防止过度刻蚀到硅层14中。
此后，如图1D所示，在衬底10的表面上以及在与氧化硅层12毗邻的刻蚀部分中淀积难熔金属层20。可以采用任何巳知的难熔金属，例如钨化钛以及氮化钛。然后通过金属层22如金、铜或铝覆盖难熔金属层20，金属层随后可以被研磨，以在衬底10上形成平坦的金属表面。有利地，通过除去元件16底下的衬底材料，层20、22的金属散热器更接近元件16，且便于热量散发。金属层也可以用作元件的接地。还减小衬底阻抗。
图2A-2C是说明本发明的另一实施例的剖视图。在制造图1B中所示的元件之后，但是在形成氮化硅层18之前，磨蚀衬底10，以减薄衬底并减小为露出氧化硅层12所需的后续刻蚀量，如图2A所示。
通过利用氧化硅的择优刻蚀剂如湿缓冲HF酸或干法等离子体刻蚀，图2A的结构可以被进一步刻蚀为图2B所示的结构，以不仅除去部分衬底10而且除去元件16下面露出的氧化硅层12。在该实施例中，金属层20、22毗邻直接在元件16下面的硅层14，由此进一步便于散热以及可以容易地用作元件的接地，同时还减小衬底阻抗。
通过放置金属紧密接近元件热源，根据本发明的器件减小了热阻，并且由于金属紧密接近有源晶体管，因此也减小衬底阻抗。有利地，该方法利用两个硅层之间的氧化硅层作为能使厚衬底的刻蚀具有良好的一致性而不过度刻蚀到有源硅中的刻蚀阻止。可以调整难熔阻挡金属以及金的厚度，以提供适当的散热能力。如果氧化硅层留在原处，那么阻挡金属是优选的。因此金属散热器可以在实际热产生源的几个微米范围内，而不必减薄整个晶片。
尽管参考具体实施例描述了本发明，但是该描述是说明性的且不允许被将认为是限制本发明。在不脱离本发明的真实精神和范围的条件下，所属领域的技术人员可以进行各种改进和应用。

Claims (2)

1.一种半导体器件，包括：
a)半导体本体，包括支撑衬底的硅、被衬底支撑的氧化硅层以及覆盖氧化硅层的硅层，
b)在覆盖通过刻蚀已除去的部分衬底的硅层中形成的半导体元件，以及
c)通过刻蚀除去的部分衬底中的金属层，金属层提供从元件散热，其中覆盖部分衬底的氧化硅层被除去，金属层毗邻硅层，金属层包括难熔金属，金属层还包括难熔金属上的金、铝或铜。
2.如权利要求1所述的半导体器件，其中难熔金属是钨化钛或氮化钛。
CN2007101609553A 2001-11-02 2002-10-30 半导体器件 Expired - Lifetime CN101188216B (zh)

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