CN101097957B - 具有凹陷栅极的半导体器件及其制造方法 - Google Patents
具有凹陷栅极的半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN101097957B CN101097957B CN2007100969994A CN200710096999A CN101097957B CN 101097957 B CN101097957 B CN 101097957B CN 2007100969994 A CN2007100969994 A CN 2007100969994A CN 200710096999 A CN200710096999 A CN 200710096999A CN 101097957 B CN101097957 B CN 101097957B
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- China
- Prior art keywords
- conductive pattern
- semiconductor substrate
- depression
- semiconductor
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 115
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 238000000034 method Methods 0.000 claims description 39
- 230000004888 barrier function Effects 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 13
- 229920005591 polysilicon Polymers 0.000 claims description 13
- 238000005530 etching Methods 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 239000012212 insulator Substances 0.000 claims description 9
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 3
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 3
- 238000002955 isolation Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001000 micrograph Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 229910003481 amorphous carbon Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000009279 wet oxidation reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20060060292 | 2006-06-30 | ||
KR10-2006-0060292 | 2006-06-30 | ||
KR1020060060292 | 2006-06-30 | ||
KR1020060124735A KR100780620B1 (ko) | 2006-06-30 | 2006-12-08 | 리세스 게이트를 갖는 반도체소자 및 그 제조 방법 |
KR1020060124735 | 2006-12-08 | ||
KR10-2006-0124735 | 2006-12-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101097957A CN101097957A (zh) | 2008-01-02 |
CN101097957B true CN101097957B (zh) | 2010-10-06 |
Family
ID=39011590
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007100969994A Expired - Fee Related CN101097957B (zh) | 2006-06-30 | 2007-04-26 | 具有凹陷栅极的半导体器件及其制造方法 |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR100780620B1 (ko) |
CN (1) | CN101097957B (ko) |
TW (1) | TWI368278B (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101036927B1 (ko) | 2008-12-31 | 2011-05-25 | 주식회사 하이닉스반도체 | 수직게이트를 구비한 반도체장치 및 그 제조 방법 |
US9064699B2 (en) * | 2013-09-30 | 2015-06-23 | Samsung Electronics Co., Ltd. | Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6677205B2 (en) * | 2001-09-28 | 2004-01-13 | Infineon Technologies Ag | Integrated spacer for gate/source/drain isolation in a vertical array structure |
CN1794467A (zh) * | 2004-12-24 | 2006-06-28 | 海力士半导体有限公司 | 非对称凹陷栅极金属氧化物半导体场效应晶体管及其制法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990000763A (ko) * | 1997-06-10 | 1999-01-15 | 문정환 | 반도체장치의 제조방법 |
KR20050119244A (ko) * | 2004-06-16 | 2005-12-21 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 제조 방법 |
-
2006
- 2006-12-08 KR KR1020060124735A patent/KR100780620B1/ko not_active IP Right Cessation
- 2006-12-28 TW TW095149448A patent/TWI368278B/zh not_active IP Right Cessation
-
2007
- 2007-04-26 CN CN2007100969994A patent/CN101097957B/zh not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6677205B2 (en) * | 2001-09-28 | 2004-01-13 | Infineon Technologies Ag | Integrated spacer for gate/source/drain isolation in a vertical array structure |
CN1794467A (zh) * | 2004-12-24 | 2006-06-28 | 海力士半导体有限公司 | 非对称凹陷栅极金属氧化物半导体场效应晶体管及其制法 |
Non-Patent Citations (1)
Title |
---|
US 2005/0001266 A1,全文. |
Also Published As
Publication number | Publication date |
---|---|
TWI368278B (en) | 2012-07-11 |
CN101097957A (zh) | 2008-01-02 |
KR100780620B1 (ko) | 2007-11-30 |
TW200802620A (en) | 2008-01-01 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20101006 Termination date: 20130426 |