CN101097957B - 具有凹陷栅极的半导体器件及其制造方法 - Google Patents

具有凹陷栅极的半导体器件及其制造方法 Download PDF

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Publication number
CN101097957B
CN101097957B CN2007100969994A CN200710096999A CN101097957B CN 101097957 B CN101097957 B CN 101097957B CN 2007100969994 A CN2007100969994 A CN 2007100969994A CN 200710096999 A CN200710096999 A CN 200710096999A CN 101097957 B CN101097957 B CN 101097957B
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CN
China
Prior art keywords
conductive pattern
semiconductor substrate
depression
semiconductor
layer
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Expired - Fee Related
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CN2007100969994A
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English (en)
Chinese (zh)
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CN101097957A (zh
Inventor
郑永均
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
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Hynix Semiconductor Inc
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Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of CN101097957A publication Critical patent/CN101097957A/zh
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Publication of CN101097957B publication Critical patent/CN101097957B/zh
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66628Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
CN2007100969994A 2006-06-30 2007-04-26 具有凹陷栅极的半导体器件及其制造方法 Expired - Fee Related CN101097957B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
KR20060060292 2006-06-30
KR10-2006-0060292 2006-06-30
KR1020060060292 2006-06-30
KR1020060124735A KR100780620B1 (ko) 2006-06-30 2006-12-08 리세스 게이트를 갖는 반도체소자 및 그 제조 방법
KR1020060124735 2006-12-08
KR10-2006-0124735 2006-12-08

Publications (2)

Publication Number Publication Date
CN101097957A CN101097957A (zh) 2008-01-02
CN101097957B true CN101097957B (zh) 2010-10-06

Family

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CN2007100969994A Expired - Fee Related CN101097957B (zh) 2006-06-30 2007-04-26 具有凹陷栅极的半导体器件及其制造方法

Country Status (3)

Country Link
KR (1) KR100780620B1 (ko)
CN (1) CN101097957B (ko)
TW (1) TWI368278B (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101036927B1 (ko) 2008-12-31 2011-05-25 주식회사 하이닉스반도체 수직게이트를 구비한 반도체장치 및 그 제조 방법
US9064699B2 (en) * 2013-09-30 2015-06-23 Samsung Electronics Co., Ltd. Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6677205B2 (en) * 2001-09-28 2004-01-13 Infineon Technologies Ag Integrated spacer for gate/source/drain isolation in a vertical array structure
CN1794467A (zh) * 2004-12-24 2006-06-28 海力士半导体有限公司 非对称凹陷栅极金属氧化物半导体场效应晶体管及其制法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990000763A (ko) * 1997-06-10 1999-01-15 문정환 반도체장치의 제조방법
KR20050119244A (ko) * 2004-06-16 2005-12-21 주식회사 하이닉스반도체 반도체 소자의 게이트 제조 방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6677205B2 (en) * 2001-09-28 2004-01-13 Infineon Technologies Ag Integrated spacer for gate/source/drain isolation in a vertical array structure
CN1794467A (zh) * 2004-12-24 2006-06-28 海力士半导体有限公司 非对称凹陷栅极金属氧化物半导体场效应晶体管及其制法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
US 2005/0001266 A1,全文.

Also Published As

Publication number Publication date
TWI368278B (en) 2012-07-11
CN101097957A (zh) 2008-01-02
KR100780620B1 (ko) 2007-11-30
TW200802620A (en) 2008-01-01

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Granted publication date: 20101006

Termination date: 20130426