CN101088161A - 半导体芯片的安装结构体和其制造方法 - Google Patents

半导体芯片的安装结构体和其制造方法 Download PDF

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Publication number
CN101088161A
CN101088161A CNA2005800446030A CN200580044603A CN101088161A CN 101088161 A CN101088161 A CN 101088161A CN A2005800446030 A CNA2005800446030 A CN A2005800446030A CN 200580044603 A CN200580044603 A CN 200580044603A CN 101088161 A CN101088161 A CN 101088161A
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pad
semiconductor chip
substrate
salient point
electrode
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CN100552948C (zh
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中村浩二郎
西川英信
熊泽谦太郎
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

由于具有：设置在基板上表面(1a)的多个上表面焊盘(2a)、夹住基板(1)并使其分别对应各上表面焊盘(2a)且设置在基板下表面(1b)的多个下表面焊盘(2b)、具有接合上述上表面焊盘(2a)的第1凸点(8a)的第1半导体芯片(4)、以及具有接合上述下表面焊盘(2b)的第2凸点(8b)的第2半导体芯片(5)，所以能够实现半导体芯片和电路基板的连接可靠性高的半导体芯片的双面安装结构体。

Description

半导体芯片的安装结构体和其制造方法
技术领域
本发明涉及一种半导体芯片的安装结构体，特别涉及一种在电路基板的两面安装半导体芯片的半导体芯片的安装结构体和其制造方法。
背景技术
随着半导体工艺的微细化技术的发展，存储元件正向大容量化前进。在这样的背景下，作为记录介质其一部分正使用闪存那样的固体存储器，来代替过去使用的磁记录介质和光记录介质。作为这些的应用例子，有IC卡和数码相机等的存储卡，更广泛地使用具有安全功能的SD(Secure Digital：安全数码)卡等。为了记录音乐信息和图像信息等，今后这样的存储卡将需要更大的容量。
为了使存储卡小而薄，且为了在其中容纳大容量存储器，而对半导体的安装也采用三维安装以及双面裸片安装技术来安装半导体芯片。根据图8A～图8G及图9来说明这样的安装结构体的一个例子(例如，参照专利文献1)。
图8A～图8G是表示从侧面看采用过去的倒装芯片安装技术在双面上安装半导体芯片的制造方法的纵向剖面图。另外，图9是从正面来看采用上述倒装芯片安装技术而将半导体芯片安装在电路基板的双面上的结构体的纵向剖面图。另外，在图8A～图8G和图9中，在同一部分上标有相同的标号。
首先，如图8A所示，对于分别于双面电路上的各规定位置形成多个基板电极2的电路基板1，向其上表面1a上提供由环氧树脂构成的热固化性粘接剂3。
这时，提供热固化性粘接剂3，从而形成覆头上表面1a的多个基板电极2的状态。另一方面，如图8B所示，在要安装的半导体芯片4上，在设置于其下表面的多个电极焊盘7上，通过使该电极焊盘与这些原料熔合从而形成合金并形成牢固固定的凸点8。在将该半导体芯片4吸附保持在真空吸附头10上并运送到电路基板1上后，在使凸点8与基板电极2对准位置的状态下，轻轻地压紧热固化性粘接剂3，如图8C所示，通过粘接剂3暂时固定在上表面1a上。
如图8D所示，在相同工序中使上述半导体芯片4暂时固定在上表面1a中的电路基板1上下反转以后，向朝上的下表面1b上提供热固化性粘接剂3。然后，如图8E所示，向电路基板1的下表面1b中运送吸附保持在真空吸附头10上的其它半导体芯片4。当该半导体芯片4使凸点8对基板电极2对准位置的状态下，轻轻地压紧热固化性粘接剂3，并通过粘接剂3暂时固定在下表面1b上。
如上所述分别在上表面1a和下表面1b上暂时固定半导体芯片4的电路基板1，向下表面的工序运送，如图8F所示，对于暂时固定在电路基板1的上表面1a和下表面1b上的2个半导体芯片4，由电路基板1的上下两侧压紧加压加热头11约30秒钟，并进行加热。通过这样，如图8G所示，提供给电路基板1的两个安装面1a、1b的热固化性粘接剂3同时进行热固化并收缩，利用该收缩力，将2个半导体芯片4的整个芯片向电路基板1的对向的安装面1a、1b拉紧，各凸点8分别压接在对应的基板电极2上，并进行电连接。另外，各半导体芯片4利用充满了和电路基板1的对向的安装面1a、1b的全部空隙、并热固化了的粘接剂3，牢牢地粘接在安装面1a、1b上。通过这样，完成了图9所示的安装结构体。
专利文献1：特开2003-197853号公报
但是，在上述过去结构中，如图9夸张地所示那样，在将半导体芯片4压紧在电路基板1上并进行加热的工序中，由于凸点8使基板电极2和电路基板1产生大的弯曲变形，所以有时会产生使基板电极2断线、不能够得到半导体芯片4和基板电极2电连接的严重问题，这是导致合格率下降的原因。另外，由于图9中用高度A、B所示的凸点8的接合高度有偏差，所以会产生接合部的质量下降和接合不良等的不良情况。
因此，本发明目的在于提供一种能够解决上述过去问题的半导体芯片的安装结构体。
发明内容
为了达成上述目的，与本发明相关的半导体芯片的安装结构体，具有：设置在基板上表面的多个上表面焊盘；夹住基板并使其分别对应于各上表面焊盘且设置在基板下表面的多个下表面焊盘；具有与上述上表面焊盘接合的第1凸点的第1半导体芯片；以及具有与上述下表面焊盘接合的第2凸点的第2半导体芯片。
如果采用本发明，则由于将基板的上表面焊盘和下表面焊盘设置在分别对应的位置上，因此当分别将第1半导体芯片压紧在上表面焊盘、将第2半导体芯片压紧在下表面焊盘上并进行加热安装时，其压紧施压的方向通过基板在上下方向上一致，从而使得两个方向的施压负载相抵消。由于该施压的相抵消，能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
另外，在上述结构中，如果结构是第2凸点与下表面焊盘接合，下表面焊盘与第1凸点接合的上表面焊盘相对应，对不与设置在上述半导体芯片上的布线电路连接的非导通焊盘接合隔件，则因为即使在没有必要确保半导体芯片和基板之间的导电性的地方也与其它地方一样，从基板的上下方向施加的压力负载会相抵消，所以能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
另外，在上述的结构中，即使用空焊盘或空凸点、或者空焊盘和空凸点的组合来构成隔件，也能够具有同样的效果。
而且，如果基板是厚度在0.15mm以下的加入填充剂的硬质型基板，则能够实现具有适当的强度且小型化·薄型化·轻量化优越的半导体芯片的安装结构体。
另外，与本发明相关的半导体芯片的安装结构体的制造方法，是对具有设置在基板上表面的多个上表面焊盘、以及夹住基板并使其分别与各上表面焊盘对应且设置在基板下表面的多个下表面焊盘的基板，将具有接合第1凸点的多个电极焊盘的第1半导体芯片，使各第1凸点与各上表面焊盘进行对准位置并暂时固定，同时将具有接合第2凸点的多个电极焊盘的第2半导体芯片，使各第2凸点与各下表面焊盘进行对准位置并暂时固定，向着基板分别对上述第1和第2半导体芯片施加压力并加热。
如果采用本发明，则由于将基板的上表面焊盘和下表面焊盘的位置对准，使其分别对应，因此当分别对上表面焊盘向第1半导体芯片施加压力，对下表面焊盘向第2半导体芯片施加压力，并进行加热和安装时，该压紧施压方向通过基板在上下方向上一致，利用两个施压负载相抵消，能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
另外，与本发明相关的其他的半导体芯片的安装结构体，半导体芯片的安装结构体具有：含有多个电极焊盘和不与布线电路连接的非导通焊盘的第1半导体芯片；含有多个电极焊盘和不与布线电路连接的非导通焊盘的第2半导体芯片；以及具有设置在与上述第1半导体芯片的电极焊盘对应的位置上的上表面焊盘、和设置在与上述第2半导体芯片的电极焊盘对应的位置上的下表面焊盘的基板，其结构是：用第1凸点接合上述上表面焊盘和电极焊盘，并用第2凸点接合上述下表面焊盘和电极焊盘，且用空凸点接合非导通焊盘和基板，在该结构中，也从基板的上下的施压方向通过基板在上下方向上一致，使得双方施加的压力负载相抵消，能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
与本发明相关的其他的半导体芯片的安装结构体的制造方法，是对上述第1凸点与基板上表面的上表面焊盘进行对准位置、并暂时固定具有接合第1凸点的多个电极焊盘和接合空凸点的不与布线电路连接的非导通焊盘的第1半导体芯片，同时对上述第2凸点与基板下表面的下表面焊盘进行对准位置、并暂时固定具有接合第2凸点的多个电极焊盘和接合空凸点的不与布线电路连接的非导通焊盘的第2半导体芯片，再分别向着基板对上述第1和第2半导体芯片施加压力并加热，使与非导通焊盘接合的空凸点直接与基板接合，即使使用该制造方法，也使来自基板上下方向的施压负载通过基板在上下方向上一致，使两者的施压负载相抵消，从而能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
另外，与本发明相关的另外其它的半导体芯片的安装结构体，该半导体芯片的安装结构体具有：在一端侧相邻具有2个电极焊盘、而在另一端侧上具有1个电极焊盘的第1半导体芯片；在一端侧具有1个电极焊盘、而在另一端侧上相邻具有2个电极焊盘的第2半导体芯片；以及具有设置在与上述第1半导体芯片的电极焊盘相对应的位置上的上表面焊盘和设置在与上述第2半导体芯片的电极焊盘相对应的位置上的下表面焊盘的基板，其结构是：用第1凸点接合上述上表面焊盘和电极焊盘，并用第2凸点接合上述下表面焊盘和电极焊盘，在基板的一端侧上，基板上表面侧的2个电极焊盘和各上表面焊盘的中间点、与基板下表面侧的电极焊盘和下表面焊盘的宽度方向中心在相对于基板的垂直线上一致；在基板的另一端侧上，基板上表面侧的电极焊盘和上表面焊盘的宽度方向中心、与基板下表面侧的2个电极焊盘和各下表面焊盘的中间点在相对于基板的垂直线上一致，即使是该结构，来自基板上下的压力方向也通过基板在上下方向上一致，从而使得两者的施压负载相抵消，能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
本发明的另外其它的半导体芯片的安装结构体的制造方法，是对上述第1凸点与基板上表面的上表面焊盘进行对准位置、并暂时固定一端侧相邻具有与第1凸点接合的2个电极焊盘、以及在另一端侧具有与第1凸点接合的1个电极焊盘的第1半导体芯片，同时对上述第2凸点与基板下表面的下表面焊盘进行对准位置、并暂时固定一端侧具有与第2凸点接合的1个电极焊盘、以及在另一端侧相邻具有与第2凸点接合的2个电极焊盘的第2半导体芯片，分别向着基板对上述第1和第2半导体芯片施加压力并加热，在基板的一端侧，基板上表面侧的2个电极焊盘和上表面焊盘的中间点、与基板下表面侧的电极焊盘和下表面焊盘的宽度方向中心在相对于基板的垂直线上一致，在基板的另一端侧，基板的上表面侧的电极焊盘和上表面焊盘的宽度方向中心、与基板下表面侧的2个电极焊盘和下表面焊盘的中间点在相对于基板的垂直线上一致，即使是该制造方法，也使来自基板上下方向的施压负载通过基板在上下方向上一致，从而使两者的施压负载相抵消，能够防止半导体芯片安装时的基板电极和电路基板的弯曲变形。
附图说明
图1是从正面来看的与本发明的实施形态1相关的半导体芯片的安装结构体的纵向剖面图。
图2A～图2D是表示按工序顺序用倒装芯片方式在与实施形态1相关的电路基板的两面上安装半导体芯片的安装结构体的制造过程图。
图3A～图3B是表示按工序顺序用倒装芯片方式在与实施形态1相关的电路基板的两面上安装半导体芯片的安装结构体的制造过程图。
图4是从正面来看的与本发明的实施形态2相关的半导体芯片的安装结构体的纵向剖面图。
图5是从正面来看的与本发明的实施形态3相关的半导体芯片的安装结构体的纵向剖面图。
图6是从正面来看的与本发明的实施形态4相关的半导体芯片的安装结构体的纵向剖面图。
图7是从正面来看的与本发明的实施形态5相关的半导体芯片的安装结构体的纵向剖面图。
图8A～图8G是表示按工序顺序并从侧面来看的用倒装芯片方式在电路基板的两面上安装半导体芯片的安装结构体的过去制造过程的一个例子的纵向剖面图。
图9是从正面来看的过去半导体芯片的安装结构体的一个例子的纵向剖面图。
具体实施方式
下表面，参照附图来说明关于本发明的最佳实施形态。
(实施形态1)
图1是从正面来看的与本发明的实施形态1相关的半导体芯片的双面安装结构体的纵向剖面图。如图1所示，在用玻璃纤维或芳香族聚酰胺纤维和环氧树脂构成的树脂多层电路基板1的上表面1a上，采用SBB(Stud Bump Bonding，凸点焊接)和ACF(Anisotropic Conductive Film，各向异性导电薄膜)等的倒装芯片安装技术来安装半导体芯片4。然后，在其背面即下表面1b上，同样安装半导体芯片5。用上表面和下表面焊盘2a、2b、以及第1和第2凸点8a、8b对半导体芯片4和基板上表面1a之间、以及半导体芯片5和基板下表面1b之间进行电和机械的接合，这些焊盘2a、2b和凸点8a、8b的基板上表面1a侧的部分和基板下表面1b侧的部分成为一对，这样进行安装，使得各个接合中心9通过基板1在上下方向上重合(一致)。总之，在实施形态1的半导体芯片的安装结构体中，如图1所示，其结构为具有：设置在基板上表面1a的多个上表面焊盘2a；夹住基板1并使其分别对应于各上表面焊盘2a、且设置在基板下表面1b上的多个下表面焊盘2b；具有与各上表面焊盘2a接合的多个第1凸点8a的第1半导体芯片4；以及具有与各下表面焊盘2b接合的多个第2凸点8b的第2半导体芯片5。
根据图2A～图3B来说明与实施形态1相关的半导体芯片的双面安装结构体的制造方法。图2A～图2D和图3A～图3B是表示采用倒装芯片安装技术、从正面来看在两面上安装半导体芯片的制造方法的纵向剖面图。
首先，如图2A所示，对于在上下表面1a、1b的电路中的多个固定位置上分别形成上表面焊盘2a和下表面焊盘2b的电路基板1，向它的上表面1a提供由环氧构成的热固化性粘接剂3。这时，提供热固化性粘接剂3，形成覆头上表面1a的上表面焊盘2a的状态。另一方面，如图2B所示，对于要安装的半导体芯片4，在设置在其一面上的电极焊盘7a上，对于该电极焊盘7a通过与这些原料熔合而形成合金并形成牢牢地固定着的凸点8a。在将该半导体芯片4吸附保持在真空吸附头10上并向电路基板1上运送之后，在将凸点8a与上表面焊盘2a位置对准的状态下，轻轻地压紧热固化性粘接剂3，如图2C所示，通过粘接剂3暂时固定在上表面1a上。
如图2D所示，在同一工序中将在上表面1a暂时固定上述半导体芯片4的电路基板1上下翻转之后，向面朝上的下表面1b上提供热固化性粘接剂3。然后，如图3A所示，向电路基板1的下表面1b上运送吸附保持在真空吸附头10上的其它半导体芯片5。然后，配置基板上表面1a侧的半导体芯片4的各接合中心9与基板下表面1b侧的半导体芯片5的各接合中心9，使其相互重合(一致)，在位置对准的状态下轻轻地压紧热固化性粘接剂3，使得半导体芯片4和半导体芯片5夹住电路基板1相对，并通过粘接剂3分别暂时固定在基板的上下表面1a、1b上。
将如上所述那样在基板的上下表面1a、1b分别固定半导体芯片4、5的电路基板1，向下表面的工序运送，如图3B所示，从电路基板1的上下两方向通过加压加热头11压紧暂时固定在电路基板1的上下表面1a、1b上的2个半导体芯片4、5约30秒钟，并进行加热。在该加压工序中，因为基板上表面1a的上表面焊盘2a和凸点8a的接合体、以及基板下表面1b的下表面焊盘2b和凸点8b的接合体分别设置在夹住基板1的对应的位置上，所以该加压方向通过基板1在上下方向上与接合中心9一致，使来自基板1的上下方向的施压负载相抵消。通过该施压相抵消，则在电路基板1和上表面焊盘2a、以及下表面焊盘2b中不会发生弯曲变形，能够在电路基板1上安装半导体芯片4、5。而且，同时将向电路基板1的上下两安装面1a、1b提供的热固化性粘接剂3进行热固化并收缩，利用该收缩力，使2个半导体芯片4、5的整个芯片向电路基板1的对应的安装面1a、1b拉紧，分别压接第1及第2凸点8a、8b和与其对应的上表面及下表面焊盘2a、2b，进行电连接。另外，各半导体芯片4、5利用充满电路基板1的对应的安装面1a、1b的全部空隙中并热固化了的粘接剂3牢牢地固定在安装面1a、1b上。通过这样，能够实现如图1所示的安装结构体。
另外，在上述半导体芯片的安装结构体中，作为安装形态也可以不是倒装芯片安装，而是利用正面向上的裸片安装。另外，作为制造方法也可以不是依次安装上表面1a和下表面1b的方法，而是同时安装两面的方式。
(实施形态2)
下表面，参照图4来说明与实施形态2相关的半导体芯片的双面安装结构体。另外，对于与在实施形态1中说明了的构件相同的构件，标有相同的参照标号，只主要地详细说明不同部分。在实施形态1的半导体芯片的安装结构体中，是形成设置在第1半导体芯片4和第2半导体芯片5上的全部电极焊盘7a、7b是通过上表面焊盘2a和第1凸点8a或者下表面焊盘2b和第2凸点8b之间与基板1连接的结构。但是，根据不同的布线图形，也存在着不与布线连接的电极焊盘(非导通焊盘)。在本实施形态中，第1半导体芯片4的非导通焊盘7c和第2半导体芯片5的非导通焊盘7d相当于此。这里，在不与布线连接的非导通焊盘7c、7d和基板1之间没有设置凸点和焊盘、并从基板的上下方向施加压力负载的情况下，在只在基板1的任何一侧的表面上存在凸点和焊盘的地方，由于来自基板1的上下方向的施压负载产生差别，而可能使基板1产生很大的弯曲变形。因此，通过在非导通焊盘7c、7d和基板1之间设置与安装结构体的功能动作上无关的隔件，能够使来自基板1的上下方向的施加负载相抵消，从而能够抑制基板1的弯曲变形。
在图4所示的例子中，在非导通焊盘7c和基板1之间设置作为隔件的空焊盘20和空凸点18，同样地在非导通焊盘7d和基板1之间也设置作为隔件的空焊盘20和空凸点18。基板下表面1b侧的空焊盘20设置在通过基板1与上表面焊盘2a对应的位置上，基板上表面1a侧的空焊盘20设置在通过基板1与下表面焊盘2b对应的位置上。空焊盘20和空凸点18虽然与安装结构体的功能动作无关，但因为空焊盘20与上表面和下表面焊盘2a、2b的结构、原料相同，且空凸点18与第1和第2凸点8a、8b的结构、原料相同，而且由于在加热加压过程中均匀地压接，因此不会产生位置偏移和变形等问题。这样如果是在非导通焊盘7c、7d和基板1之间设置隔件的结构，则因为第1半导体芯片4侧的各接合中心9和第2半导体芯片5侧的各接合中心9分别夹住基板1并进行对准位置，使其互相对应并重合(一致)，所以在半导体芯片的双面安装结构体的制造过程中的加热加压时，使来自基板1上下方向的施压负载相抵消，能够抑制电路基板1、上表面焊盘2c和下表面焊盘2d的变形，不会产生电路基板1的断线和凸点8a、8b的接合高度偏差。因此，能够得到连接可靠性高的安装结构体。
另外，在上述例子中，作为隔件的一个例子是说明了采用空凸点18和空焊盘20的组合的结构，但是除此之外，若采用只使用空焊盘20且将通常的凸点8a、8b与它接合的结构，或者采用将空凸点18与通常的上表面和下表面焊盘2a、2b接合的结构，也能够得到相同的效果。
(实施形态3)
然后，参照图5来说明与实施形态3相关的半导体芯片的双面安装结构体。另外，对于与先前说明了的构件相同的构件，标有相同的参照标号，只主要地详细说明不同部分。在图5所示的例子中，在第1半导体芯片4上设置1个位置的非导通焊盘7c，在第2半导体芯片5上也设置1个位置的非导通焊盘7d。这里与实施形态2的最大差别在于，在通过基板1而相互对应的位置上具有能够与相邻的多个凸点(8a、18或者8b、18)接合的宽度大的上表面焊盘2c和下表面焊盘2d。在基板上表面1a侧，宽度较宽的上表面焊盘2c与空凸点18及第1凸点8a接合，在基板下表面1b侧，宽度较宽的下表面焊盘2d与空凸点18及第2凸点8b接合。这里，空凸点18虽然设置作为与安装结构体的功能动作无关的隔件，但是因为与第1和第2凸点8a、8b的结构、原料相同，而且由于在加热加压过程中均匀地压接，因此不会产生位置偏移和变形等问题。即使设置这样能够与相邻的多个凸点(8a、18或者8b、18)接合的宽度大的焊盘2c、2d，也因为宽度较宽的上表面焊盘2c和下表面焊盘2d设置在通过基板1相互对应的位置上，且在非导通焊盘7c、7d与基板1之间设置隔件即空凸点18，而且由于第1半导体芯片4侧的接合中心9和第2半导体芯片5侧的接合中心9分别夹住基板1并进行对准位置，使其互相对应并重合(一致)，所以在半导体芯片的双面安装结构体的制造过程中的加热加压时，使来自基板1的上下方向的施压负载相抵消，能够抑制电路基板1、上表面焊盘2c和下表面焊盘2d的变形，不会产生电路基板1的断线和凸点8a、8b的接合高度偏差。因此，能够得到连接可靠性高的安装结构体。
(实施形态4)
接着，参照图6来说明与实施形态4相关的半导体芯片的双面安装结构体。另外，对于与先前说明了的构件相同的构件，标有相同的参照标号，只主要地详细说明不同部分。图6是从正面来看的与实施形态4相关的半导体芯片的双面安装结构体的纵向剖面图，在第1半导体芯片4上设置1个位置的非导通焊盘7c，在第2半导体芯片5上也设置1个位置的非导通焊盘7d。虽然将空凸点18作为隔件与这些非导通焊盘7c、7d接合，但是与上述实施形态的区别在于，空凸点18不通过上表面和下表面焊盘2a、2b、2c、2d或者空凸点20(参照图4、图5)，而是直接地接合在基板1上。这样，即使采用只设置与安装结构体的功能动作无关的空凸点18作为隔件，但因为夹住基板1而对应的各接合中心9进行对准位置，使其夹住基板1并相互重合(一致)，所以在半导体芯片的双面安装结构体的制造过程中的加热加压时，也使来自基板1的上下方向的施压负载相抵消，能够抑制电路基板1、上表面焊盘2a和下表面焊盘2b的变形，不会产生电路基板1的断线和凸点8a、8b的接合高度偏差。因此，能够得到连接可靠性高的安装结构体。
(实施形态5)
接着，参照图7来说明与实施形态5相关的半导体芯片的双面安装结构体。另外，对于与先前说明了的构件相同的构件，标有相同的参照标号，只主要地详细说明不同部分。图7是从正面来看的与本发明的实施形态5相关的半导体芯片的双面安装结构体的纵向剖面图。在图7的左侧，在基板上表面1a上设置2个相互靠得很近的上表面焊盘2a，在基板下表面1b上设置1个下表面焊盘2b。在图7的右侧，在基板上表面1a上设置1个上表面焊盘2a，在基板下表面1b上设置2个相互靠得很近的下表面焊盘2b。另外，在第1半导体芯片4上，电极焊盘7a设置在与基板1的各上表面焊盘2a对应的位置上，在第2半导体芯片5上，电极焊盘7b设置在与基板1的各下表面焊盘2b对应的位置上。然后，在第1半导体芯片4的电极焊盘7a和上表面焊盘2a之间接合第1凸点8a，在第2半导体芯片5的电极焊盘7b和下表面焊盘2b之间接合第2凸点8b。这里重点在于：在基板1的左侧，对2个上表面焊盘2a之间的中间点、第1半导体芯片4的2个电极焊盘7a之间的中间点、下表面焊盘2b的宽度方向中心、以及第2半导体芯片5的电极焊盘7b的宽度方向中心进行对准位置，使它们在图示的接合线20上重合(一致)，在基板1的右侧，对上表面焊盘2a的宽度方向中心、第1半导体芯片4的电极焊盘7a的宽度方向中心、2个下表面焊盘2b之间的中间点、以及第2半导体芯片5的2个电极焊盘7b之间的中间点进行对准位置，使它们在图示的接合线20上重合(一致)。
这样如果是采用在确保来自基板1的上下方向的施压负载为力学平衡的范围内、设置上表面焊盘2a和下表面焊盘2b的结构，则即使不是在夹住基板1而对应的位置上、互相的接合中心重合(一致)的结构，在半导体芯片的双面安装结构体的制造过程中的加热加压时，也能够使来自基板1的上下方向的施压负载相抵消，能够抑制电路基板1、上表面焊盘2a和下表面焊盘2b的变形，不会产生电路基板1的断线和凸点8a、8b的接合高度偏差，能够得到连接可靠性高的安装结构体。另外，在本实施形态中，虽然仅详细地说明了图7所示的结构，但是并不仅限于这个，也可以是这样的结构：例如分别在基板上表面1a侧的左右两端上设置2个相互靠得很近的上表面焊盘2a，并分别在基板下表面1b侧的左右两端上设置1个下表面焊盘2b，使它们的宽度方向中心与夹住基板1而对应的位置上的2个上表面焊盘2a之间的中间点在接合线20上重合(一致)。而且，结构也可以是：分别在基板上表面1a侧的左右两端上设置2个互相靠得很近的上表面焊盘2a，分别在基板下表面1b侧的左右两端上设置3个下表面焊盘2b，使这3个下表面焊盘2b的整体的宽度方向中心与夹住基板1而对应的位置上的2个上表面焊盘2a之间的中间点在接合线20上重合(一致)。
另外，在上述实施形态中，是说明了使用由玻璃纤维或者芳香族聚酰胺纤维和环氧树脂构成的树脂多层电路基板1的例子，但是也能够使用其它加入填充剂的硬质型多层电路基板1，填充剂的一个例子是使用以实施界面控制的金属氢氧化物为主的无机填充物。如果使用加入填充剂的硬质型基板，则能够使其厚度薄到0.15～0.10mm的程度，而且更能够薄到0.04mm的程度。因此，能够实现具有适当的强度并小型化·薄型化·轻量化良好的结构。
工业上的实用性
如上所述，如果采用本发明的安装结构体，则从基板的上下方向对着基板对第1半导体芯片和第2半导体芯片进行加热加压时，因为该压紧施压方向通过基板在上下方向上一致，能够使两施压负载相抵消，所以能够实现防止半导体芯片安装时的基板电极和电路基板的弯曲变形。另外，因为不会发生基板的断线和接合高度偏差，且能够实现在两面上安装半导体芯片、具有高连接可靠性的双面裸IC的安装结构体，所以适用于和半导体芯片尺寸相同进行封装的CSP(芯片级封装)和将多个半导体芯片安装在电路基板上的MCM(多芯片组件)等的电子元器件的安装结构体。

Claims (10)

1.一种半导体芯片的安装结构体，其特征在于，
具有：
设置在基板上表面(1a)上的多个上表面焊盘(2a)；夹住基板(1)并使其分别与上表面焊盘(2a)对应且设置在基板下表面(1b)上的多个下表面焊盘(2b)；有与所述上表面焊盘(2a)接合的第1凸点(8a)的第1半导体芯片(4)；以及有与所述下表面焊盘(2b)接合的第2凸点(8b)的第2半导体芯片(5)。
2.如权利要求1中所述的半导体芯片的安装结构体，其特征在于，
在对应于接合第1凸点(8a)的上表面焊盘(2a)的下表面焊盘(2b)上接合第2凸点(8b)。
3.如权利要求1中所述的半导体芯片的安装结构体，其特征在于，
在所述半导体芯片(4、5)上设置不与布线电路连接的非导通焊盘(7c、7d)，并在该非导通焊盘(7c、7d)和基板1之间接合隔件。
4.如权利要求3中所述的半导体芯片的安装结构体，其特征在于，
所述隔件由空凸点(18)、或者空焊盘(20)、或者空凸点(18)和空焊盘(20)的组合构成。
5.如权利要求1中所述的半导体芯片的安装结构体，其特征在于，
基板(1)是厚度为0.15mm以下的加入填充剂的硬质型基板。
6.一种半导体芯片的安装结构体的制造方法，其特征在于，
在具有设置在基板上表面(1a)上的多个上表面焊盘(2a)、以及夹住基板(1)并使其分别与上表面焊盘(2a)对应且设置在基板下表面(1b)上的多个下表面焊盘(2b)的基板上，暂时固定具有接合第1凸点(8a)的多个电极焊盘(7a)的第1半导体芯片(4)，并对各第1凸点(8a)与各上表面焊盘(2a)进行对准位置，同时在基板(1)上暂时固定具有接合第2凸点(8b)的多个电极焊盘(7b)的第2半导体芯片(5)，并对各第2凸点(8b)与各下表面焊盘(2b)进行对准位置，再分别向着基板(1)对所述第1和第2半导体芯片(4、5)进行加压并加热。
7.一种半导体芯片的安装结构体，其特征在于，
该半导体芯片的安装结构体具有：
含有多个电极焊盘(7a)和不与布线电路连接的非导通焊盘(7c)的第1半导体芯片(4)；含有多个电极焊盘(7b)和不与布线电路连接的非导通焊盘(7d)的第2半导体芯片(5)；以及具有设置在与所述第1半导体芯片(4)的电极焊盘(7a)对应的位置上的上表面焊盘(2a)、和设置在与所述第2半导体芯片(5)的电极焊盘(7b)对应的位置上的下表面焊盘(2b)的基板(1)，
用第1凸点(8a)接合所述上表面焊盘(2a)和电极焊盘(7a)，并用第2凸点(8b)接合所述下表面焊盘(2b)和电极焊盘(7b)，
用空凸点18接合非导通焊盘(7c、7d)和基板(1)。
8.一种半导体芯片的安装结构体的制造方法，其特征在于，
对第1凸点(8a)与基板上表面(1a)的上表面焊盘(2a)进行对准位置、并暂时固定具有接合第1凸点(8a)的多个电极焊盘(7a)和接合空凸点(18)的不与布线电路连接的非导通焊盘(7c)的第1半导体芯片(4)，同时对第2凸点(8b)与基板下表面的下表面焊盘(2b)进行对准位置、并暂时固定具有接合第2凸点(8b)的多个电极焊盘(7b)和接合空凸点(18)的不与布线电路连接的非导通焊盘(7d)的第2半导体芯片(5)，再分别向着基板(1)对所述第1和第2半导体芯片(4、5)施加压力并加热，使与非导通焊盘(7c、7d)接合的空凸点(18)直接与基板接合。
9.一种半导体芯片的安装结构体，其特征在于，
该半导体芯片的安装结构体具有：
在一端侧相邻具有2个电极焊盘(7a)、而在另一端侧上具有1个电极焊盘(7a)的第1半导体芯片(4)；在一端侧具有1个电极焊盘(7b)、而在另一端侧上相邻具有2个电极焊盘(7b)的第2半导体芯片；以及具有设置在与所述第1半导体芯片(4)的电极焊盘(7a)相对应的位置上的上表面焊盘(2a)和设置在与所述第2半导体芯片(5)的电极焊盘(7b)相对应的位置上的下表面焊盘(2b)的基板(1)，
用第1凸点(8a)接合所述上表面焊盘(2a)和电极焊盘(7a)，并用第2凸点(8b)接合所述下表面焊盘(2b)和电极焊盘(7b)，
在基板(1)的一端侧上，基板上表面(1a)侧的2个电极焊盘(7a)和各上表面焊盘(2a)的中间点、与基板下表面(1b)侧的电极焊盘(7b)和下表面焊盘(2b)的宽度方向中心在相对于基板(1)的垂直线上一致；
在基板(2)的另一端侧上，基板上表面(1a)侧的电极焊盘(7a)和上表面焊盘(2a)的宽度方向中心、与基板下表面(1b)侧的2个电极焊盘(7b)和各下表面焊盘(2b)的中间点在相对于基板(1)的垂直线上一致。
10.一种半导体芯片的安装结构体的制造方法，其特征在于，
对第1凸点(8a)与基板上表面(1a)的上表面焊盘(2a)进行对准位置、并暂时固定一端侧相邻具有与第1凸点接合(8a)的2个电极焊盘(7a)、以及在另一端侧具有与第1凸点(8a)接合的1个电极焊盘(7a)的第1半导体芯片(4)，同时对第2凸点(8b)与基板下表面(1b)的下表面焊盘(2b)进行对准位置、并暂时固定一端侧具有与第2凸点(8b)接合的1个电极焊盘(7b)、以及在另一端侧相邻具有与第2凸点(8b)接合的2个电极焊盘(7b)的第2半导体芯片，分别向着基板(1)对所述第1和第2半导体芯片(4、5)施加压力并加热，在基板(1)的一端侧，使基板上表面(1a)侧的2个电极焊盘(7a)和上表面焊盘(2a)之间的中间点、以及基板下表面(1b)侧的电极焊盘(7b)和下表面焊盘(2b)的宽度方向中心对于基板(1)在直交的线上一致，
在基板(2)的另一端侧，基板的上表面(1a)侧的电极焊盘(7a)和上表面焊盘(2a)的宽度方向中心、与基板下表面(1b)侧的2个电极焊盘(7b)和下表面焊盘(2b)的中间点在相对于基板(1)的垂直线上一致。
在基板(2)的另一端侧，使基板上表面(1a)侧的电极焊盘(7a)和上表面焊盘(2a)的宽度方向中心、以及基板下表面(1b)侧的2个电极焊盘(7b)和下表面焊盘(2b)之间的中间点对于基板(1)在直交的线上一致。
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