CN101040374A - 具有前侧接触和垂直沟槽隔离的半导体器件及其制作方法 - Google Patents
具有前侧接触和垂直沟槽隔离的半导体器件及其制作方法 Download PDFInfo
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- CN101040374A CN101040374A CNA2005800353341A CN200580035334A CN101040374A CN 101040374 A CN101040374 A CN 101040374A CN A2005800353341 A CNA2005800353341 A CN A2005800353341A CN 200580035334 A CN200580035334 A CN 200580035334A CN 101040374 A CN101040374 A CN 101040374A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000004065 semiconductor Substances 0.000 title claims description 59
- 238000002955 isolation Methods 0.000 title abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000012212 insulator Substances 0.000 claims abstract description 16
- 238000011049 filling Methods 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims abstract description 9
- 239000012774 insulation material Substances 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 5
- 239000002019 doping agent Substances 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 5
- 239000011810 insulating material Substances 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 6
- 229920005591 polysilicon Polymers 0.000 abstract description 5
- 238000011065 in-situ storage Methods 0.000 abstract description 2
- 230000000873 masking effect Effects 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 239000004020 conductor Substances 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 5
- 235000012239 silicon dioxide Nutrition 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000012811 non-conductive material Substances 0.000 description 2
- HCOLPNRPCMFHOH-UHFFFAOYSA-N Prodigiosin Natural products CCCCCC1C=C(C=C/2N=C(C=C2OC)c3ccc[nH]3)N=C1C HCOLPNRPCMFHOH-UHFFFAOYSA-N 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- TWFGRJUTAULJPZ-USZBIXTISA-N prodigiosin Chemical compound N1=C(C)C(CCCCC)=C\C1=C/C1=NC(C=2[N]C=CC=2)=C[C]1OC TWFGRJUTAULJPZ-USZBIXTISA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (9)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04105047 | 2004-10-14 | ||
EP04105047.7 | 2004-10-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101040374A true CN101040374A (zh) | 2007-09-19 |
CN100524688C CN100524688C (zh) | 2009-08-05 |
Family
ID=35457758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005800353341A Expired - Fee Related CN100524688C (zh) | 2004-10-14 | 2005-10-13 | 具有前侧接触和垂直沟槽隔离的半导体器件及其制作方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7651921B2 (zh) |
EP (1) | EP1803153A1 (zh) |
JP (1) | JP2008517457A (zh) |
KR (1) | KR20070063585A (zh) |
CN (1) | CN100524688C (zh) |
TW (1) | TW200629466A (zh) |
WO (1) | WO2006040738A1 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102376618A (zh) * | 2010-08-26 | 2012-03-14 | 上海华虹Nec电子有限公司 | N型射频ldmos中多晶硅p型沉阱的制造方法 |
CN102986021A (zh) * | 2010-07-19 | 2013-03-20 | 国际商业机器公司 | 制造隔离电容器的方法及其结构 |
US8907382B2 (en) | 2008-06-30 | 2014-12-09 | Vanguard International Semiconductor Corporation | Semiconductor device and fabrication method thereof |
CN113113485A (zh) * | 2020-01-13 | 2021-07-13 | 中芯国际集成电路制造(天津)有限公司 | 半导体器件及其形成方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005010944B4 (de) * | 2005-03-10 | 2009-09-10 | X-Fab Semiconductor Foundries Ag | Verfahren zur Herstellung eines Trägerscheibenkontaktes in integrierten Schaltungen mit Hochspannungsbauelementen auf der Basis der SOI-Technologie und integrierte Schaltungen mit entsprechenden Grabenstrukturen |
US7638376B2 (en) * | 2007-01-12 | 2009-12-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming SOI device |
DE102007041407A1 (de) * | 2007-08-31 | 2009-03-05 | Atmel Germany Gmbh | Verfahren zur Herstellung einer Halbleiteranordnung, Verwendung einer Grabenstruktur und Halbleiteranordnung |
US8680617B2 (en) * | 2009-10-06 | 2014-03-25 | International Business Machines Corporation | Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS |
KR20220013819A (ko) | 2020-07-27 | 2022-02-04 | 에스케이하이닉스 주식회사 | 반도체 장치 및 반도체 장치의 제조 방법 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3189456B2 (ja) | 1992-03-09 | 2001-07-16 | 富士電機株式会社 | Soi半導体装置 |
US6653733B1 (en) * | 1996-02-23 | 2003-11-25 | Micron Technology, Inc. | Conductors in semiconductor devices |
US5767012A (en) * | 1996-06-05 | 1998-06-16 | Advanced Micro Devices, Inc. | Method of forming a recessed interconnect structure |
US5929508A (en) * | 1998-05-21 | 1999-07-27 | Harris Corp | Defect gettering by induced stress |
JP2000164830A (ja) * | 1998-11-27 | 2000-06-16 | Mitsubishi Electric Corp | 半導体記憶装置の製造方法 |
JP4066574B2 (ja) * | 1999-03-04 | 2008-03-26 | 富士電機デバイステクノロジー株式会社 | 半導体装置の製造方法 |
TW451425B (en) * | 2000-05-16 | 2001-08-21 | Nanya Technology Corp | Manufacturing method for memory cell transistor |
JP3510576B2 (ja) * | 2000-09-28 | 2004-03-29 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
KR100379612B1 (ko) * | 2000-11-30 | 2003-04-08 | 삼성전자주식회사 | 도전층을 채운 트렌치 소자 분리형 반도체 장치 및 그형성 방법 |
KR100522756B1 (ko) * | 2002-09-17 | 2005-10-24 | 주식회사 하이닉스반도체 | 크롬이 함유된 확산장벽층을 구비하는 반도체소자 및 그제조 방법 |
US6928879B2 (en) * | 2003-02-26 | 2005-08-16 | Robert Bosch Gmbh | Episeal pressure sensor and method for making an episeal pressure sensor |
US7230312B2 (en) * | 2003-12-31 | 2007-06-12 | Micron Technology, Inc. | Transistor having vertical junction edge and method of manufacturing the same |
EP1585171A1 (en) * | 2004-04-07 | 2005-10-12 | Andrea Pizzarulli | An SOI circuit having reduced crosstalk interference and a method for forming the same |
US20090114964A1 (en) * | 2007-11-05 | 2009-05-07 | Chang-Hun Han | Image sensor and method for manufacturing the same |
-
2005
- 2005-10-11 TW TW094135411A patent/TW200629466A/zh unknown
- 2005-10-13 JP JP2007536335A patent/JP2008517457A/ja not_active Withdrawn
- 2005-10-13 KR KR1020077010571A patent/KR20070063585A/ko not_active Application Discontinuation
- 2005-10-13 WO PCT/IB2005/053369 patent/WO2006040738A1/en active Application Filing
- 2005-10-13 CN CNB2005800353341A patent/CN100524688C/zh not_active Expired - Fee Related
- 2005-10-13 EP EP05790176A patent/EP1803153A1/en not_active Withdrawn
- 2005-10-13 US US11/577,313 patent/US7651921B2/en active Active
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8907382B2 (en) | 2008-06-30 | 2014-12-09 | Vanguard International Semiconductor Corporation | Semiconductor device and fabrication method thereof |
CN102986021A (zh) * | 2010-07-19 | 2013-03-20 | 国际商业机器公司 | 制造隔离电容器的方法及其结构 |
CN102986021B (zh) * | 2010-07-19 | 2015-01-21 | 国际商业机器公司 | 制造隔离电容器的方法及其结构 |
CN102376618A (zh) * | 2010-08-26 | 2012-03-14 | 上海华虹Nec电子有限公司 | N型射频ldmos中多晶硅p型沉阱的制造方法 |
CN102376618B (zh) * | 2010-08-26 | 2013-10-23 | 上海华虹Nec电子有限公司 | N型射频ldmos中多晶硅p型沉阱的制造方法 |
CN113113485A (zh) * | 2020-01-13 | 2021-07-13 | 中芯国际集成电路制造(天津)有限公司 | 半导体器件及其形成方法 |
CN113113485B (zh) * | 2020-01-13 | 2023-03-21 | 中芯国际集成电路制造(天津)有限公司 | 半导体器件及其形成方法 |
Also Published As
Publication number | Publication date |
---|---|
US7651921B2 (en) | 2010-01-26 |
CN100524688C (zh) | 2009-08-05 |
KR20070063585A (ko) | 2007-06-19 |
JP2008517457A (ja) | 2008-05-22 |
WO2006040738A1 (en) | 2006-04-20 |
US20070262411A1 (en) | 2007-11-15 |
TW200629466A (en) | 2006-08-16 |
EP1803153A1 (en) | 2007-07-04 |
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Owner name: NXP CO., LTD. Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V. Effective date: 20080328 |
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