CN100580807C - 半导体存储器件 - Google Patents

半导体存储器件 Download PDF

Info

Publication number
CN100580807C
CN100580807C CN200610141488A CN200610141488A CN100580807C CN 100580807 C CN100580807 C CN 100580807C CN 200610141488 A CN200610141488 A CN 200610141488A CN 200610141488 A CN200610141488 A CN 200610141488A CN 100580807 C CN100580807 C CN 100580807C
Authority
CN
China
Prior art keywords
signal
local line
voltage
data
latch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200610141488A
Other languages
English (en)
Chinese (zh)
Other versions
CN1941187A (zh
Inventor
金东槿
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of CN1941187A publication Critical patent/CN1941187A/zh
Application granted granted Critical
Publication of CN100580807C publication Critical patent/CN100580807C/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
CN200610141488A 2005-09-29 2006-09-29 半导体存储器件 Expired - Fee Related CN100580807C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR20050091545 2005-09-29
KR91545/05 2005-09-29
KR49003/06 2006-05-30

Publications (2)

Publication Number Publication Date
CN1941187A CN1941187A (zh) 2007-04-04
CN100580807C true CN100580807C (zh) 2010-01-13

Family

ID=37959249

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200610141488A Expired - Fee Related CN100580807C (zh) 2005-09-29 2006-09-29 半导体存储器件

Country Status (3)

Country Link
KR (1) KR100772721B1 (ko)
CN (1) CN100580807C (ko)
TW (1) TWI310566B (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100939118B1 (ko) * 2008-06-30 2010-01-28 주식회사 하이닉스반도체 상 변화 메모리 소자의 쓰기 드라이버
JP5760829B2 (ja) * 2011-08-09 2015-08-12 富士通セミコンダクター株式会社 スタティックｒａｍ
KR101882854B1 (ko) * 2011-12-21 2018-07-31 에스케이하이닉스 주식회사 데이터 전달회로 및 이를 포함하는 반도체 메모리 장치
KR102166731B1 (ko) * 2013-05-31 2020-10-16 에스케이하이닉스 주식회사 데이터 전달회로 및 이를 포함하는 메모리

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100402246B1 (ko) * 2000-10-25 2003-10-17 주식회사 하이닉스반도체 반도체 메모리 소자 및 그의 쓰기 구동 방법
KR20040102238A (ko) * 2003-05-27 2004-12-04 삼성전자주식회사 개선된 라이트 드라이버를 갖는 반도체 메모리 장치
KR100502667B1 (ko) * 2003-10-29 2005-07-21 주식회사 하이닉스반도체 반도체 메모리 장치의 라이트 드라이버

Also Published As

Publication number Publication date
TWI310566B (en) 2009-06-01
KR100772721B1 (ko) 2007-11-02
KR20070036632A (ko) 2007-04-03
TW200717537A (en) 2007-05-01
CN1941187A (zh) 2007-04-04

Similar Documents

Publication Publication Date Title
KR100755370B1 (ko) 반도체 메모리 장치
US8559254B2 (en) Precharging circuit and semiconductor memory device including the same
JP4285511B2 (ja) 半導体メモリデバイス
US8971133B1 (en) Memory device and method of operation of such a memory device
US7675798B2 (en) Sense amplifier control circuit and semiconductor device using the same
US20060104119A1 (en) Local input/output line precharge circuit of semiconductor memory device
US20150120997A1 (en) Semiconductor device including repeater circuit for main data line
KR20010103564A (ko) 소비 전력이 감소되고 시험 시간이 단축된 반도체 기억 장치
CN100580807C (zh) 半导体存储器件
US8085614B2 (en) Source control circuit and semiconductor memory device using the same
JP2013093094A (ja) マルチバンクメモリデバイスのメモリバスアウトプットドライバ及びそのための方法
US10102900B2 (en) Memory device with separate read active signal and write active signal having different activation periods used for word line selection during read and write operation
US20070070777A1 (en) Semiconductor memory device
KR100599213B1 (ko) 입출력 라인 프리차지 회로, 이를 구비한 반도체 메모리장치, 및 입출력 라인 프리차지 방법
US6373782B1 (en) Semiconductor device with reduced error operation caused by threshold voltage variation
TW475172B (en) Dynamic memory device performing stress testing
KR20000009375A (ko) 기입 시간을 최소화하는 메모리장치 및 데이터 기입방법
CN108604458B (zh) 共享感测放大器
JP2000339965A (ja) ローデコーダ及びカラムデコーダを有する半導体メモリ装置
TW309615B (en) Semiconductor memory device
US7986577B2 (en) Precharge voltage supplying circuit
US7764557B2 (en) Sense amplifier driving circuit and semiconductor device having the same
US8913452B2 (en) Semiconductor device and semiconductor memory device
KR100876807B1 (ko) 반도체 메모리 장치
JP2001023375A (ja) メモリ装置及びこれのデータ書き込み及び読み出し方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100113

Termination date: 20160929