CN100482032C - 具有嵌入rf模块功率级电路的印刷电路板 - Google Patents
具有嵌入rf模块功率级电路的印刷电路板 Download PDFInfo
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Abstract
在此公开了一种具有嵌入RF模块功率级电路的印刷电路板。特别的,本发明涉及一种具有嵌入RF模块功率级电路的印刷电路板,其中在多层线路板的电源层上定义或者形成电阻、磁珠或者电感的终端板以将所述电阻、磁珠或者电感连接到所述电源层,并且所述电阻、磁珠或者电感通过使用穿孔或者垂直嵌入所述电阻、磁珠或者电感到电源层而与去耦电容并联,从而减小所述RF模块的尺寸并且提高其性能。
Description
技术领域
本发明一般的涉及一种具有嵌入RF模块功率级电路的印刷电路板(PCB),并且尤其涉及一种具有嵌入RF模块功率级电路的PCB,其中在多层线路板的电源层上定义或者形成电阻、磁珠(bead)或者电感的终端板以将所述电阻、磁珠或者电感连接到所述电源层,并且所述电阻、磁珠或者电感通过使用穿孔或者垂直嵌入所述电阻、磁珠或者电感到电源层而与去耦电容并联,从而减小所述RF模块的尺寸并且提高其性能。
背景技术
为了适应近年来电子工业的发展以满足电子产品微型化和高度功能化的需求,电子技术发展为将电阻、电容以及IC(集成电路)插入到基底内。
尽管至今仍然将分散的芯片电阻或者分散的芯片电容安装在PCB表面,但是近年来一直在研究将无源设备例如电阻或者电容嵌入PCB的技术。
也就是说,制造嵌入无源设备的PCB的技术将通过使用新的材料和工艺将无源设备插入PCB的外层或者内层,而取代传统的芯片电阻或者芯片电容。
在嵌入无源设备的PCB中,其中无源设备插入到PCB的外层或者内层,当无源设备被包含为PCB的一部分而不管PCB的尺寸时,它被称为“嵌入无源设备”。这种基底被称为“嵌入无源设备PCB”、
嵌入无源设备PCB的最重要的特点是无源设备例如电阻或者电容等在PCB内部提供,而不需要将分散的无源设备安装在PCB的表面上。
根据近年来嵌入无源设备PCB的技术趋势,对在倒装芯片封装基底中实现嵌入去耦电容以生产高速产品的技术进行了深入研究。对此,在授权于Intel公司的美国专利No.6,407,929中公开了一种制造具有嵌入电容的倒装芯片基底的方法。
图1A至1K显示了专利授权于Intel公司的制造具有嵌入电容的倒装芯片基底的工艺。
图1A至1E显示了制造硅芯片电容的工艺,并且图1F至1K显示了通过在封装中安装电容而制造包含嵌入电容的封装基底的工艺。
如图1A所示,准备硅基底101,并且如图1B所示,在硅基底101上沉积钛或者氮化钛以形成势垒层(barrier layer)102。
如图1C所示,在势垒层102上沉积铂、钯或者AlSiCu以形成厚度为1~10μm的硅芯片电容下部电极103。
如图1E所示,使用与形成硅芯片电容的下部电极103相同的工艺在介电层104上形成硅芯片电容的上部电极105。
接着,在具有多个穿孔并且在其上沉积了导电材料的电子封装上安装厚度为30~150μm的硅芯片电容,然后形成绝缘层,从而制造具有嵌入硅芯片电容的倒装芯片封装。
也就是说,如图1F所示,提供了具有内部电子电路的倒装芯片封装基底,所述内部电子电路中形成了多个穿孔并且沉积了导电材料,并且在该倒装芯片封装基底上安装了硅芯片电容,如图1G所示。
在图1H中,在图1G中安装的硅芯片电容上形成厚度为80~150μm的绝缘层109。
在图1I中,对绝缘层109进行激光切割以形成直径为50~300μm的穿孔110。
在图1J中,为了电连接硅芯片电容的上部电极105,沉积导电材料112。图1K为显示使用积层(build-up)工艺的具有嵌入电容的电子封装的截面图。
除了授权于Intel公司的美国专利No.6,407,929之外,与嵌入无源设备PCB相关的传统技术还包括关于“layered ceramic part”的日本特开No.1995-115277,关于“high-frequency module and fabrication method thereof”的日本特开No.2002-344146,以及关于“printed circuit board”的日本专利特开No.2004-056144。
这些传统技术用于实现倒装芯片封装基底中的嵌入去耦电容以生产高速产品。然而,目前尚未很好的开发嵌入与去耦电容相关联的电阻或者磁珠以提高高度集成化的RF集成电路(RF IC)的功率级的性能的技术。
发明内容
为了解决现有技术中的上述问题,本发明的一个目标是提供一种嵌入与去耦电容相关联的电阻或者磁珠以提高高度集成化的RF IC的功率级的性能的PCB。
为了实现上述目标,本发明提供了一种具有嵌入RF模块功率级电路的PCB,包括电源层,该电源层形成于多层印刷电路板中,并包括与其电绝缘的连接板,并且连接到外部电源线;第一设备,其一个端子置于所述电源层的连接板上,并且其另一个端子置于所述电源层上;以及第二设备,形成在所述多层印刷电路板中,通过第一连接穿孔连接到所述第一设备,并且通过第二连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块。
同时,本发明提供了一种具有嵌入RF模块功率级电路的PCB,包括电源层,该电源层形成于多层印刷电路板中,连接到外部电源线,并且具有其内定义的连接板区域;第一设备,其一个端子置于所述电源层的连接板区域上,所述第一设备垂直于所述电源层设置;以及第二设备,形成在所述多层印刷电路板中,连接到所述第一设备的另一端子,并且通过连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块。
同时,本发明提供了一种具有嵌入RF模块功率级电路的PCB,包括电源层,该电源层形成于多层印刷电路板中,并包括与其电绝缘的连接板,并且连接到外部电源线;第一设备,其一个端子置于所述电源层的连接板上,并且其另一个端子置于所述电源层上;第二设备,形成在所述多层印刷电路板中,通过第一连接穿孔连接到所述第一设备,并且通过第二连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块;以及第三设备,形成在所述多层印刷电路板中,通过第三连接穿孔连接到所述第二设备,并且通过第四连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块。
同时,本发明提供了一种具有嵌入RF模块功率级电路的PCB,包括电源层,该电源层形成在多层印刷电路板中,连接到外部电源线,并且具有其内定义的连接板区域;第一设备,其一个端子置于所述电源层的连接板区域上,所述第一设备垂直于所述电源层设置;第二设备,形成在所述多层印刷电路板中,连接到所述第一设备的另一端子,并且通过第一连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块;以及第三设备,形成在所述多层印刷电路板中,通过第二连接穿孔连接到所述第二设备,并且通过第三连接穿孔连接到安装在所述多层印刷电路板中的RF IC模块。
附图说明
图1A至1K为显示专利授权于Intel公司的制造具有嵌入电容的倒装芯片基底的传统工艺的截面图;
图2A为显示根据本发明第一实施方式的具有嵌入RF模块功率级电路的PCB的截面图,并且图2B为图2A的等效电路图;
图3A为显示图2A的电源层的顶视平面图,并且图3B为显示图2B的接地层的顶视平面图;
图4A为显示根据本发明第二实施方式的具有嵌入RF模块功率级电路的PCB的截面图,并且图4B为图4A的等效电路图;
图5A为显示图4A的电源层的顶视平面图,并且图5B为显示图4B的接地层的顶视平面图;
图6A为显示根据本发明第三实施方式的具有嵌入RF模块功率级电路的PCB的截面图,并且图6B为图6A的等效电路图;以及
图7为显示图6A的电源层的顶视平面图。
具体实施方式
下面对本发明的优选实施方式进行详细描述。
组成RF(射频)模块的RF IC和基带IC通常实现为具有互不相同的功率级电路。也就是说,在RF IC的情况下,从防止振荡的角度来看,在单块芯片上集成的不同功率级之间耦合的高频抑制被认为是重要的设计工艺。
因此,与数字IC的功率级的结构不同,RF IC通过电阻或者磁珠实现了上述功能,并且进一步行使稳定DC偏移的功能并且作为RF扼流圈(choke)工作。
图2A为显示根据本发明第一实施方式的具有嵌入RF IC的RC功率级电路的PCB的截面图,并且图2B为图2A的等效电路图。
参考图2A,根据本发明第一实施方式的嵌入了RF IC的RC功率级电路的PCB具有形成为内部层的电源层210和接地层230。
如图2A和3A所示,在电源层210中形成多个连接板295a、295b、295c以隔离于电源层210。
这样,连接板295a、295b、295c可以通过蚀刻从电源层210去除环绕连接板295a、295b、295c的部分而形成。
同时,电阻260a、260b、260c的第一侧置于各个连接板295a、295b、295c上,并且其第二侧置于电源层210上。
为了将电阻260a、260b、260c连接到去耦电容231a、231b、231c,连接穿孔270a、270b、270c的第一侧连接到各个连接板295a、295b、295c,并且其第二侧通过接地层220的凹槽221a、221b、221c连接到去耦电容231a、231b、231c的各个上部电极230a、230b、230c,如图3B所示。
通过这种方式,当使用连接穿孔270a、270b、270c将电阻260a、260b、260c连接到去耦电容的上部电极230a、230b、230c时,去耦电容231a、231b、231c与电阻260a、260b、260c并联,如图2B中的等效电路图所示。
这样,各个去耦电容231a、231b、231c由接地层220、层积在接地层220上的具有高介电常数的绝缘层225以及在绝缘层225上形成的上部电极230a、230b、230c组成。当使用接地层220作为下部电极时,去耦电容231a、231b、231c的第一侧接地,如图2B所示。
三个去耦电容231a、231b、231c的上部电极230a、230b、230c通过连接穿孔280a、280b、280c分别连接到RF IC 250。
并且,连接穿孔280a、280b、280c将电阻260a、260b、260c连接到RF IC 250。因此,当去耦电容231a、231b、231c和电阻260a、260b、260c通过连接穿孔280a、280b、280c连接到RF IC 250时,去耦电容231a、231b、231c和电阻260a、260b、260c的并联点连接到RF IC 250的输入端子,如图2B所示。因此,图2A中的嵌入了多个电阻260a、260b、260c和去耦电容231a、231b、231c的PCB组成了图2B的等效电路。
图4A为显示根据本发明第二实施方式的具有嵌入RF IC的LC功率级电路的PCB的截面图,并且图4B为图4A的等效电路图。
参考图4A,根据本发明第二实施方式的嵌入了RF IC的LC功率级电路的PCB具有形成为内部层的电源层310和接地层330。这样,在电源层310中,定义了多个连接板区域395a、395b、395c,如图4A和5A所示。
与图2A所示的第一实施方式不同,根据第二实施方式,电感360a、360b、360c垂直于电源层310而形成,并且通过图5B中的接地层320的凹槽连接到去耦电容331a、331b、331c的上部电极330a、330b、330c,如图3B所示。
通过这种方式,当电感360a、360b、360c的第一侧连接到电源层310的各个连接板区域395a、395b、395c并且其第二侧连接到去耦电容331a、331b、331c的上部电极330a、330b、330c时,电感360a、360b、360c和去耦电容331a、331b、331c分别互相并联,如图4B中的等效电路图所示。
这样,各个去耦电容231a、231b、231c由接地层320、层积在接地层320上的具有高介电常数的绝缘层325以及在绝缘层325上形成的上部电极330a、330b、330c组成。当使用接地层320作为下部电极时,去耦电容331a、331b、331c的第一侧接地,如图4B所示。
三个去耦电容331a、331b、331c的上部电极330a、330b、330c通过连接穿孔380a、380b、380c连接到RF IC 350。
而且,连接穿孔380a、380b、380c分别将电感360a、360b、360c连接到RF IC 350。当去耦电容331a、331b、331c和电感360a、360b、360c通过连接穿孔380a、380b、380c连接到RF IC 350时,去耦电容331a、331b、331c和电感360a、360b、360c的并联点连接到RF IC 350的输入端子,如图4B所示。因此,图4A中的嵌入了电感360a、360b、360c和去耦电容331a、331b、331c的PCB组成了图4B的等效电路。
根据第二实施方式,与第一实施方式不同,与电源层310隔离的附加连接板并不是在电源层310中形成,并且电感360a、360b、360c垂直设置以形成电路。然而,如同在第一实施方式中,与电源层310隔离的附加连接板可以形成在电源层310中,并且电感360a、360b、360c的第一侧可以连接到附加连接板并且其第二侧可以连接到电源层310,从而形成电路。并且,在第一实施方式中,可以按照如下方式形成电路,即,使得附加连接板295a、295b、295c并不在电源层210中形成,并且电阻260a、260b、260c垂直于电源层210设置,如同第二实施方式一样。
图6A为显示根据本发明第三实施方式的具有嵌入RF功率级的PCB的截面图,并且图6B为图6A的等效电路图。
参考图6A,根据本发明第三实施方式的嵌入了RF IC的RC功率级电路的PCB由形成为内部层的第一接地层405、电源层410、第一去耦电容电源层420、第二接地层430以及第二去耦电容电源层440组成。
第一接地层405和第二接地层430通过连接穿孔475a、475b互相连接,从而保持相同的接地电压。
而且,在电源层410中形成多个连接板414a、414b、414c以隔离于电源层410,如图6A和图7所示。
这些连接板414a、414b、414c可以通过蚀刻从电源层410去除环绕连接板414a、414b、414c的部分而形成。
电感412a、412b、412c的第一侧置于各个连接板414a、414b、414c上,并且其第二侧置于电源层410上。
为了将电感412a、412b、412c连接到设置在第一去耦电容电源层420上的各个去耦电容422a、422b、422c的上部电极表面423a、423b、423c,连接穿孔470a、470b、470c的第一侧连接到各个连接板414a、414b、414c,并且其第二侧连接到去耦电容的上部电极423a、423b、423c。
通过这种方式,当使用连接穿孔470a、470b、470c将电感412a、412b、412c连接到去耦电容的上部电极423a、423b、423c时,去耦电容422a、422b、422c分别与电感412a、412b、412c并联,如图6B中的等效电路图所示。
这样,各个去耦电容422a、422b、422c由第一去耦电源层420、第二接地层430以及在第一去耦电源层420和第二接地层430之间形成的具有高介电常数的绝缘层425组成。
并且,第一去耦电容电源层420和第二去耦电容电源层440通过其他的连接穿孔472a、472b、472c互相连接,从而置于第二接地层430下方的去耦电容422a、422b、422c与置于第二接地层430上方的去耦电容437a、437b、437c并联,如图6B中的等效电路图所示。
置于第二接地层430上方的各个去耦电容437a、437b、437c包括第二接地层430、在第二接地层430上形成的具有高介电常数的绝缘层435以及在绝缘层435上形成的第二去耦电容电源层440的上部电极438a、438b、438c。这样,当使用第二接地层作为下部电极时,去耦电容437a、437b、437c的第一侧被接地,如图6B所示。
设置在第二接地层430下方的三个去耦电容422a、422b、422c的上部电极423a、423b、423c通过连接穿孔472a、472b、472c连接到RF IC 460。
设置在第二接地层430上方的三个去耦电容437a、437b、437c的上部电极438a、438b、438c通过连接穿孔474a、474b、474c连接到RF IC 460。
而且,连接穿孔472a、472b、472c将电感412a、412b、412c连接到RF IC 460。因此,当去耦电容422a、422b、422c和电感412a、412b、412c通过连接穿孔472a、472b、472c以及474a、474b、474c连接到RF IC 460时,去耦电容422a、422b、422c、437a、437b、437c和电感412a、412b、412c的并联点连接到RF IC 460的输入端,如图6B所示。因此,图6A中的嵌入了多个电感412a、412b、412c和去耦电容422a、422b、422c、437a、437b、437c的PCB组成了图6B的等效电路。
如上所述,本发明提供了一种嵌入了RF模块功率级电路的PCB。根据本发明,在RFIC周围设置的去耦电容、电阻、磁珠或者电感被嵌入到RF IC封装基底中,从而使得寄生电感最小化,产生了很高的功率级稳定性。
同时,根据本发明,在RF IC周围设置的去耦电容、电阻、磁珠或者电感被嵌入到RFIC封装基底中,从而减小了RF模块的尺寸。
尽管为了示例目的公开了本发明的优选实施方式,本领域技术人员可以理解,各种修改、添加和替换都是可能的,但是并不背离所附权利要求书中限定的本发明的范围和实质。
Claims (7)
1.一种具有嵌入RF模块功率级电路的印刷电路板,包括:
电源层,形成在多层印刷电路板中,该电源层包括与其电绝缘的连接板,并且该电源层连接到外部电源线;
第一设备,其一个端子置于所述电源层的连接板上,并且其另一个端子置于所述电源层上;以及
第二设备,形成在所述多层印刷电路板中,通过第一连接穿孔连接到所述第一设备,并且通过第二连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块。
2.一种具有嵌入RF模块功率级电路的印刷电路板,包括:
电源层,形成在多层印刷电路板中,连接到外部电源线,并且具有其内定义的连接板区域;
第一设备,其一个端子置于所述电源层的连接板区域上,所述第一设备垂直于所述电源层设置;以及
第二设备,形成在所述多层印刷电路板中,连接到所述第一设备的另一端子,并且通过连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块。
3.根据权利要求1所述的印刷电路板,其中所述第一设备为电阻。
4.根据权利要求1所述的印刷电路板,其中所述第一设备为电感。
5.根据权利要求1所述的印刷电路板,其中所述第二设备包括:
在所述多层印刷电路板中形成的第一电极;
层积在所述第一电极上的介电层;以及
在所述介电层上形成的第二电极。
6.一种具有嵌入RF模块功率级电路的印刷电路板,包括:
电源层,形成在多层印刷电路板中,该电源层包括与其电绝缘的连接板,并且连接到外部电源线;
第一设备,其一个端子置于所述电源层的连接板上,并且其另一个端子置于所述电源层上;
第二设备,形成在所述多层印刷电路板中,通过第一连接穿孔连接到所述第一设备,并且通过第二连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块;以及
第三设备,形成在所述多层印刷电路板中,通过第三连接穿孔连接到所述第二设备,并且通过第四连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块。
7.一种具有嵌入RF模块功率级电路的印刷电路板,包括:
电源层,形成在多层印刷电路板中,连接到外部电源线,并且具有其内定义的连接板区域;
第一设备,其一个端子置于所述电源层的连接板区域上,所述第一设备垂直于所述电源层设置;
第二设备,形成在所述多层印刷电路板中,连接到所述第一设备的另一端子,并且通过第一连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块;以及
第三设备,形成在所述多层印刷电路板中,通过第二连接穿孔连接到所述第二设备,并且通过第三连接穿孔连接到安装在所述多层印刷电路板中的RF集成电路模块。
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-
2005
- 2005-06-22 KR KR1020050054064A patent/KR100651358B1/ko not_active IP Right Cessation
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2006
- 2006-05-29 TW TW095119012A patent/TWI403241B/zh not_active IP Right Cessation
- 2006-06-07 CN CNB2006100835764A patent/CN100482032C/zh not_active Expired - Fee Related
- 2006-06-07 US US11/449,408 patent/US7663892B2/en not_active Expired - Fee Related
- 2006-06-19 JP JP2006168835A patent/JP4668132B2/ja not_active Expired - Fee Related
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JP2007005797A (ja) | 2007-01-11 |
JP4668132B2 (ja) | 2011-04-13 |
US7663892B2 (en) | 2010-02-16 |
KR100651358B1 (ko) | 2006-11-29 |
US20060291177A1 (en) | 2006-12-28 |
CN1886024A (zh) | 2006-12-27 |
US7843702B2 (en) | 2010-11-30 |
US20090268418A1 (en) | 2009-10-29 |
TW200704331A (en) | 2007-01-16 |
TWI403241B (zh) | 2013-07-21 |
US20090268419A1 (en) | 2009-10-29 |
US8068347B2 (en) | 2011-11-29 |
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