CN100481385C - 形成金属防反射涂层的方法 - Google Patents

形成金属防反射涂层的方法 Download PDF

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CN100481385C
CN100481385C CN200710001628.3A CN200710001628A CN100481385C CN 100481385 C CN100481385 C CN 100481385C CN 200710001628 A CN200710001628 A CN 200710001628A CN 100481385 C CN100481385 C CN 100481385C
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titanium nitride
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reflection coating
nitride layer
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丘幸华
骆统
黄启东
陈光钊
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Macronix International Co Ltd
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Abstract

一种在半导体器件的制造中形成防反射涂层的工艺，包括形成经改进的防反射涂层，其可以阻止形成晶冠缺陷及桥接，也可以提供防反射涂层与下层金属层间较佳的粘着性。经改进的防反射涂层可以包括两层氮化钛防反射涂层、氮化钛/钛/氮化钛夹层结构、经改进的氮化钛层、或具有延长厚度的氮化钛层。

Description

形成金属防反射涂层的方法
技术领域
本发明一般涉及半导体器件中金属层及内连线的制造，尤其涉及经改进的防反射结构的制造。
背景技术
在半导体的制造过程中，金属层及内连接层是相当重要的技术。内连接层电连接半导体晶片中不同导电布线层，而这些导电层形成于衬底表面上，衬底可以是源极/漏极接触或栅极结构，或者是覆盖金属布线层。重要的是内连接、通孔及导电布线层必须是可靠的，且尽可能是小尺寸的，以缩小电路，以及具有的工艺公差范围大，以获得高良率。
常常在金属层及内连接上形成防反射涂层(ARC)，这些防反射涂层一般由氮化钛防反射涂料所形成，提供覆盖反射金属线的无光表面，以改善平板印刷工艺。
为了覆盖防反射涂层，形成的金属层具有下层阻挡层，如氮化钛等。这些层对于一般由铝形成的金属层至关重要，可以与不同的表面，如氧化层的表面粘附。这些层也可以避免铝金属溅出，与其他表面，如硅化物反应。这些层的组合一般称为金属堆迭。
然而，问题之一在于，当防反射涂层太薄时，如小于600埃，则会有所谓的晶冠缺陷(crown defect)。晶冠缺陷说明于图1A及图1C中。在图1A中，可以看到晶冠缺陷101及102从金属内连接107延伸，晶冠缺陷103的特写图示出于图1B中。图1C说明从金属线105延伸的另一晶冠缺陷104，。
晶冠缺陷主要形成的原因是水溶性显影剂穿透防反射涂层至下层的金属层，其中，如线105及107的金属线在之后的平板印刷步骤中形成。水溶性的显影剂包括强碱溶液，可以使保护金属氧化层从金属表面移除，且使得金属表面易于受到电腐蚀，如由修复工艺期间的洗涤水所造成。
桥接(bridging)是另一个可能发生的问题，由图1A说明桥接问题。当缺陷形成，将一金属线与另一金属线桥接时，则发生桥接问题。因此，在图1A的区域106可以看到数个桥与金属线107桥接。
晶冠缺陷及桥接两者都会降低产率并增加工艺成本。
发明内容
一种在半导体器件的工艺中形成防反射涂层的方法，包括形成经改进的防反射涂层，其阻止晶冠缺陷及桥接形成，且使得防反射涂层与下层的金属层之间粘附较佳。
本发明的一个目的为经改进的防反射涂层包括两层氮化钛防反射涂层。
本发明的另一个目的为经改进的防反射涂层包括氮化钛/钛/氮化钛的夹层结构。
本发明的另一个目的为经改进的防反射涂层包括经改进的氮化钛层。
本发明的再一个目的为经改进的防反射涂层包括有延长厚度的氮化钛层。
本发明的这些特征、方面及实施例详细说于以下的实施方式中。
附图说明
本发明的特征、方面及实施例参考附图说明，其中：
图1A至图1C为说明缺陷的图示，这缺陷会影响形成在半导体器件的金属层中的金属线；
图2为说明半导体其件金属堆迭的示例；
图3A说明图2的金属层及防反射涂层的特写图；
图3B至图3E说明根据不同的实施例的金属层及经改进的防反射涂层的特写图；以及
图4A及图4B为穿透式电子显微镜图，说明经改进的防反射涂层与标准的防反射涂层具有相同的厚度。
主要元件符号说明
102、102、103、104    晶冠缺陷
105、107              金属内连接
10                    半导体结构
20                    第一绝缘层
24、312               钛层
28                    氮化钛阻挡层
32、301               金属层
34、302、304、306、316 防反射涂层
308                   夹层结构
310、314              氮化钛层
316                   多层防反射涂层结构
318                   第一氮化钛层
320                   第二氮化钛层
具体实施方式
图2说明半导体器件的示例金属堆迭结构的示意图。图2的结构说明与衬底接触的最低第一内连接层。首先，提供半导体结构10，半导体结构10可以包括硅衬底，包括如形成于衬底上的源极及漏极区域的元件。半导体结构10也可以包括形成于衬底上的绝缘与导电层以及图案化层，如栅极电极及字线。
视各实施例而定，第一绝缘层20可以由硼磷硅玻璃(BPSG)组成，形成于半导体衬底10之上。第一绝缘层20较佳可以由硼磷四乙基正硅酸盐(BPTEOS)氧化工艺所形成，且视各实施例而定，其厚度可以在约4,000至10,000埃之间，第一绝缘层20较佳的厚度约5,500埃。
之后，可以形成钛层24于第一绝缘层20之上，钛层24的厚度可以在约100-500埃之间，且较佳的厚度如约400埃。钛层24可以溅镀沉积于绝缘层20之上。
之后，可以将氮化钛(TiN)阻挡层28沉积于钛层24之上，氮化钛阻挡层的厚度约200-1300埃之间，且在特定的实施例中具有约1200埃的厚度。可以包括氮化钛阻挡层，以防止结刺穿(junctionspiking)，即铝扩散至硅层中。
之后，如由铝组成的金属层32可以形成于阻挡层28之上。金属层32可以是如铝/铜/硅。金属层32可以由如270至520℃间的温度溅镀所形成。举例来说，金属层可以在约300℃溅镀于阻挡层28之上。然而，需要注意的是，越高溅镀温度会造成金属线的应力增加，这是因为金属沉积的温度高会造成薄膜结构的改变，会明显呈现在应力上。
在特定的实施例中，金属层32可以由约0.75至0.85重量百分比的硅及约0.45至0.55重量百分比的铜所组成。举例来说，在一实施例中，金属层32可以由约0.8重量百分比的硅及约0.5重量百分比的铜及约98.7重量百分比的铝所组成。
金属层32可以提供等离子体轰击金属锭以溅镀沉积，其他金属沉积工艺也是适合的。举例来说，金属靶可是0.75-0.85％的硅及0.45-0.55％的铜，与99.999995％的纯铝平衡组成。以等离子体蒸镀的铝沉积于半导体表面之上。铝合金可以由含有铝、铜及硅的单一靶，在功率介于9.0及11.0千瓦的直流电、晶圆温度介于270℃至520℃、以及氩气压力介于约在9E-8及5E-6托(Torr)之间的环境下溅镀沉积。
之后，可以将防反射涂层34沉积于金属层32之上，防反射涂层34通常包括氮化钛层。防反射涂层34形成于金属层形成32的金属线之上。防反射的特征可以提供降低金属层的反射而改善平板印刷解析度。防反射涂层34可以提供过量的氮气与钛金属靶反应溅镀形成。防反射涂层层34可以具有如介于0.25及0.6之间的反射率，较佳的反射率约为0.3。
如前所述，当防反射涂层34太薄时，如小于600埃，则在之后水溶性的显影剂会穿透防反射涂层34至金属层，发生如晶冠缺陷及桥接的缺陷。然而，可以改进防反射涂层34，以降低水溶性显影剂穿透层34。图3B至图3E说明经改进的防反射涂层34的实施例。图3A说明金属层301及防反射涂层302特写图。金属层301可以是如铝金属层，防反射涂层302可以是如氮化钛防反射涂层。因此，若防反射涂层302小于约600埃，则如晶冠缺陷及桥接缺陷会发生。在图3B中，显示延长或较厚的防反射涂层304。防反射涂层304可以仍包括氮化钛防反射涂层，但是厚度可以是如750埃。虽然使用较厚的防反射涂层，如防反射涂层304，可以降低如晶冠缺陷及桥接缺陷，但需注意的是，较厚的防反射涂层可能会增加剥离的发生，造成另一个问题。
在图3C中，可以使用经改进的防反射涂层306。相对于公知工艺所使用的一般圆柱氮化钛，经改进的防反射涂层306可以包括如非晶型氮化钛。
图3D说明防反射涂层中使用夹层结构308的实施例。在图3D的实施例中，夹层结构308包括钛层312，夹于两层氮化钛层310及314之间。其显示的是金属堆迭在经过数个显影步骤，夹层结构，如夹层结构308可以具有优越的效益。举例来说，经测试显示经过四个显影步骤之后，夹层结构，如夹层结构308可以对于降低缺陷具有优越的效益。
图3E说明多层防反射涂层结构316的图示。在图3E的例示中，多层结构316包括第一氮化钛层318及第二氮化钛层320。结构316较佳可以是两层结构，而无须具有延展厚度的防反射涂层34。举例来说，图4A及图4B的穿透式电子显微镜图显示双氮化钛层316可以产生防反射涂层，类似于公知的防反射涂层厚度。
在图4A的示例中，沉积单层400埃氮化钛防反射涂层。然而，在图4B的示例中，沉积单层200埃氮化钛层，之后为泵洁净步骤，之后再沉积200埃的第二氮化钛层。
在此，可以看到的是使用两层氮化钛层318及320，可以降低公知技术中困扰的晶冠缺陷及桥接问题。再者，使用双层氮化钛层，如图3所示优选图示，因其可产生整体防反射涂层316，与公知的防反射涂层具有相同的厚度。
再者，使用两层氮化钛层形成防反射涂层，的确显示改善防反射涂层316与金属层301的粘着性。为了维持或增加产能，层318及320可以在单一反应室中沉积。
因此，显示于图3E的双层氮化钛结构316是较佳的例式，这是因为其解决晶冠缺陷及桥接问题，且无须延长防反射涂层的厚度，相比于单一氮化钛层，能提供较佳的粘着性，且不会影响产能。
如前所述，经改善的防反射涂层可以应用在形成不同的半导体器件。具体来说，经改善的防反射涂层结构可以应用在闪速器件、动态随机存取存储器、及一次式编程(OTP)器件。
虽然本发明特定的实施例以在前文公开，但是应该了解的是这里所描述的实施例仅为例式，因此，本发明不应限定于这些实施例。相反的，在此揭示的本发明的范围应限定在以下的权利要求书，及前述的说明书及附图。

Claims (15)

1.一种制造防反射涂层于金属层上的方法，包括：
形成第一防反射氮化钛层于该金属层之上；以及
形成第二防反射氮化钛层于该第一防反射氮化钛层之上，该第一及第二防反射氮化钛层的总厚度小于600埃。
2.如权利要求1所述的方法，其中形成第一防反射氮化钛层包括形成厚度为200埃的第一防反射氮化钛层。
3.如权利要求1所述的方法，其中形成第二防反射氮化钛层包括形成厚度为200埃的第二防反射氮化钛层。
4.如权利要求1所述的方法，其中该第一及第二防反射氮化钛层的总厚度400埃。
5.如权利要求1所述的方法，其中该金属层包括铝/铜/硅。.
6.如权利要求1所述的方法，还包括形成绝缘层于该金属层之下。
7.如权利要求6所述的方法，还包括形成钛层于该绝缘层与该金属层之间。
8.如权利要求7所述的方法，还包括形成阻挡层于该钛层与该金属层之间。
9.一种制造防反射涂层于金属层上的方法，包括：
形成第一防反射氮化钛层于该金属层之上；
形成防反射钛层于该第一防反射氮化钛层之上，其中形成第一防反射氮化钛层包括形成厚度为200埃的该第一防反射氮化钛层；以及
形成第二防反射氮化钛层于该防反射钛层之上，该防反射钛层及该第一及该第二防反射氮化钛层的总厚度小于600埃。
10.如权利要求9所述的方法，其中形成第二防反射氮化钛层包括形成厚度为200埃的第二防反射氮化钛层。
11.如权利要求9所述的方法，其中该防反射钛层及该第一及第二防反射氮化钛层的总厚度400埃。
12.如权利要求9所述的方法，其中该金属层包括铝/铜/硅。
13.如权利要求9所述的方法，还包括形成绝缘层于该金属层之下。
14.如权利要求13所述的方法，还包括形成钛层于该绝缘层与该金属层之间。
15.如权利要求14所述的方法，还包括形成阻挡层于该钛层与该金属层之间。
CN200710001628.3A 2006-01-11 2007-01-09 形成金属防反射涂层的方法 Expired - Fee Related CN100481385C (zh)

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US5814560A (en) * 1995-11-29 1998-09-29 Advanced Micro Devices, Inc. Metallization sidewall passivation technology for deep sub-half micrometer IC applications
US5994217A (en) * 1996-12-16 1999-11-30 Chartered Semiconductor Manufacturing Ltd. Post metallization stress relief annealing heat treatment for ARC TiN over aluminum layers
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