CN100466710C - 数据转换系统 - Google Patents

数据转换系统 Download PDF

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Publication number
CN100466710C
CN100466710C CNB038270781A CN03827078A CN100466710C CN 100466710 C CN100466710 C CN 100466710C CN B038270781 A CNB038270781 A CN B038270781A CN 03827078 A CN03827078 A CN 03827078A CN 100466710 C CN100466710 C CN 100466710C
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data
node
signal
section point
cycle master
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CN1839624A (zh
Inventor
田渕敦之
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GVBB Holdings SARL
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Canopus Co Ltd
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Abstract

本发明提供一种在将从信息处理装置输出的数据实时地转换为不同格式的数据时，通过使数据的传送和转换的数据的输出同步，从而防止产生运动图像数据中的丢帧或帧重复等图像的缺陷的数据转换系统。数据转换系统是IEEE1394总线上的第一节点和第二节点中的任何一个成为循环主机，与循环主机输出的循环开始分组同步，进行从第一节点向第二节点的第一数据传送，同时在第二节点中，与从外部输入的基准信号同步输出从第一数据转换的第二数据的数据转换系统，该系统包括外部同步信号接收部，设在第一节点以及第二节点的至少一方中，接收从外部输入的基准信号；以及同步调整部，使循环主机输出的循环开始分组的频率与由外部同步信号接收部接收到的基准信号同步。

Description

数据转换系统
技术领域
本发明涉及用于将从信息处理装置输出的数据实时地转换为不同格式的数据的数据转换系统，特别涉及IEEE1394总线上的第一节点和第二节点中的任何一个成为循环主机(cycle master)，与循环主机输出的循环开始分组同步，进行从第一节点向第二节点的第一数据的传送，同时在第二节点中，与从外部输入的基准信号同步输出从第一数据转换的第二数据的数据转换系统。
背景技术
由于个人计算机(PC)的数据记录容量以及处理速度的显著提高，在PC上进行视频编辑的所谓非线性编辑逐渐普及。将视频数据取入PC，并将编辑之后的视频图像输出时，将视频捕捉卡或视频编辑卡等专用的硬件追加插入PC的扩展槽中，经由该硬件进行数据的输入输出。
当前，为了处理模拟视频或高端服务用信号，需要专用的硬件，但如果仅处理民用设备或低端服务所广泛使用的DV(Digital Video，数字视频)格式的数据，则通用的廉价的1394OHCI标准的IEEE1394接口规格的硬件也可以经得起实用。
这主要是因为由于PC的CPU能力提高，除了可以在实用上执行视频编辑等处理而不使用专用的硬件之外，作为代表性的视频编辑软件以DV格式进行数据的输入输出的接口，支持1394OHCI标准的IEEE1394接口。
1394OHCI标准的IEEE1394接口不仅标准装载于桌面型PC，而且也多标准装载于笔记本型PC中，从DV格式的视频输入输出到编辑可以在一台笔记本型PC上进行。
在仅处理DV格式的视频素材的情况下，用前述的系统就可以完成，但需要处理模拟视频图像或服务用的SDI格式的素材的情况也不少，在这样的情况下，需要进行格式的互相转换。为了在DV格式的视频素材和模拟视频图像或SDI格式的视频素材之间进行数据的相互转换，同时使用实时地将输入的模拟视频信号或SDI视频信号转换为DV格式的信号，同时作为DV信号输出，或反之将DV格式的视频信号转换为模拟视频信号或SDI视频信号同时输出的外置单元型的DV转换器的情况较多。
从民用到业务用，存在各种DV转换器，在业务用途上有时需要称作外部同步(强制同步系统)的功能。通过不具备该外部同步功能的DV转换器从PC经由1394OHCI标准的IEEE1394接口输出的DV信号转换为模拟视频信号或SDI视频信号时，在从PC输出的DV信号的帧频的定时，输出转换结果的模拟视频信号或SDI视频信号。
在具有外部同步功能的DV转换器的情况下，经由基准输入端子输入成为输出定时的基准的基准信号。在将从PC的1394OHCI标准的IEEE1394接口输出的DV视频信号转换为模拟视频信号或SDI视频信号的情况下，一边对转换结果的信号进行缓冲，一边与基准信号同步地输出。
连接到IEEE1394总线上的节点间的数据传输有Asynchronous传送(非同步传送)模式和Ishochronous传送(同步传送)模式，对图像、声音的传送使用同步传送模式。经由PC的1394OHCI标准的IEEE1394接口输出DV视频信号的情况下也使用该同步传送模式。
PC和DV转换器作为IEEE1394总线上的节点而存在，经由PC的1394OHCI标准的IEEE1394接口对DV转换器输出DV视频信号的情况下，PC或DV转换器的其中一方成为被称作管理传送循环的循环主机的节点，以一定周期(125μsec)对IEEE1394总线输出循环开始分组。
PC的1394OHCI标准的IEEE1394接口每次验证循环主机输出的循环开始分组时，以由IEEE1394定义的同步传送用的分组的格式发送DV格式的视频信号。
这样，从PC的1394OHCI标准的IEEE1394接口输出的DV视频信号的帧频与循环主机输出的循环开始分组的频率同步。循环主机输出的循环开始分组的125μsec的间隔从成为循环主机的节点的时钟脉冲源24.576MHz以一定比分频而生成，但由于各硬件所具备的各个时钟脉冲源的偏差，产生频率的波动。从而从PC的1394OHCI标准的IEEE1394接口输出的DV视频信号的帧频根据使用的设备而不同，因此不与从外部对DV转换器输入的基准信号的帧频平均地一致，即使在DV转换器侧进行缓冲，存在从PC侧的传送速度快的情况下，输出的模拟视频信号或SDI视频信号中产生丢帧，在从PC侧的传送速度慢的情况下，输出的模拟视频信号或SDI视频信号中发生帧重复的问题。
难以预测发生这样的丢帧或帧的重复的定时，尽管通过装载在PC侧的视频编辑软件以为帧单位准确地进行编辑，但可能在最终输出的图像中不定期地发生丢帧或帧的重复等缺陷。
发明内容
本发明提供一种在将从信息处理装置输出的数据实时地转换为不同格式的数据时，通过使数据的传送和转换的数据的输出同步，从而防止产生运动图像数据中的丢帧或帧重复等图像缺陷的数据转换系统。
本发明的技术方案1的数据转换系统是IEEE1394总线上的第一节点和第二节点中的任何一个成为循环主机，与循环主机输出的循环开始分组同步，进行从第一节点向第二节点的第一数据的传送，同时在第二节点中，与从外部输入的基准信号同步输出从第一数据转换的第二数据的数据转换系统，该系统包括外部同步信号接收部，设在第一节点以及第二节点的至少一方中，接收从外部输入的基准信号；以及同步调整部，使循环主机输出的循环开始分组的频率与由外部同步信号接收部接收到的基准信号同步。
在该情况下，通过循环开始分组的频率与基准信号同步，可以使从第一节点输出的数据的传送速率和从第二节点输出的第二数据的输出速率一致，并可以防止输出的第二数据中发生数据的丢失和重复。特别在将DV格式等的视频信号转换为不同格式的视频信号时，可以防止丢帧或帧的重复等图像缺陷的发生。
本发明的技术方案2的数据转换系统在技术方案1记载的数据转换系统中，第一节点是具有作为第一数据输出DV格式的视频信号的1394OHCI标准的IEEE1394接口的硬件，第二节点是作为第二数据输出模拟视频信号或SDI视频信号的数据转换硬件。
在该情况下，通过以同步于基准信号的频率输出DV格式的视频信号的输出，可以防止模拟视频信号或SDI视频信号中发生丢帧或帧的重复等图像缺陷。
本发明的技术方案3的数据转换系统在技术方案1或2记载的数据转换系统中，其特征在于，第二节点包括外部同步信号接收部以及同步调整部，成为数据传送时的循环主机。
在该情况下，可以使从第一节点侧输出的数据的传送速率与在第二节点中接收到的基准信号同步。
本发明的技术方案4的数据转换系统在技术方案1或2记载的数据转换系统中，第一节点包括同步调整部，第二节点包括外部同步信号接收部以及同步调整部，成为循环主机的节点的同步调整部使循环主机分组的频率与外部同步信号接收部接收到的基准信号同步并输出。
在该情况下，在第一节点以及第二节点的其中一个成为循环主机的情况下，都可以进行与外部同步信息接收部接收到的基准信号同步的数据传送，可以防止在从第二节点输出的数据中发生缺陷。
本发明的技术方案5的数据转换系统在技术方案4记载的数据转换系统中，在第一节点成为循环主机的情况下，通过IEEE1394接口的非同步传送从第二节点对第一节点发送基于由第二节点的外部同步信号接收部接收到的基准信号而生成的同步调整用信号。
在该情况下，由于使用IEEE1394总线发送基于由外部同步信号接收部接收到的基准信号而生成的同步调整用信号，所以即使在第一节点为循环主机的情况下，也可以发送同步调整用信号而不必特别增加布线。
本发明的技术方案6的数据转换系统在技术方案4记载的数据转换系统中，包括专用同步信号线，用于在第一节点成为循环主机的情况下，从第二节点对第一节点发送基于由第二节点的外部同步信号接收部接收到的基准信号而生成的同步调整用信号。
在该情况下，即使在对第二节点侧输入外部同步用的基准信号，第一节点成为循环主机的情况下，也可以可靠地使来自第一节点的数据的传送速率与基准信号同步。
本发明的技术方案7的数据转换系统在技术方案1或2记载的数据转换系统中，其特征在于，第一节点包括外部同步信号接收部以及同步调整部，成为数据传送时的循环主机。
在该情况下，由于从第一节点输出的数据的帧频已经完全外部同步，因此在第二节点仅单纯地进行转换处理即可，即使第二节点是不具有外部同步功能的DV转换器，作为系统整体，也可以实现没有丢帧或帧重复的外部同步。
附图说明
图1是第一实施方式的简略方框图。
图2是第二实施方式的简略方框图。
图3是第三实施方式的简略方框图。
具体实施方式
在本发明中，作为IEEE1394总线上的节点，考察将包括1394OHCI标准的IEEE1394接口的硬件(PC)和从PC输出的DV视频信号转换为模拟视频信号或SDI视频信号并输出的转换硬件(以下称作DV转换器)连接的情况。从PC的1394OHCI标准的IEEE1394接口输出的DV格式的视频信号在同步传送模式下被传送到作为第二节点的DV转换器。
同步传送模式由IEEE1394总线上的被称作循环主机的节点管理，基于循环主机每125μsec输出的循环开始分组，从PC的1394OHCI标准的IEEE1394接口输出DV格式的视频信号。
该循环开始分组的间隔从循环主机的时钟脉冲源24.576MHz以一定比分频，产生与输入外部同步电路的基准信号的偏离，因此即使在输出由DV转换器转换的模拟视频信号或SDI视频信号时进行了缓冲，也产生丢帧或帧的重复等缺陷。因此，在本发明中，循环主机的时钟脉冲源的频率由基准信号反馈控制，使循环主机输出的循环开始分组的间隔比125μsec长或短，其结果，动态地变化IEEE1394的传送速率，由此，可以使从1394OHCI标准的IEEE1394接口输出的DV格式的视频信号的平均帧频与外部同步用的基准信号的频率一致。
记下，基于具体的实施例详细地进行说明。
(实施例1)
基于图1说明本发明的第一实施例。
图1中，作为1394OHCI标准的IEEE1394硬件的PC10和将DV格式的视频信号转换为模拟视频信号或SDI视频信号的DV转换器20通过IEEE1394电缆30连接。
PC10中包含：DV数据处理部11，包含存储DV格式的运动图像数据的硬盘等记录介质；IEEE1394电路12，以IEEE1394定义的分组的格式输入输出数据；以及时钟脉冲源13，由石英振子等构成。另外，PC10内内置有CPU、ROM、RAM及其它的接口类，在附图中省略了这些功能部。此外，在PC10中，为至少用于编辑DV格式的数据的视频编辑软件可执行的环境，可经由DV数据处理部11以及IEEE1394电路12输出。
DV转换器20中包括：用于接收经由IEEE1394电缆30传送来的DV格式的视频信号的IEEE1394电路21、将传送来的DV格式的视频信号转换为模拟视频信号或SDI视频信号的数据转换电路23、临时缓冲转换的视频信号的帧缓冲器24、接收来自外部的基准信号的外部同步电路25、接收外部同步电路25对电压的反馈控制的时钟振荡电路VCXO(Voltage Controlled CrystalOscillator)22。对于该DV转换器20也内置有CPU、ROM、RAM、各种接口等，在附图中省略这些功能部。
这样的第一实施例中，DV转换器20侧的IEEE1394节点成为循环主机。成为循环主机的DV转换器20的IEEE1394电路21每125μsec对IEEE1394总线上输出循环开始分组，但决定该循环开始分组的间隔的时钟振荡电路由外部同步电路25控制。
外部同步电路25对VCXO22的电压进行反馈控制从而控制VCXO22的振荡频率，以便将输入的基准信号和输出的模拟视频信号或SDI视频信号的定时差保持为一定。由此，以一定比对VCXO22的时钟分频而生成的循环开始分组的输出间隔变化，由该循环开始分组的间隔决定的来自PC10的1394OHCI标准的IEEE1394侧的传送速率也可以与基准信号同步。
这样，DV转换器20可以接收来自PC10的1394OHCI标准的IEEE1394接口的DV视频信号的传送，并在没有丢帧或帧的重复等缺陷的状态下与基准信号完全同步地输出数据转换后的模拟视频信号或SDI视频信号。
该第一实施例的情况下，PC10侧的IEEE1394硬件可以以标准件构成。
(实施例2)
存在无法确定连接到IEEE1394总线的PC以及DV转换器的IEEE1394电路中的哪一个成为循环主机的情况。在DV转换器侧不能成为循环主机的情况下，PC侧的IEEE1394节点成为循环主机，需要进行控制，以使PC侧的时钟振荡频率与基准信号同步。将这样的情况作为本发明的第二实施例，基于图2进行说明。
图2中，作为1394OHCI标准的IEEE1394接口的PC10和将DV格式的视频信号转换为模拟视频信号或SDI视频信号的DV转换器20通过IEEE1394电缆30连接。
PC10中包括：DV数据处理部11，包含存储DV格式的运动图像数据的硬盘等记录介质；IEEE1394电路12，以IEEE1394定义的分组的格式输入输出数据；以及VCXO14，可通过电压的反馈来进行振荡频率的控制。与前述同样，PC10内内置有CPU、ROM、RAM及其它的接口类，在附图中省略了这些功能部。此外，在PC10中，为至少用于编辑DV格式的数据的视频编辑软件可执行的环境，可经由DV数据处理部11以及IEEE1394电路12输出。
DV转换器20中包括：用于接收经由IEEE1394电缆30传送来的DV格式的视频信号的IEEE1394电路21、将传送来的DV格式的视频信号转换为模拟格式的视频信号或SDI格式的视频信号的数据转换电路23、临时缓冲转换的视频信号的帧缓冲器24、接收来自外部的基准信号的外部同步电路25、接收外部同步电路25对电压的反馈控制的时钟振荡电路VCXO(VoltageControlled Crystal Oscillator)22。对于该DV转换器20也内置有CPU、ROM、RAM、各种接口等，在附图中省略这些功能部。
这样的实施例2中，在DV转换器20侧的IEEE1394节点成为循环主机的情况下，与第一实施例同样，对VCX22的电压进行反馈控制从而控制VCXO22的振荡频率，以便将输入的基准信号、模拟视频信号或SDI视频信号的定时差保持一定。由此，将VCXO22的时钟以一定比分频而生成的循环开始分组的输出间隔变化，由该循环开始分组的间隔决定的从PC10的1394OHCI标准的IEEE1394侧的传送速率也可以与基准信号同步。
此外，在PC10侧的IEEE1394节点成为循环主机的情况下，通过IEEE1394电缆30将由DV转换器20的外部同步电路25接收到的基准信号发送到PC10侧，对PC10侧的VCXO14进行反馈控制，以便将基准信号和循环开始分组的定时差保持一定。对于从DV转换器20对PC10发送基准信号，可以用非同步(Asynchronous)传送模式传送。在该情况下，PC10侧需要包括用于解释通过AV/C协议发送来的命令的算法等。由此，将VCXO14的时钟以一定比分频而生成的循环开始分组的输出间隔变化，由该循环开始分组的间隔决定的从PC10的1394OHCI标准的IEEE1394侧的传送速率也可以与基准信号同步。
这样，在第二实施例中，在PC10和DV转换器20中的任何一个成为循环主机的情况下，都可以在没有丢帧或帧的重复等缺陷的状态下与基准信号完全同步地输出数据转换后的模拟视频信号或SDI视频信号。
(变形例)
可以另外设置专用控制信号线31，用于对PC10侧发送基于输入DV转换器20的外部同步电路25的基准信号而生成的同步调整用信号。在该情况下，可以通过专用控制信号线31可靠地发送基于基准信号生成的同步调整用信号，并进行PC10侧的VCXO14的反馈控制。
(实施例3)
可以构成为对PC侧输入外部同步用的基准信号，并对从PC侧向DV转换器的传送频率进行控制，以便与该基准信号同步。作为第三实施例，基于图3说明这样的情况。
图3中，作为1394OHCI标准的IEEE1394硬件的PC10和将DV格式的视频信号转换为模拟视频信号或SDI视频信号的DV转换器20通过IEEE1394电缆30连接。
PC10中包括：DV数据处理部11，包含存储DV格式的运动图像数据的硬盘等记录介质；IEEE1394电路12，以IEEE1394定义的分组的格式输入输出数据；VCXO14，可通过电压的反馈来进行振荡频率的控制；以及外部同步电路15，接收来自外部的基准信号。与前述同样，PC10内内置有CPU、ROM、RAM及其它的接口类，在附图中省略了这些功能部。此外，在PC10中，为至少用于编辑DV格式的数据的视频编辑软件可执行的环境，可经由DV数据处理部11以及IEEE1394电路12输出。
DV转换器20中包括：用于接收经由IEEE1394电缆30传送来的DV格式的视频信号的IEEE1394电路21、将传送来的DV格式的视频信号转换为模拟视频信号或SDI视频信号的数据转换电路23、由石英振子等构成的时钟脉冲源26等。对于该DV转换器20也内置有CPU、ROM、RAM、各种接口等，在附图中省略这些功能部。
在这样的第三实施例中，基于由PC10的外部同步电路15接收到的基准信号，对PC10侧的VCXO14进行反馈控制，以便将基准信号和循环开始分组的定时差保持一定。由此，将VCXO14的时钟以一定比分频而生成的循环开始分组的输出间隔变化，由该循环开始分组的间隔决定的PC10的从1394OHCI标准的IEEE1394侧的传送速率也可以与基准信号同步。另外，在该情况下，PC10的IEEE1394节点需要成为循环主机。
这样，在第三实施例中，可以在没有丢帧或帧的重复等缺陷的状态下与基准信号完全同步地输出数据转换后的模拟视频信号或SDI视频信号。
在该第三实施例的情况下，DV转换器20侧的硬件可以原样使用通用件构成。
这样，根据本发明，可以使与外部同步用的基准信号同步输出的数据和经由1394OHCI标准的IEEE1394接口输出的数据的帧频同步，并可以防止基于帧频的偏离的丢帧或帧的重复等数据的缺陷。
产业上的可利用性，本发明中，从PC输出DV格式的视频信号，将其转换为模拟视频信号或SDI视频信号时，使通过IEEE1394的传送速率和输出帧频同步，可以防止丢帧或帧的重复等图像缺陷的发生。进行转换的数据格式不限定于实施例中说明的，也可以适用于模拟视频信号、SDI视频信号、DV视频信号、MPEG1、MPEG2、MPEG4及其它的格式的视频信号间的相互转换等。此外，不限定于运动图像数据，也可以适用于声音数据。

Claims (7)

1.一种数据转换系统，IEEE1394总线上的第一节点和第二节点中的任何一个成为循环主机，与所述循环主机输出的循环开始分组同步，进行从所述第一节点向所述第二节点的第一数据的传送，同时在所述第二节点中，与从外部输入的基准信号同步输出从所述第一数据转换的第二数据，该系统包括:
外部同步信号接收部，设在所述第一节点以及所述第二节点的至少一方中，接收从外部输入的所述基准信号；以及
同步调整部，使所述循环主机输出的循环开始分组的频率与由所述外部同步信号接收部接收到的所述基准信号同步。
2.如权利要求1所述的数据转换系统，其中，所述第一节点是具有输出作为第一数据的DV格式的视频信号的1394OHCI标准的IEEE1394接口的硬件，所述第二节点是输出作为第二数据的模拟视频信号或SDI视频信号的数据转换硬件。
3.如权利要求1或2所述的数据转换系统，其中，所述第二节点包括所述外部同步信号接收部以及同步调整部，成为数据传送时的循环主机。
4.如权利要求1或2所述的数据转换系统，其中，所述第一节点包括所述同步调整部，所述第二节点包括所述外部同步信号接收部以及同步调整部，成为循环主机的节点的同步调整部使循环主机分组的频率与所述外部同步信号接收部接收到的基准信号同步并输出。
5.如权利要求4所述的数据转换系统，其中，在所述第一节点成为循环主机的情况下，通过IEEE1394接口的非同步传送从第二节点对第一节点发送由第二节点的外部同步信号接收部接收到的基准信号。
6.如权利要求4所述的数据转换系统，其中，包括专用同步信号线，用于在所述第一节点成为循环主机的情况下，从第二节点对第一节点发送由第二节点的外部同步信号接收部接收到的基准信号。
7.如权利要求1或2所述的数据转换系统，其中，所述第一节点包括所述外部同步信号接收部以及同步调整部，成为数据传送时的循环主机。
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US20070046512A1 (en) 2007-03-01
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