CN100438003C - 半导体器件 - Google Patents
半导体器件 Download PDFInfo
- Publication number
- CN100438003C CN100438003C CNB200510072745XA CN200510072745A CN100438003C CN 100438003 C CN100438003 C CN 100438003C CN B200510072745X A CNB200510072745X A CN B200510072745XA CN 200510072745 A CN200510072745 A CN 200510072745A CN 100438003 C CN100438003 C CN 100438003C
- Authority
- CN
- China
- Prior art keywords
- film
- semiconductor device
- soldered ball
- conductive film
- articulamentum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0501—Shape
- H01L2224/05016—Shape in side view
- H01L2224/05018—Shape in side view being a conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05557—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05562—On the entire exposed surface of the internal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05575—Plural external layers
- H01L2224/0558—Plural external layers being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13006—Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004150726 | 2004-05-20 | ||
JP2004150726A JP4327657B2 (ja) | 2004-05-20 | 2004-05-20 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1700460A CN1700460A (zh) | 2005-11-23 |
CN100438003C true CN100438003C (zh) | 2008-11-26 |
Family
ID=35374431
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200510072745XA Expired - Fee Related CN100438003C (zh) | 2004-05-20 | 2005-05-19 | 半导体器件 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7221054B2 (ko) |
JP (1) | JP4327657B2 (ko) |
KR (1) | KR100687274B1 (ko) |
CN (1) | CN100438003C (ko) |
TW (1) | TWI278901B (ko) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5050384B2 (ja) * | 2006-03-31 | 2012-10-17 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US7375021B2 (en) * | 2006-04-04 | 2008-05-20 | International Business Machines Corporation | Method and structure for eliminating aluminum terminal pad material in semiconductor devices |
JP4611943B2 (ja) * | 2006-07-13 | 2011-01-12 | Okiセミコンダクタ株式会社 | 半導体装置 |
GB2444775B (en) * | 2006-12-13 | 2011-06-08 | Cambridge Silicon Radio Ltd | Chip mounting |
US7748116B2 (en) * | 2007-04-05 | 2010-07-06 | John Trezza | Mobile binding in an electronic connection |
CN101359606B (zh) * | 2007-07-31 | 2010-06-16 | 俞宛伶 | 在半导体连接垫上的金属凸块形成方法 |
US8039960B2 (en) * | 2007-09-21 | 2011-10-18 | Stats Chippac, Ltd. | Solder bump with inner core pillar in semiconductor package |
TW200917386A (en) * | 2007-10-03 | 2009-04-16 | Advanced Semiconductor Eng | Wafer structure with a buffer layer |
US7713861B2 (en) * | 2007-10-13 | 2010-05-11 | Wan-Ling Yu | Method of forming metallic bump and seal for semiconductor device |
US7713860B2 (en) * | 2007-10-13 | 2010-05-11 | Wan-Ling Yu | Method of forming metallic bump on I/O pad |
US7439170B1 (en) * | 2008-03-07 | 2008-10-21 | International Business Machines Corporation | Design structure for final via designs for chip stress reduction |
US8022543B2 (en) * | 2008-03-25 | 2011-09-20 | International Business Machines Corporation | Underbump metallurgy for enhanced electromigration resistance |
US20100032194A1 (en) * | 2008-08-08 | 2010-02-11 | Ibiden Co., Ltd. | Printed wiring board, manufacturing method for printed wiring board and electronic device |
JP5126002B2 (ja) * | 2008-11-11 | 2013-01-23 | セイコーエプソン株式会社 | 半導体装置及び半導体装置の製造方法 |
US9449939B2 (en) * | 2009-09-17 | 2016-09-20 | Koninklijke Philips N.V. | Geometry of contact sites at brittle inorganic layers in electronic devices |
TWI412107B (zh) * | 2009-10-02 | 2013-10-11 | Ind Tech Res Inst | 凸塊結構、晶片封裝結構及該凸塊結構之製備方法 |
US8354750B2 (en) * | 2010-02-01 | 2013-01-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stress buffer structures in a mounting structure of a semiconductor device |
KR101936232B1 (ko) * | 2012-05-24 | 2019-01-08 | 삼성전자주식회사 | 전기적 연결 구조 및 그 제조방법 |
US20150097268A1 (en) * | 2013-10-07 | 2015-04-09 | Xintec Inc. | Inductor structure and manufacturing method thereof |
TWI551199B (zh) * | 2014-04-16 | 2016-09-21 | 矽品精密工業股份有限公司 | 具電性連接結構之基板及其製法 |
TWI620290B (zh) * | 2014-05-27 | 2018-04-01 | 聯華電子股份有限公司 | 導電墊結構及其製作方法 |
DE102015100521B4 (de) * | 2015-01-14 | 2020-10-08 | Infineon Technologies Ag | Halbleiterchip und Verfahren zum Bearbeiten eines Halbleiterchips |
US10037957B2 (en) | 2016-11-14 | 2018-07-31 | Amkor Technology, Inc. | Semiconductor device and method of manufacturing thereof |
IT201700087309A1 (it) * | 2017-07-28 | 2019-01-28 | St Microelectronics Srl | Dispositivo elettronico integrato con regione di redistribuzione e elevata resistenza agli stress meccanici |
IT201700087318A1 (it) * | 2017-07-28 | 2019-01-28 | St Microelectronics Srl | Dispositivo elettronico integrato con regione di redistribuzione e elevata resistenza agli stress meccanici e suo metodo di preparazione |
JP6552660B1 (ja) * | 2018-02-28 | 2019-07-31 | キヤノン株式会社 | 液体吐出ヘッド用基板の製造方法 |
JP2020047775A (ja) * | 2018-09-19 | 2020-03-26 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法および半導体装置 |
KR102179167B1 (ko) * | 2018-11-13 | 2020-11-16 | 삼성전자주식회사 | 반도체 패키지 |
US11276632B2 (en) | 2018-12-24 | 2022-03-15 | Nepes Co., Ltd. | Semiconductor package |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1341279A (zh) * | 1999-02-26 | 2002-03-20 | 住友电木株式会社 | 半导体器件 |
US6413851B1 (en) * | 2001-06-12 | 2002-07-02 | Advanced Interconnect Technology, Ltd. | Method of fabrication of barrier cap for under bump metal |
US6689680B2 (en) * | 2001-07-14 | 2004-02-10 | Motorola, Inc. | Semiconductor device and method of formation |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1005082A4 (en) * | 1998-03-27 | 2001-08-16 | Seiko Epson Corp | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, PRINTED CIRCUIT BOARD, AND ELECTRONIC APPARATUS |
JP3859403B2 (ja) | 1999-09-22 | 2006-12-20 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6770971B2 (en) * | 2002-06-14 | 2004-08-03 | Casio Computer Co., Ltd. | Semiconductor device and method of fabricating the same |
TWI291210B (en) * | 2002-09-10 | 2007-12-11 | Advanced Semiconductor Eng | Under-bump-metallurgy layer |
US7064446B2 (en) * | 2004-03-29 | 2006-06-20 | Intel Corporation | Under bump metallization layer to enable use of high tin content solder bumps |
-
2004
- 2004-05-20 JP JP2004150726A patent/JP4327657B2/ja not_active Expired - Fee Related
-
2005
- 2005-05-16 TW TW094115814A patent/TWI278901B/zh not_active IP Right Cessation
- 2005-05-18 KR KR1020050041643A patent/KR100687274B1/ko not_active IP Right Cessation
- 2005-05-19 CN CNB200510072745XA patent/CN100438003C/zh not_active Expired - Fee Related
- 2005-05-20 US US11/133,279 patent/US7221054B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1341279A (zh) * | 1999-02-26 | 2002-03-20 | 住友电木株式会社 | 半导体器件 |
US6413851B1 (en) * | 2001-06-12 | 2002-07-02 | Advanced Interconnect Technology, Ltd. | Method of fabrication of barrier cap for under bump metal |
US6689680B2 (en) * | 2001-07-14 | 2004-02-10 | Motorola, Inc. | Semiconductor device and method of formation |
Also Published As
Publication number | Publication date |
---|---|
KR20060046089A (ko) | 2006-05-17 |
JP2005333009A (ja) | 2005-12-02 |
US20050258539A1 (en) | 2005-11-24 |
TW200540946A (en) | 2005-12-16 |
TWI278901B (en) | 2007-04-11 |
KR100687274B1 (ko) | 2007-02-27 |
JP4327657B2 (ja) | 2009-09-09 |
CN1700460A (zh) | 2005-11-23 |
US7221054B2 (en) | 2007-05-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100438003C (zh) | 半导体器件 | |
JP4327656B2 (ja) | 半導体装置 | |
JP5113177B2 (ja) | 半導体素子およびその製造方法、ならびにその半導体素子を実装する実装構造体 | |
US7098126B2 (en) | Formation of electroplate solder on an organic circuit board for flip chip joints and board to board solder joints | |
EP0111823B1 (en) | Compressively stressed titanium metallurgy for contacting passivated semiconductor devices | |
KR100772920B1 (ko) | 솔더 범프가 형성된 반도체 칩 및 제조 방법 | |
JP4334647B2 (ja) | 半導体デバイス上に導電性バンプを形成する方法 | |
TWI333252B (en) | Semiconductor device, bump structure on a semiconductor substrate, flip chip package structure, method and a product of manufacturing a semiconductor device the same | |
US20080054461A1 (en) | Reliable wafer-level chip-scale package solder bump structure in a packaged semiconductor device | |
JP2007317979A (ja) | 半導体装置の製造方法 | |
TW200832643A (en) | Under bump metallurgy structure of a package and method of making same | |
US20100117231A1 (en) | Reliable wafer-level chip-scale solder bump structure | |
JP2001053100A (ja) | バンプ電極を有する半導体装置 | |
JP2007221080A (ja) | 半導体装置およびその製造方法 | |
US20070080391A1 (en) | Semiconductor device with front side metallization and method for the production thereof | |
US7176117B2 (en) | Method for mounting passive components on wafer | |
JP2006303036A (ja) | 半導体装置 | |
JP3261912B2 (ja) | バンプ付き半導体装置およびその製造方法 | |
US20020185743A1 (en) | Wafer level chip-scale package and a method for manufacturing | |
EP1322146A1 (en) | Method of electroplating solder bumps on an organic circuit board | |
JP5273920B2 (ja) | 半導体装置 | |
TW419712B (en) | Method of wafer level package and structure thereof | |
JPH0917795A (ja) | バンプ構造 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: RENESAS ELECTRONICS CORPORATION Free format text: FORMER NAME: NEC CORP. |
|
CP01 | Change in the name or title of a patent holder |
Address after: Kanagawa Patentee after: Renesas Electronics Corporation Address before: Kanagawa Patentee before: NEC Corp. |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081126 Termination date: 20140519 |