CA1161956A - High speed data transfer for a semiconductor memory - Google Patents
High speed data transfer for a semiconductor memoryInfo
- Publication number
- CA1161956A CA1161956A CA000373194A CA373194A CA1161956A CA 1161956 A CA1161956 A CA 1161956A CA 000373194 A CA000373194 A CA 000373194A CA 373194 A CA373194 A CA 373194A CA 1161956 A CA1161956 A CA 1161956A
- Authority
- CA
- Canada
- Prior art keywords
- data
- decoder
- input
- output
- successive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 230000015654 memory Effects 0.000 claims abstract description 72
- 230000004044 response Effects 0.000 claims abstract description 19
- 239000000872 buffer Substances 0.000 claims description 45
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 230000002401 inhibitory effect Effects 0.000 claims description 3
- 238000009877 rendering Methods 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 2
- 230000008569 process Effects 0.000 abstract description 2
- 238000010276 construction Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 101150087426 Gnal gene Proteins 0.000 description 2
- 230000004075 alteration Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- RLGNNNSZZAWLAY-UHFFFAOYSA-N 2-(2,3-dimethoxy-4-methylsulfanylphenyl)ethanamine Chemical compound COC1=C(CCN)C=CC(SC)=C1OC RLGNNNSZZAWLAY-UHFFFAOYSA-N 0.000 description 1
- IJJWOSAXNHWBPR-HUBLWGQQSA-N 5-[(3as,4s,6ar)-2-oxo-1,3,3a,4,6,6a-hexahydrothieno[3,4-d]imidazol-4-yl]-n-(6-hydrazinyl-6-oxohexyl)pentanamide Chemical compound N1C(=O)N[C@@H]2[C@H](CCCCC(=O)NCCCCCC(=O)NN)SC[C@@H]21 IJJWOSAXNHWBPR-HUBLWGQQSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- QHGVXILFMXYDRS-UHFFFAOYSA-N pyraclofos Chemical compound C1=C(OP(=O)(OCC)SCCC)C=NN1C1=CC=C(Cl)C=C1 QHGVXILFMXYDRS-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
- G11C7/1033—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers using data registers of which only one stage is addressed for sequentially outputting data from a predetermined number of stages, e.g. nibble read-write mode
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/106—Data output latches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1066—Output synchronization
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/195,729 US4344156A (en) | 1980-10-10 | 1980-10-10 | High speed data transfer for a semiconductor memory |
| US195,729 | 1988-05-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1161956A true CA1161956A (en) | 1984-02-07 |
Family
ID=22722545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000373194A Expired CA1161956A (en) | 1980-10-10 | 1981-03-17 | High speed data transfer for a semiconductor memory |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4344156A (enExample) |
| EP (1) | EP0049988B1 (enExample) |
| JP (1) | JPS5792473A (enExample) |
| CA (1) | CA1161956A (enExample) |
| DE (1) | DE3176726D1 (enExample) |
Families Citing this family (53)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4556961A (en) * | 1981-05-26 | 1985-12-03 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor memory with delay means to reduce peak currents |
| JPS57210495A (en) * | 1981-06-10 | 1982-12-24 | Nec Corp | Block access memory |
| US4480320A (en) * | 1982-06-01 | 1984-10-30 | General Instrument Corp. | Compact ROM with reduced access time |
| US4484308A (en) * | 1982-09-23 | 1984-11-20 | Motorola, Inc. | Serial data mode circuit for a memory |
| JPS5961152A (ja) * | 1982-09-30 | 1984-04-07 | Fujitsu Ltd | 半導体装置 |
| US4586167A (en) * | 1983-01-24 | 1986-04-29 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| JPS59135695A (ja) * | 1983-01-24 | 1984-08-03 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US4567579A (en) * | 1983-07-08 | 1986-01-28 | Texas Instruments Incorporated | Dynamic memory with high speed nibble mode |
| JPS6072020A (ja) * | 1983-09-29 | 1985-04-24 | Nec Corp | デュアルポ−トメモリ回路 |
| JPS60117492A (ja) * | 1983-11-29 | 1985-06-24 | Fujitsu Ltd | 半導体記憶装置 |
| JPS60136086A (ja) * | 1983-12-23 | 1985-07-19 | Hitachi Ltd | 半導体記憶装置 |
| GB8401804D0 (en) * | 1984-01-24 | 1984-02-29 | Int Computers Ltd | Data storage apparatus |
| JPH0787037B2 (ja) * | 1984-03-02 | 1995-09-20 | 沖電気工業株式会社 | 半導体メモリ回路のデータ書込方法 |
| JPH0799616B2 (ja) * | 1984-08-30 | 1995-10-25 | 三菱電機株式会社 | 半導体記憶装置 |
| US4719602A (en) * | 1985-02-07 | 1988-01-12 | Visic, Inc. | Memory with improved column access |
| US4630239A (en) * | 1985-07-01 | 1986-12-16 | Motorola, Inc. | Chip select speed-up circuit for a memory |
| JPS639096A (ja) * | 1986-06-30 | 1988-01-14 | Toshiba Corp | 半導体メモリ |
| JPS6363200A (ja) * | 1986-09-03 | 1988-03-19 | Mitsubishi Electric Corp | 半導体記憶装置 |
| EP0262413B1 (en) * | 1986-09-04 | 1992-07-22 | Fujitsu Limited | Memory device employing address multiplexing |
| JPS63136267U (enExample) * | 1987-02-26 | 1988-09-07 | ||
| US5313420A (en) | 1987-04-24 | 1994-05-17 | Kabushiki Kaisha Toshiba | Programmable semiconductor memory |
| US5245566A (en) * | 1987-04-24 | 1993-09-14 | Fujio Masuoka | Programmable semiconductor |
| JPH0752583B2 (ja) * | 1987-11-30 | 1995-06-05 | 株式会社東芝 | 半導体メモリ |
| JPH01175314A (ja) * | 1987-12-29 | 1989-07-11 | Nec Corp | 入力インバータ回路 |
| JPS63132893U (enExample) * | 1988-01-08 | 1988-08-30 | ||
| US5267200A (en) * | 1988-08-31 | 1993-11-30 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device and operating method thereof with transfer transistor used as a holding means |
| DE69023258T2 (de) * | 1989-03-15 | 1996-05-15 | Matsushita Electronics Corp | Halbleiter-Speichereinrichtung. |
| DE4114744C1 (enExample) * | 1991-05-06 | 1992-05-27 | Siemens Ag, 8000 Muenchen, De | |
| US6091639A (en) * | 1993-08-27 | 2000-07-18 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device and data programming method |
| US5506809A (en) * | 1994-06-29 | 1996-04-09 | Sharp Kabushiki Kaisha | Predictive status flag generation in a first-in first-out (FIFO) memory device method and apparatus |
| US6804760B2 (en) | 1994-12-23 | 2004-10-12 | Micron Technology, Inc. | Method for determining a type of memory present in a system |
| US5598376A (en) * | 1994-12-23 | 1997-01-28 | Micron Technology, Inc. | Distributed write data drivers for burst access memories |
| US5682354A (en) * | 1995-11-06 | 1997-10-28 | Micron Technology, Inc. | CAS recognition in burst extended data out DRAM |
| US6525971B2 (en) | 1995-06-30 | 2003-02-25 | Micron Technology, Inc. | Distributed write data drivers for burst access memories |
| US5675549A (en) * | 1994-12-23 | 1997-10-07 | Micron Technology, Inc. | Burst EDO memory device address counter |
| US5721859A (en) * | 1994-12-23 | 1998-02-24 | Micron Technology, Inc. | Counter control circuit in a burst memory |
| US5668773A (en) * | 1994-12-23 | 1997-09-16 | Micron Technology, Inc. | Synchronous burst extended data out DRAM |
| US5610864A (en) * | 1994-12-23 | 1997-03-11 | Micron Technology, Inc. | Burst EDO memory device with maximized write cycle timing |
| US5652724A (en) * | 1994-12-23 | 1997-07-29 | Micron Technology, Inc. | Burst EDO memory device having pipelined output buffer |
| US5640364A (en) * | 1994-12-23 | 1997-06-17 | Micron Technology, Inc. | Self-enabling pulse trapping circuit |
| US5729503A (en) * | 1994-12-23 | 1998-03-17 | Micron Technology, Inc. | Address transition detection on a synchronous design |
| US5526320A (en) * | 1994-12-23 | 1996-06-11 | Micron Technology Inc. | Burst EDO memory device |
| US5717654A (en) * | 1995-02-10 | 1998-02-10 | Micron Technology, Inc. | Burst EDO memory device with maximized write cycle timing |
| US5850368A (en) * | 1995-06-01 | 1998-12-15 | Micron Technology, Inc. | Burst EDO memory address counter |
| JP2900854B2 (ja) * | 1995-09-14 | 1999-06-02 | 日本電気株式会社 | 半導体記憶装置 |
| US5729504A (en) * | 1995-12-14 | 1998-03-17 | Micron Technology, Inc. | Continuous burst edo memory device |
| US5966724A (en) * | 1996-01-11 | 1999-10-12 | Micron Technology, Inc. | Synchronous memory device with dual page and burst mode operations |
| US7681005B1 (en) | 1996-01-11 | 2010-03-16 | Micron Technology, Inc. | Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation |
| US6981126B1 (en) * | 1996-07-03 | 2005-12-27 | Micron Technology, Inc. | Continuous interleave burst access |
| US6401186B1 (en) | 1996-07-03 | 2002-06-04 | Micron Technology, Inc. | Continuous burst memory which anticipates a next requested start address |
| JPH10124447A (ja) * | 1996-10-18 | 1998-05-15 | Fujitsu Ltd | データ転送制御方法及び装置 |
| US7103742B1 (en) | 1997-12-03 | 2006-09-05 | Micron Technology, Inc. | Burst/pipelined edo memory device |
| US7927948B2 (en) | 2005-07-20 | 2011-04-19 | Micron Technology, Inc. | Devices with nanocrystals and methods of formation |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3857046A (en) * | 1970-11-04 | 1974-12-24 | Gen Instrument Corp | Shift register-decoder circuit for addressing permanent storage memory |
| US3771145B1 (en) * | 1971-02-01 | 1994-11-01 | Wiener Patricia P. | Integrated circuit read-only memory |
| NL7309642A (nl) * | 1973-07-11 | 1975-01-14 | Philips Nv | Geintegreerd geheugen. |
| DE2712735B1 (de) * | 1977-03-23 | 1978-09-14 | Ibm Deutschland | Lese-/Schreibzugriffschaltung zu Speicherzellen eines Speichers und Verfahren zu ihrem Betrieb |
| JPS5410412A (en) * | 1977-06-23 | 1979-01-26 | Kyokuto Kikai Seisakusho:Kk | Low noise multi-stage axial flow blower |
| US4254477A (en) * | 1978-10-25 | 1981-03-03 | Mcdonnell Douglas Corporation | Reconfigurable memory circuit |
| US4279023A (en) * | 1979-12-19 | 1981-07-14 | International Business Machines Corporation | Sense latch |
| JPS5727477A (en) * | 1980-07-23 | 1982-02-13 | Nec Corp | Memory circuit |
| JPS6118837A (ja) * | 1984-07-06 | 1986-01-27 | Yaskawa Electric Mfg Co Ltd | 造波装置 |
-
1980
- 1980-10-10 US US06/195,729 patent/US4344156A/en not_active Expired - Lifetime
-
1981
- 1981-03-17 CA CA000373194A patent/CA1161956A/en not_active Expired
- 1981-10-05 DE DE8181304605T patent/DE3176726D1/de not_active Expired
- 1981-10-05 JP JP56158570A patent/JPS5792473A/ja active Granted
- 1981-10-05 EP EP81304605A patent/EP0049988B1/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE3176726D1 (en) | 1988-06-01 |
| EP0049988B1 (en) | 1988-04-27 |
| EP0049988A2 (en) | 1982-04-21 |
| JPS6129069B2 (enExample) | 1986-07-04 |
| JPS5792473A (en) | 1982-06-09 |
| EP0049988A3 (en) | 1983-09-28 |
| US4344156A (en) | 1982-08-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA1161956A (en) | High speed data transfer for a semiconductor memory | |
| US3969706A (en) | Dynamic random access memory misfet integrated circuit | |
| US6577553B2 (en) | Semiconductor memory device | |
| KR100626392B1 (ko) | 읽기 속도를 향상시킬 수 있는 플래시 메모리 장치 | |
| EP0416827B1 (en) | A memory with improved bit line equalization | |
| KR100680520B1 (ko) | 프리셋 스위치를 갖는 멀티-포트 메모리 셀 | |
| EP0145488B1 (en) | Semiconductor memory device | |
| JPH0773664A (ja) | 半導体メモリ装置のデータアクセス時間短縮回路 | |
| KR950009227B1 (ko) | 멀티 포트 ram용 메모리셀 | |
| JPS61160898A (ja) | 半導体記憶装置 | |
| GB2286072A (en) | Sense amplification in data memories | |
| JPH03147152A (ja) | メモリ・システム | |
| JPS61175994A (ja) | メモリのデコ−ド・ドライブ回路 | |
| JP2002197870A (ja) | 半導体メモリ及びその動作方法 | |
| JPH0146957B2 (enExample) | ||
| US4901280A (en) | Pull-up circuit for high impedance word lines | |
| JP2795074B2 (ja) | ダイナミックram | |
| US4985872A (en) | Sequencing column select circuit for a random access memory | |
| JPH06139776A (ja) | 半導体記憶装置 | |
| JPS6249676B2 (enExample) | ||
| EP0321847B1 (en) | Semiconductor memory capable of improving data rewrite speed | |
| JPH09139075A (ja) | Dramアレイ | |
| US4415993A (en) | Fast access non-volatile memory | |
| EP0317963A2 (en) | Semiconductor memory device having dRAM cells | |
| JPH02244479A (ja) | 半導体メモリ装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |