DE3176726D1 - High speed data transfer for a semiconductor memory - Google Patents

High speed data transfer for a semiconductor memory

Info

Publication number
DE3176726D1
DE3176726D1 DE8181304605T DE3176726T DE3176726D1 DE 3176726 D1 DE3176726 D1 DE 3176726D1 DE 8181304605 T DE8181304605 T DE 8181304605T DE 3176726 T DE3176726 T DE 3176726T DE 3176726 D1 DE3176726 D1 DE 3176726D1
Authority
DE
Germany
Prior art keywords
high speed
semiconductor memory
data transfer
speed data
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181304605T
Other languages
English (en)
Inventor
Sargent Sheffield Eaton
David Rudolph Wooten
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inmos Corp
Original Assignee
Inmos Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inmos Corp filed Critical Inmos Corp
Application granted granted Critical
Publication of DE3176726D1 publication Critical patent/DE3176726D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • G11C7/1033Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers using data registers of which only one stage is addressed for sequentially outputting data from a predetermined number of stages, e.g. nibble read-write mode
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/04Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE8181304605T 1980-10-10 1981-10-05 High speed data transfer for a semiconductor memory Expired DE3176726D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/195,729 US4344156A (en) 1980-10-10 1980-10-10 High speed data transfer for a semiconductor memory

Publications (1)

Publication Number Publication Date
DE3176726D1 true DE3176726D1 (en) 1988-06-01

Family

ID=22722545

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181304605T Expired DE3176726D1 (en) 1980-10-10 1981-10-05 High speed data transfer for a semiconductor memory

Country Status (5)

Country Link
US (1) US4344156A (de)
EP (1) EP0049988B1 (de)
JP (1) JPS5792473A (de)
CA (1) CA1161956A (de)
DE (1) DE3176726D1 (de)

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US4556961A (en) * 1981-05-26 1985-12-03 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with delay means to reduce peak currents
JPS57210495A (en) * 1981-06-10 1982-12-24 Nec Corp Block access memory
US4480320A (en) * 1982-06-01 1984-10-30 General Instrument Corp. Compact ROM with reduced access time
US4484308A (en) * 1982-09-23 1984-11-20 Motorola, Inc. Serial data mode circuit for a memory
JPS5961152A (ja) * 1982-09-30 1984-04-07 Fujitsu Ltd 半導体装置
US4586167A (en) * 1983-01-24 1986-04-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
JPS59135695A (ja) * 1983-01-24 1984-08-03 Mitsubishi Electric Corp 半導体記憶装置
US4567579A (en) * 1983-07-08 1986-01-28 Texas Instruments Incorporated Dynamic memory with high speed nibble mode
JPS6072020A (ja) * 1983-09-29 1985-04-24 Nec Corp デュアルポ−トメモリ回路
JPS60117492A (ja) * 1983-11-29 1985-06-24 Fujitsu Ltd 半導体記憶装置
JPS60136086A (ja) * 1983-12-23 1985-07-19 Hitachi Ltd 半導体記憶装置
GB8401804D0 (en) * 1984-01-24 1984-02-29 Int Computers Ltd Data storage apparatus
JPH0787037B2 (ja) * 1984-03-02 1995-09-20 沖電気工業株式会社 半導体メモリ回路のデータ書込方法
JPH0799616B2 (ja) * 1984-08-30 1995-10-25 三菱電機株式会社 半導体記憶装置
US4719602A (en) * 1985-02-07 1988-01-12 Visic, Inc. Memory with improved column access
US4630239A (en) * 1985-07-01 1986-12-16 Motorola, Inc. Chip select speed-up circuit for a memory
JPS639096A (ja) * 1986-06-30 1988-01-14 Toshiba Corp 半導体メモリ
JPS6363200A (ja) * 1986-09-03 1988-03-19 Mitsubishi Electric Corp 半導体記憶装置
EP0262413B1 (de) * 1986-09-04 1992-07-22 Fujitsu Limited Speichereinrichtung unter Verwendung von Adressenmultiplex
JPS63136267U (de) * 1987-02-26 1988-09-07
US5313420A (en) * 1987-04-24 1994-05-17 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US5245566A (en) * 1987-04-24 1993-09-14 Fujio Masuoka Programmable semiconductor
JPH0752583B2 (ja) * 1987-11-30 1995-06-05 株式会社東芝 半導体メモリ
JPH01175314A (ja) * 1987-12-29 1989-07-11 Nec Corp 入力インバータ回路
JPS63132893U (de) * 1988-01-08 1988-08-30
DE3928902C2 (de) * 1988-08-31 1996-01-25 Mitsubishi Electric Corp Halbleiterspeicher und Verfahren zum Betreiben desselben und Verwendung desselben in einem Video-RAM
EP0388175B1 (de) * 1989-03-15 1995-11-02 Matsushita Electronics Corporation Halbleiter-Speichereinrichtung
DE4114744C1 (de) * 1991-05-06 1992-05-27 Siemens Ag, 8000 Muenchen, De
US6091639A (en) 1993-08-27 2000-07-18 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and data programming method
US5506809A (en) * 1994-06-29 1996-04-09 Sharp Kabushiki Kaisha Predictive status flag generation in a first-in first-out (FIFO) memory device method and apparatus
US5729503A (en) * 1994-12-23 1998-03-17 Micron Technology, Inc. Address transition detection on a synchronous design
US5668773A (en) * 1994-12-23 1997-09-16 Micron Technology, Inc. Synchronous burst extended data out DRAM
US5721859A (en) * 1994-12-23 1998-02-24 Micron Technology, Inc. Counter control circuit in a burst memory
US5526320A (en) 1994-12-23 1996-06-11 Micron Technology Inc. Burst EDO memory device
US5682354A (en) * 1995-11-06 1997-10-28 Micron Technology, Inc. CAS recognition in burst extended data out DRAM
US5598376A (en) * 1994-12-23 1997-01-28 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5652724A (en) * 1994-12-23 1997-07-29 Micron Technology, Inc. Burst EDO memory device having pipelined output buffer
US6525971B2 (en) 1995-06-30 2003-02-25 Micron Technology, Inc. Distributed write data drivers for burst access memories
US5675549A (en) * 1994-12-23 1997-10-07 Micron Technology, Inc. Burst EDO memory device address counter
US5610864A (en) * 1994-12-23 1997-03-11 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5640364A (en) * 1994-12-23 1997-06-17 Micron Technology, Inc. Self-enabling pulse trapping circuit
US6804760B2 (en) 1994-12-23 2004-10-12 Micron Technology, Inc. Method for determining a type of memory present in a system
US5717654A (en) * 1995-02-10 1998-02-10 Micron Technology, Inc. Burst EDO memory device with maximized write cycle timing
US5850368A (en) * 1995-06-01 1998-12-15 Micron Technology, Inc. Burst EDO memory address counter
JP2900854B2 (ja) * 1995-09-14 1999-06-02 日本電気株式会社 半導体記憶装置
US5729504A (en) * 1995-12-14 1998-03-17 Micron Technology, Inc. Continuous burst edo memory device
US7681005B1 (en) * 1996-01-11 2010-03-16 Micron Technology, Inc. Asynchronously-accessible memory device with mode selection circuitry for burst or pipelined operation
US5966724A (en) * 1996-01-11 1999-10-12 Micron Technology, Inc. Synchronous memory device with dual page and burst mode operations
US6401186B1 (en) 1996-07-03 2002-06-04 Micron Technology, Inc. Continuous burst memory which anticipates a next requested start address
US6981126B1 (en) * 1996-07-03 2005-12-27 Micron Technology, Inc. Continuous interleave burst access
JPH10124447A (ja) * 1996-10-18 1998-05-15 Fujitsu Ltd データ転送制御方法及び装置
US7103742B1 (en) 1997-12-03 2006-09-05 Micron Technology, Inc. Burst/pipelined edo memory device
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation

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US3857046A (en) * 1970-11-04 1974-12-24 Gen Instrument Corp Shift register-decoder circuit for addressing permanent storage memory
US3771145B1 (en) * 1971-02-01 1994-11-01 Wiener Patricia P. Integrated circuit read-only memory
NL7309642A (nl) * 1973-07-11 1975-01-14 Philips Nv Geintegreerd geheugen.
DE2712735B1 (de) * 1977-03-23 1978-09-14 Ibm Deutschland Lese-/Schreibzugriffschaltung zu Speicherzellen eines Speichers und Verfahren zu ihrem Betrieb
JPS5410412A (en) * 1977-06-23 1979-01-26 Kyokuto Kikai Seisakusho:Kk Low noise multi-stage axial flow blower
US4254477A (en) * 1978-10-25 1981-03-03 Mcdonnell Douglas Corporation Reconfigurable memory circuit
US4279023A (en) * 1979-12-19 1981-07-14 International Business Machines Corporation Sense latch
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
JPS6118837A (ja) * 1984-07-06 1986-01-27 Yaskawa Electric Mfg Co Ltd 造波装置

Also Published As

Publication number Publication date
EP0049988A2 (de) 1982-04-21
CA1161956A (en) 1984-02-07
US4344156A (en) 1982-08-10
EP0049988B1 (de) 1988-04-27
JPS6129069B2 (de) 1986-07-04
JPS5792473A (en) 1982-06-09
EP0049988A3 (en) 1983-09-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition