GB8308215D0 - Memory data transfer - Google Patents

Memory data transfer

Info

Publication number
GB8308215D0
GB8308215D0 GB838308215A GB8308215A GB8308215D0 GB 8308215 D0 GB8308215 D0 GB 8308215D0 GB 838308215 A GB838308215 A GB 838308215A GB 8308215 A GB8308215 A GB 8308215A GB 8308215 D0 GB8308215 D0 GB 8308215D0
Authority
GB
United Kingdom
Prior art keywords
data transfer
memory data
memory
transfer
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB838308215A
Other versions
GB2117945A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of GB8308215D0 publication Critical patent/GB8308215D0/en
Publication of GB2117945A publication Critical patent/GB2117945A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1678—Details of memory controller using bus width
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
GB08308215A 1982-04-01 1983-03-25 Memory data transfer Withdrawn GB2117945A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US36454682A 1982-04-01 1982-04-01

Publications (2)

Publication Number Publication Date
GB8308215D0 true GB8308215D0 (en) 1983-05-05
GB2117945A GB2117945A (en) 1983-10-19

Family

ID=23434966

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08308215A Withdrawn GB2117945A (en) 1982-04-01 1983-03-25 Memory data transfer

Country Status (5)

Country Link
JP (1) JPS58185080A (en)
DE (1) DE3311731A1 (en)
FR (1) FR2524671A1 (en)
GB (1) GB2117945A (en)
NL (1) NL8301171A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4507731A (en) * 1982-11-01 1985-03-26 Raytheon Company Bidirectional data byte aligner
CA1233270A (en) * 1985-03-18 1988-02-23 Vojin G. Oklobdzija Register selection mechanism and organization of an instruction prefetch buffer
FR2748595B1 (en) * 1996-05-10 1998-07-10 Sgs Thomson Microelectronics PARALLEL ACCESS MEMORY

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE758811A (en) * 1969-11-28 1971-04-16 Burroughs Corp INFORMATION PROCESSING SYSTEM HAVING A STORAGE WITHOUT STRUCTURE FOR NAPPED PROCESSING
US3781812A (en) * 1971-06-28 1973-12-25 Burroughs Corp Addressing system responsive to a transfer vector for accessing a memory
US3858183A (en) * 1972-10-30 1974-12-31 Amdahl Corp Data processing system and method therefor
GB1524850A (en) * 1975-12-23 1978-09-13 Ferranti Ltd Data processing apparatus
DE2656086C2 (en) * 1976-12-10 1986-08-28 Siemens AG, 1000 Berlin und 8000 München Computer system
GB1570882A (en) * 1978-04-15 1980-07-09 Plessey Co Ltd Data storage arrangement

Also Published As

Publication number Publication date
GB2117945A (en) 1983-10-19
JPS58185080A (en) 1983-10-28
DE3311731A1 (en) 1983-10-13
FR2524671A1 (en) 1983-10-07
NL8301171A (en) 1983-11-01

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)