CA1150838A - Decoder circuit - Google Patents

Decoder circuit

Info

Publication number
CA1150838A
CA1150838A CA000370290A CA370290A CA1150838A CA 1150838 A CA1150838 A CA 1150838A CA 000370290 A CA000370290 A CA 000370290A CA 370290 A CA370290 A CA 370290A CA 1150838 A CA1150838 A CA 1150838A
Authority
CA
Canada
Prior art keywords
selection circuit
high level
circuit
output
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000370290A
Other languages
English (en)
French (fr)
Inventor
Hideaki Isogai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of CA1150838A publication Critical patent/CA1150838A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/001Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used
    • H03M7/005Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415Address circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
CA000370290A 1980-02-08 1981-02-06 Decoder circuit Expired CA1150838A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1457680A JPS56112122A (en) 1980-02-08 1980-02-08 Decoder circuit
JP14576/80 1980-02-08

Publications (1)

Publication Number Publication Date
CA1150838A true CA1150838A (en) 1983-07-26

Family

ID=11864981

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000370290A Expired CA1150838A (en) 1980-02-08 1981-02-06 Decoder circuit

Country Status (5)

Country Link
US (1) US4369503A (cg-RX-API-DMAC7.html)
EP (1) EP0035326A3 (cg-RX-API-DMAC7.html)
JP (1) JPS56112122A (cg-RX-API-DMAC7.html)
CA (1) CA1150838A (cg-RX-API-DMAC7.html)
IE (1) IE51987B1 (cg-RX-API-DMAC7.html)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592291A (ja) * 1982-06-28 1984-01-07 Fujitsu Ltd プログラマブル・リ−ドオンリ・メモリ装置
JPS5960794A (ja) * 1982-09-29 1984-04-06 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS5990291A (ja) * 1982-11-16 1984-05-24 Nec Corp メモリ
JPS59124092A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd メモリ装置
US4660178A (en) * 1983-09-21 1987-04-21 Inmos Corporation Multistage decoding
JPS60254484A (ja) * 1984-05-31 1985-12-16 Fujitsu Ltd 2段デコーダ回路
US4613774A (en) * 1984-07-09 1986-09-23 Advanced Micro Devices, Inc. Unitary multiplexer-decoder circuit
EP0176908B1 (de) * 1984-09-24 1990-01-24 Siemens Aktiengesellschaft UND-Gatter für ECL-Schaltungen
DE3575059D1 (de) * 1984-09-24 1990-02-01 Siemens Ag Und-gatter fuer ecl-schaltungen.
US4633220A (en) * 1984-11-29 1986-12-30 American Microsystems, Inc. Decoder using pass-transistor networks
FR2580420B1 (fr) * 1985-04-16 1991-05-31 Radiotechnique Compelec Decodeur a diodes notamment utilisable dans une memoire bipolaire
JPS6453395A (en) * 1987-08-25 1989-03-01 Mitsubishi Electric Corp Semiconductor memory device
JPH01285090A (ja) * 1988-05-11 1989-11-16 Nippon Telegr & Teleph Corp <Ntt> バイポーラcmos番地選択回路
JPH0250621A (ja) * 1988-08-12 1990-02-20 Toshiba Corp 論理回路
DE3883389T2 (de) * 1988-10-28 1994-03-17 Ibm Zweistufige Adressendekodierschaltung für Halbleiterspeicher.
JPH02107267U (cg-RX-API-DMAC7.html) * 1989-02-13 1990-08-27
JP2504571B2 (ja) * 1989-08-04 1996-06-05 富士通株式会社 半導体集積回路装置
US5402386A (en) * 1992-10-14 1995-03-28 Sun Microsystems, Inc. Word line decoder/driver circuit and method
EP2492668B1 (en) * 2011-02-28 2013-08-28 C.R.F. Società Consortile per Azioni System and method for monitoring painting quality of components, in particular of motor-vehicle bodies

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736574A (en) * 1971-12-30 1973-05-29 Ibm Pseudo-hierarchy memory system
US4027285A (en) * 1973-12-26 1977-05-31 Motorola, Inc. Decode circuitry for bipolar random access memory
US4007451A (en) * 1975-05-30 1977-02-08 International Business Machines Corporation Method and circuit arrangement for operating a highly integrated monolithic information store
DE2658523A1 (de) * 1976-12-23 1978-06-29 Siemens Ag Halbleiterspeicher
JPS53120233A (en) * 1977-03-30 1978-10-20 Toshiba Corp Address decoder
US4167727A (en) * 1977-07-08 1979-09-11 Motorola, Inc. Logic circuits incorporating a dual function input
DE2904457C3 (de) * 1979-02-06 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Adressdecoder
JPS5833634B2 (ja) * 1979-02-28 1983-07-21 富士通株式会社 メモリセルアレイの駆動方式
JPS5631137A (en) * 1979-08-22 1981-03-28 Fujitsu Ltd Decoder circuit

Also Published As

Publication number Publication date
US4369503A (en) 1983-01-18
EP0035326A3 (en) 1981-09-23
JPS56112122A (en) 1981-09-04
IE810237L (en) 1981-08-08
IE51987B1 (en) 1987-05-13
EP0035326A2 (en) 1981-09-09
JPS6261177B2 (cg-RX-API-DMAC7.html) 1987-12-19

Similar Documents

Publication Publication Date Title
CA1150838A (en) Decoder circuit
KR910000140B1 (ko) 용장성 회로부를 갖춘 반도체 메모리장치
JP2586722B2 (ja) 半導体記憶装置
KR900008658B1 (ko) 용장서 구조를 갖춘 반도체 메모리 장치
US4745582A (en) Bipolar-transistor type random access memory device having redundancy configuration
US4385370A (en) Decoder circuit
EP0055551A2 (en) Output buffer circuit
US4858183A (en) ECL high speed semiconductor memory and method of accessing stored information therein
US4651302A (en) Read only memory including an isolation network connected between the array of memory cells and the output sense amplifier whereby reading speed is enhanced
US4464735A (en) Semiconductor memory
US4561070A (en) Integrated circuit memory
US4757475A (en) Semiconductor memory device having diode matrix type decoder and redundancy configuration
US5359553A (en) Low power ECL/MOS level converting circuit and memory device and method of converting a signal level
EP0289893B1 (en) Bipmos decoder circuit
JP2901973B2 (ja) 半導体集積回路装置
US3821719A (en) Semiconductor memory
US3540002A (en) Content addressable memory
US4791382A (en) Driver circuit
US4730275A (en) Circuit for reducing the row select voltage swing in a memory array
US4635231A (en) Semiconductor memory with constant readout capability
US3736573A (en) Resistor sensing bit switch
KR840001461B1 (ko) 디코우더(decoder)회로
US4570238A (en) Selectable write current source for bipolar rams
US4570090A (en) High-speed sense amplifier circuit with inhibit capability
US4697104A (en) Two stage decoder circuit using threshold logic to decode high-order bits and diode-matrix logic to decode low-order bits

Legal Events

Date Code Title Description
MKEX Expiry
MKEX Expiry

Effective date: 20000726