BR8705231A - Estrutura e celula de capacitor em trincheira de semicondutor com construcao de fusao de isolamento e de trincheira de no,matriz feita com tais celulas e metodo de producao de dita estrutura - Google Patents

Estrutura e celula de capacitor em trincheira de semicondutor com construcao de fusao de isolamento e de trincheira de no,matriz feita com tais celulas e metodo de producao de dita estrutura

Info

Publication number
BR8705231A
BR8705231A BR8705231A BR8705231A BR8705231A BR 8705231 A BR8705231 A BR 8705231A BR 8705231 A BR8705231 A BR 8705231A BR 8705231 A BR8705231 A BR 8705231A BR 8705231 A BR8705231 A BR 8705231A
Authority
BR
Brazil
Prior art keywords
trusch
truck
insulation
cells
semiconductor
Prior art date
Application number
BR8705231A
Other languages
English (en)
Inventor
Donald Mcalpine Kenney
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8705231A publication Critical patent/BR8705231A/pt

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
BR8705231A 1986-10-31 1987-10-02 Estrutura e celula de capacitor em trincheira de semicondutor com construcao de fusao de isolamento e de trincheira de no,matriz feita com tais celulas e metodo de producao de dita estrutura BR8705231A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/925,570 US4801988A (en) 1986-10-31 1986-10-31 Semiconductor trench capacitor cell with merged isolation and node trench construction

Publications (1)

Publication Number Publication Date
BR8705231A true BR8705231A (pt) 1988-05-24

Family

ID=25451925

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8705231A BR8705231A (pt) 1986-10-31 1987-10-02 Estrutura e celula de capacitor em trincheira de semicondutor com construcao de fusao de isolamento e de trincheira de no,matriz feita com tais celulas e metodo de producao de dita estrutura

Country Status (5)

Country Link
US (1) US4801988A (pt)
EP (1) EP0265616B1 (pt)
JP (1) JPH06105767B2 (pt)
BR (1) BR8705231A (pt)
DE (1) DE3788499T2 (pt)

Families Citing this family (66)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900003262B1 (ko) * 1987-04-30 1990-05-12 삼성전자 주식회사 반도체 장치의 제조방법
US4912535A (en) * 1987-08-08 1990-03-27 Mitsubishi Denki Kabushiki Kaisha Trench type semiconductor memory device having side wall contact
JPH0821685B2 (ja) * 1988-02-26 1996-03-04 株式会社東芝 半導体メモリの製造方法
US5105245A (en) * 1988-06-28 1992-04-14 Texas Instruments Incorporated Trench capacitor DRAM cell with diffused bit lines adjacent to a trench
US5225363A (en) * 1988-06-28 1993-07-06 Texas Instruments Incorporated Trench capacitor DRAM cell and method of manufacture
KR910007181B1 (ko) * 1988-09-22 1991-09-19 현대전자산업 주식회사 Sdtas구조로 이루어진 dram셀 및 그 제조방법
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
US5307356A (en) * 1990-04-16 1994-04-26 International Business Machines Corporation Interlocked on-chip ECC system
US5064777A (en) * 1990-06-28 1991-11-12 International Business Machines Corporation Fabrication method for a double trench memory cell device
US5034787A (en) * 1990-06-28 1991-07-23 International Business Machines Corporation Structure and fabrication method for a double trench memory cell device
JP3128834B2 (ja) * 1991-01-28 2001-01-29 日本電気株式会社 半導体装置
JP2819520B2 (ja) * 1991-05-07 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション Dramセル
JPH05225798A (ja) * 1991-08-14 1993-09-03 Internatl Business Mach Corp <Ibm> メモリシステム
JP2994110B2 (ja) * 1991-09-09 1999-12-27 株式会社東芝 半導体記憶装置
US5255224A (en) * 1991-12-18 1993-10-19 International Business Machines Corporation Boosted drive system for master/local word line memory architecture
US5264716A (en) * 1992-01-09 1993-11-23 International Business Machines Corporation Diffused buried plate trench dram cell array
JPH07112049B2 (ja) * 1992-01-09 1995-11-29 インターナショナル・ビジネス・マシーンズ・コーポレイション ダイナミック・ランダム・アクセス・メモリ・デバイスおよび製造方法
US5250829A (en) * 1992-01-09 1993-10-05 International Business Machines Corporation Double well substrate plate trench DRAM cell array
US5528062A (en) * 1992-06-17 1996-06-18 International Business Machines Corporation High-density DRAM structure on soi
JPH0799771B2 (ja) * 1992-06-26 1995-10-25 インターナショナル・ビジネス・マシーンズ・コーポレイション 皮膜中の応力を制御する方法
US5365097A (en) * 1992-10-05 1994-11-15 International Business Machines Corporation Vertical epitaxial SOI transistor, memory cell and fabrication methods
US5434109A (en) * 1993-04-27 1995-07-18 International Business Machines Corporation Oxidation of silicon nitride in semiconductor devices
US5422294A (en) * 1993-05-03 1995-06-06 Noble, Jr.; Wendell P. Method of making a trench capacitor field shield with sidewall contact
JP3480745B2 (ja) * 1993-09-16 2003-12-22 株式会社東芝 半導体装置の製造方法
US5360758A (en) * 1993-12-03 1994-11-01 International Business Machines Corporation Self-aligned buried strap for trench type DRAM cells
US5448090A (en) * 1994-08-03 1995-09-05 International Business Machines Corporation Structure for reducing parasitic leakage in a memory array with merged isolation and node trench construction
US5627092A (en) * 1994-09-26 1997-05-06 Siemens Aktiengesellschaft Deep trench dram process on SOI for low leakage DRAM cell
US5508542A (en) * 1994-10-28 1996-04-16 International Business Machines Corporation Porous silicon trench and capacitor structures
US5936271A (en) * 1994-11-15 1999-08-10 Siemens Aktiengesellschaft Unit cell layout and transfer gate design for high density DRAMs having a trench capacitor with signal electrode composed of three differently doped polysilicon layers
US5895255A (en) * 1994-11-30 1999-04-20 Kabushiki Kaisha Toshiba Shallow trench isolation formation with deep trench cap
US5545581A (en) * 1994-12-06 1996-08-13 International Business Machines Corporation Plug strap process utilizing selective nitride and oxide etches
US5641694A (en) * 1994-12-22 1997-06-24 International Business Machines Corporation Method of fabricating vertical epitaxial SOI transistor
US6252267B1 (en) 1994-12-28 2001-06-26 International Business Machines Corporation Five square folded-bitline DRAM cell
US5576566A (en) * 1995-04-13 1996-11-19 International Business Machines Corporation Semiconductor trench capacitor cell having a buried strap
US5545583A (en) * 1995-04-13 1996-08-13 International Business Machines Corporation Method of making semiconductor trench capacitor cell having a buried strap
US5885425A (en) * 1995-06-06 1999-03-23 International Business Machines Corporation Method for selective material deposition on one side of raised or recessed features
US5731941A (en) * 1995-09-08 1998-03-24 International Business Machines Corporation Electrostatic discharge suppression circuit employing trench capacitor
US5908310A (en) 1995-12-27 1999-06-01 International Business Machines Corporation Method to form a buried implanted plate for DRAM trench storage capacitors
US5684313A (en) * 1996-02-20 1997-11-04 Kenney; Donald M. Vertical precharge structure for DRAM
US5656535A (en) * 1996-03-04 1997-08-12 Siemens Aktiengesellschaft Storage node process for deep trench-based DRAM
US5684314A (en) * 1996-03-18 1997-11-04 Kenney; Donald M. Trench capacitor precharge structure and leakage shield
US5748547A (en) * 1996-05-24 1998-05-05 Shau; Jeng-Jye High performance semiconductor memory devices having multiple dimension bit lines
US20050036363A1 (en) * 1996-05-24 2005-02-17 Jeng-Jye Shau High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
US5923971A (en) * 1996-10-22 1999-07-13 International Business Machines Corporation Reliable low resistance strap for trench storage DRAM cell using selective epitaxy
US5953607A (en) * 1997-06-06 1999-09-14 International Business Machines Corporation Buried strap for trench storage capacitors in dram trench cells
JP3132435B2 (ja) * 1997-09-22 2001-02-05 日本電気株式会社 半導体装置の製造方法
US5990511A (en) * 1997-10-16 1999-11-23 International Business Machines Corporation Memory cell with transfer device node in selective polysilicon
DE19752968C1 (de) * 1997-11-28 1999-06-24 Siemens Ag Speicherzellenanordnung und Verfahren zu deren Herstellung
US6236079B1 (en) 1997-12-02 2001-05-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device having a trench capacitor
US6699794B1 (en) * 1998-03-09 2004-03-02 Siemens Aktiengesellschaft Self aligned buried plate
KR100289749B1 (ko) * 1998-05-12 2001-05-15 윤종용 도전패드형성방법
US5949700A (en) * 1998-05-26 1999-09-07 International Business Machines Corporation Five square vertical dynamic random access memory cell
US6107133A (en) * 1998-05-28 2000-08-22 International Business Machines Corporation Method for making a five square vertical DRAM cell
US6225158B1 (en) 1998-05-28 2001-05-01 International Business Machines Corporation Trench storage dynamic random access memory cell with vertical transfer device
US6121651A (en) * 1998-07-30 2000-09-19 International Business Machines Corporation Dram cell with three-sided-gate transfer device
US6110792A (en) * 1998-08-19 2000-08-29 International Business Machines Corporation Method for making DRAM capacitor strap
JP3580719B2 (ja) * 1999-03-03 2004-10-27 株式会社東芝 半導体記憶装置及びその製造方法
US6380575B1 (en) 1999-08-31 2002-04-30 International Business Machines Corporation DRAM trench cell
DE19944011B4 (de) * 1999-09-14 2007-10-18 Infineon Technologies Ag Verfahren zur Bildung mindestens zweier Speicherzellen eines Halbleiterspeichers
AU7565400A (en) * 1999-09-17 2001-04-17 Telefonaktiebolaget Lm Ericsson (Publ) A self-aligned method for forming deep trenches in shallow trenches for isolation of semiconductor devices
TW552669B (en) * 2000-06-19 2003-09-11 Infineon Technologies Corp Process for etching polysilicon gate stacks with raised shallow trench isolation structures
KR100930336B1 (ko) * 2002-12-27 2009-12-08 후지쯔 마이크로일렉트로닉스 가부시키가이샤 반도체 장치, dram 집적 회로 장치 및 그 제조 방법
US6987044B2 (en) * 2003-09-25 2006-01-17 Promos Technologies Inc. Volatile memory structure and method for forming the same
US7341765B2 (en) * 2004-01-27 2008-03-11 Battelle Energy Alliance, Llc Metallic coatings on silicon substrates, and methods of forming metallic coatings on silicon substrates
US8557657B1 (en) * 2012-05-18 2013-10-15 International Business Machines Corporation Retrograde substrate for deep trench capacitors
US9443857B2 (en) * 2014-12-05 2016-09-13 Globalfoundries Inc. Vertical fin eDRAM

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
US4376983A (en) * 1980-03-21 1983-03-15 Texas Instruments Incorporated High density dynamic memory cell
US4397075A (en) * 1980-07-03 1983-08-09 International Business Machines Corporation FET Memory cell structure and process
US4661832A (en) * 1982-06-30 1987-04-28 International Business Machines Corporation Total dielectric isolation for integrated circuits
JPS5919366A (ja) * 1982-07-23 1984-01-31 Hitachi Ltd 半導体記憶装置
US4688069A (en) * 1984-03-22 1987-08-18 International Business Machines Corporation Isolation for high density integrated circuits
US4688063A (en) * 1984-06-29 1987-08-18 International Business Machines Corporation Dynamic ram cell with MOS trench capacitor in CMOS
JPH0722184B2 (ja) * 1984-07-03 1995-03-08 テキサス インスツルメンツ インコ−ポレイテツド ダイナミック・メモリ・セルの製造法
JPS6132466A (ja) * 1984-07-25 1986-02-15 Hitachi Ltd 半導体集積回路装置
US4651184A (en) * 1984-08-31 1987-03-17 Texas Instruments Incorporated Dram cell and array
JPS6190395A (ja) * 1984-10-09 1986-05-08 Fujitsu Ltd 半導体記憶装置
JPS61108163A (ja) * 1984-11-01 1986-05-26 Nec Corp 半導体記憶装置の製造方法
DE3681490D1 (de) * 1985-04-01 1991-10-24 Nec Corp Dynamische speicheranordnung mit wahlfreiem zugriff mit einer vielzahl von eintransistorspeicherzellen.

Also Published As

Publication number Publication date
JPS63122162A (ja) 1988-05-26
DE3788499D1 (de) 1994-01-27
JPH06105767B2 (ja) 1994-12-21
EP0265616A2 (en) 1988-05-04
DE3788499T2 (de) 1994-06-30
EP0265616B1 (en) 1993-12-15
EP0265616A3 (en) 1989-08-30
US4801988A (en) 1989-01-31

Similar Documents

Publication Publication Date Title
BR8705231A (pt) Estrutura e celula de capacitor em trincheira de semicondutor com construcao de fusao de isolamento e de trincheira de no,matriz feita com tais celulas e metodo de producao de dita estrutura
DE68919399D1 (de) Dünnschichtsolarzelle und deren Herstellungsverfahren.
KR880701632A (ko) 다면체 셀 구조 및 그 제조방법
DE3880750D1 (de) Vertikale transistor-/kapazitaetspeicherzellen-struktur und herstellungsverfahren dafuer.
KR920000765B1 (en) Semiconductor devices with stacked capacitor type memory cell and its manufacturing method
DE3884891D1 (de) Aktive Matrixzelle und deren Herstellungsverfahren.
DE3882557D1 (de) Dram-zelle und herstellungsverfahren.
KR910006507B1 (en) Memory device and manufacturing method of semiconductor with memory cell
DE3885185D1 (de) Vertikal-Trench-Transistor-/Kapazitätsspeicherzellen-Struktur und Herstellungsverfahren dafür.
KR870005471A (ko) 적층형 용량을 갖는 반도체 메모리와 그의 제조방법
DE3888632D1 (de) Schichtstruktur für eine Speicherzelle für eine dynamische Speicheranordnung mit wahlfreiem Zugriff und Herstellungsverfahren dafür.
DE68914084D1 (de) Halbleiterspeicheranordnung mit ferroelektrische Kondensatoren enthaltenden Zellen.
FR2577716B1 (fr) Piles solaires integrees et leur procede de fabrication
DE69215176D1 (de) Solarzelle und deren Herstellungsmethode
DE68924711D1 (de) Dachbau mit solarzellen.
KR930701838A (ko) 태양전지와 그 제조방법
FR2619248B1 (fr) Cellule photovoltaique protegee, son procede de fabrication et ensemble comprenant de telles cellules
DE3564059D1 (en) Dynamic memory cell and method for manufacturing the same
EP0255159A3 (en) Process for making structures including e2prom nonvolatile memory cells with self-aligned layers of silicon and associated transistors
IT8620253A0 (it) Ossido-nitruro-ossido. processo di fabbricazione per celle eprom con dielettrico
DE68917428D1 (de) Sonnenzelle und ihr Herstellungsverfahren.
EP0234907A3 (en) Semiconductor memory device with redundant memory cell
DE69012701D1 (de) Struktur zur Anordnung von elektrischen Doppelschichtkondensatorzellen.
DE3581990D1 (de) Halbleitersonnenzellen.
DE3585543D1 (de) Multidirektionale zellstruktur mit variabeler inertie, herstellungsverfahren und verwendung einer solchen struktur.

Legal Events

Date Code Title Description
B21A Patent or certificate of addition expired [chapter 21.1 patent gazette]

Free format text: PATENTE EXTINTA EM 02/10/2002

B15K Others concerning applications: alteration of classification

Ipc: H01L 29/66 (2006.01), H01L 27/108 (2006.0