BR8404463A - Aparelho e metodo para corrigir automaticamente um erro e assegurara impossibilidade de repeticao da ocorrencia - Google Patents

Aparelho e metodo para corrigir automaticamente um erro e assegurara impossibilidade de repeticao da ocorrencia

Info

Publication number
BR8404463A
BR8404463A BR8404463A BR8404463A BR8404463A BR 8404463 A BR8404463 A BR 8404463A BR 8404463 A BR8404463 A BR 8404463A BR 8404463 A BR8404463 A BR 8404463A BR 8404463 A BR8404463 A BR 8404463A
Authority
BR
Brazil
Prior art keywords
error
memory
data
stored
bit error
Prior art date
Application number
BR8404463A
Other languages
English (en)
Inventor
Patrick Francis Dutton
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR8404463A publication Critical patent/BR8404463A/pt

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1024—Identification of the type of error
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
BR8404463A 1983-09-13 1984-09-05 Aparelho e metodo para corrigir automaticamente um erro e assegurara impossibilidade de repeticao da ocorrencia BR8404463A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/531,793 US4608687A (en) 1983-09-13 1983-09-13 Bit steering apparatus and method for correcting errors in stored data, storing the address of the corrected data and using the address to maintain a correct data condition

Publications (1)

Publication Number Publication Date
BR8404463A true BR8404463A (pt) 1985-07-30

Family

ID=24119072

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8404463A BR8404463A (pt) 1983-09-13 1984-09-05 Aparelho e metodo para corrigir automaticamente um erro e assegurara impossibilidade de repeticao da ocorrencia

Country Status (4)

Country Link
US (1) US4608687A (pt)
EP (1) EP0139124A3 (pt)
JP (1) JPS6061837A (pt)
BR (1) BR8404463A (pt)

Families Citing this family (94)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324428A (ja) * 1986-07-17 1988-02-01 Mitsubishi Electric Corp キヤツシユメモリ
US5276846A (en) * 1986-09-15 1994-01-04 International Business Machines Corporation Fast access memory structure
US5228046A (en) * 1989-03-10 1993-07-13 International Business Machines Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature
US5058115A (en) * 1989-03-10 1991-10-15 International Business Machines Corp. Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature
JPH02306473A (ja) * 1989-05-19 1990-12-19 Tokico Ltd 磁気ディスク装置
US5239637A (en) * 1989-06-30 1993-08-24 Digital Equipment Corporation Digital data management system for maintaining consistency of data in a shadow set
US5247618A (en) * 1989-06-30 1993-09-21 Digital Equipment Corporation Transferring data in a digital data processing system
US5210865A (en) * 1989-06-30 1993-05-11 Digital Equipment Corporation Transferring data between storage media while maintaining host processor access for I/O operations
DE69031443T2 (de) * 1989-06-30 1998-04-23 Digital Equipment Corp Verfahren und Anordnung zur Steuerung von Schattenspeichern
US5173905A (en) * 1990-03-29 1992-12-22 Micron Technology, Inc. Parity and error correction coding on integrated circuit addresses
KR0121800B1 (ko) * 1992-05-08 1997-11-22 사또오 후미오 메모리 카드장치
US5327548A (en) * 1992-11-09 1994-07-05 International Business Machines Corporation Apparatus and method for steering spare bit in a multiple processor system having a global/local memory architecture
US5751744A (en) * 1993-02-01 1998-05-12 Advanced Micro Devices, Inc. Error detection and correction circuit
DE4329012A1 (de) * 1993-08-28 1995-03-02 Sel Alcatel Ag Verfahren und Vorrichtung zur Fehlerprüfung und zur Fehlerkorrektur in Speicherbausteinen
DE69421379T2 (de) * 1994-03-31 2000-05-11 St Microelectronics Inc Wiederverwendbarer Mehrwegsatz assoziativer Cache-Speicher
JP3011086B2 (ja) * 1996-01-30 2000-02-21 日本電気株式会社 半導体記憶装置
US5923682A (en) 1997-01-29 1999-07-13 Micron Technology, Inc. Error correction chip for memory applications
US5935258A (en) * 1997-03-04 1999-08-10 Micron Electronics, Inc. Apparatus for allowing data transfers with a memory having defective storage locations
US6119248A (en) * 1998-01-26 2000-09-12 Dell Usa L.P. Operating system notification of correctable error in computer information
US6560733B1 (en) 1999-07-09 2003-05-06 Micron Technology, Inc. Soft error detection for digital signal processors
US6505306B1 (en) * 1999-09-15 2003-01-07 International Business Machines Corporation Redundant bit steering mechanism with delayed switchover of fetch operations during redundant device initialization
US6687858B1 (en) * 2000-05-16 2004-02-03 Phillip M. Adams Software-hardware welding system
US7203886B2 (en) * 2002-03-27 2007-04-10 Intel Corporation Detecting and correcting corrupted memory cells in a memory
US7069494B2 (en) * 2003-04-17 2006-06-27 International Business Machines Corporation Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism
US7496822B2 (en) * 2003-05-15 2009-02-24 Texas Instruments Incorporated Apparatus and method for responding to data retention loss in a non-volatile memory unit using error checking and correction techniques
KR100719380B1 (ko) * 2006-03-31 2007-05-18 삼성전자주식회사 향상된 신뢰성 특성을 갖는 다치 플래시 메모리 장치 및그것을 포함한 메모리 시스템
US7881133B2 (en) * 2003-11-11 2011-02-01 Samsung Electronics Co., Ltd. Method of managing a flash memory and the flash memory
JP4736828B2 (ja) * 2006-02-03 2011-07-27 株式会社デンソー 電子制御装置
WO2007132453A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Distortion estimation and cancellation in memory devices
WO2007132457A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
WO2007132456A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Memory device with adaptive capacity
US7676729B2 (en) * 2006-08-23 2010-03-09 Sun Microsystems, Inc. Data corruption avoidance in DRAM chip sparing
US20080077840A1 (en) * 2006-09-27 2008-03-27 Mark Shaw Memory system and method for storing and correcting data
WO2008053472A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
WO2008061558A1 (en) * 2006-11-21 2008-05-29 Freescale Semiconductor, Inc. Memory system with ecc-unit and further processing arrangement
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US7937641B2 (en) * 2006-12-21 2011-05-03 Smart Modular Technologies, Inc. Memory modules with error detection and correction
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US8369141B2 (en) 2007-03-12 2013-02-05 Apple Inc. Adaptive estimation of memory cell read thresholds
US8245087B2 (en) * 2007-03-26 2012-08-14 Cray Inc. Multi-bit memory error management
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) * 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
US8259497B2 (en) * 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
KR101509836B1 (ko) 2007-11-13 2015-04-06 애플 인크. 멀티 유닛 메모리 디바이스에서의 메모리 유닛의 최적화된 선택
US8225181B2 (en) * 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) * 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8493783B2 (en) 2008-03-18 2013-07-23 Apple Inc. Memory device readout using multiple sense times
US7995388B1 (en) 2008-08-05 2011-08-09 Anobit Technologies Ltd. Data storage using modified voltages
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) * 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8767459B1 (en) 2010-07-31 2014-07-01 Apple Inc. Data storage in analog memory cells across word lines using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8493781B1 (en) 2010-08-12 2013-07-23 Apple Inc. Interference mitigation using individual word line erasure operations
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
CN102467418A (zh) * 2010-11-08 2012-05-23 炬力集成电路设计有限公司 一种实时性数据传输错误的恢复方法、装置及系统
US8756363B2 (en) 2011-07-07 2014-06-17 Oracle International Corporation Efficient storage of memory version data
JP5813450B2 (ja) * 2011-10-17 2015-11-17 日立オートモティブシステムズ株式会社 電子制御装置
US10379971B2 (en) 2012-01-31 2019-08-13 Hewlett Packard Enterprise Development Lp Single and double chip space
US9690673B2 (en) 2012-01-31 2017-06-27 Gary Gostin Single and double chip spare
US9043559B2 (en) 2012-10-23 2015-05-26 Oracle International Corporation Block memory engine with memory corruption detection
US9104591B2 (en) * 2012-12-11 2015-08-11 Sandisk Technologies Inc. Data recovery on cluster failures and ECC enhancements with code word interleaving
US9672298B2 (en) 2014-05-01 2017-06-06 Oracle International Corporation Precise excecution of versioned store instructions
US9195593B1 (en) 2014-09-27 2015-11-24 Oracle International Corporation Hardware assisted object memory migration
US10055267B2 (en) 2015-03-04 2018-08-21 Sandisk Technologies Llc Block management scheme to handle cluster failures in non-volatile memory
US10296405B2 (en) * 2016-07-05 2019-05-21 SK Hynix Inc. Nonvolatile memory system and error determination method thereof
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3222653A (en) * 1961-09-18 1965-12-07 Ibm Memory system for using a memory despite the presence of defective bits therein
US3633175A (en) * 1969-05-15 1972-01-04 Honeywell Inc Defect-tolerant digital memory system
SE358755B (pt) * 1972-06-09 1973-08-06 Ericsson Telefon Ab L M
NL7416755A (nl) * 1974-12-23 1976-06-25 Philips Nv Werkwijze en inrichting voor het testen van een digitaal geheugen.
US4093985A (en) * 1976-11-05 1978-06-06 North Electric Company Memory sparing arrangement
JPS5381036A (en) * 1976-12-27 1978-07-18 Hitachi Ltd Error correction-detection system
JPS5447540A (en) * 1977-09-22 1979-04-14 Hitachi Ltd Fault correction system for control memory
US4163147A (en) * 1978-01-20 1979-07-31 Sperry Rand Corporation Double bit error correction using double bit complementing
US4506362A (en) * 1978-12-22 1985-03-19 Gould Inc. Systematic memory error detection and correction apparatus and method
JPS592057B2 (ja) * 1979-02-07 1984-01-17 株式会社日立製作所 エラ−訂正・検出方式
US4255808A (en) * 1979-04-19 1981-03-10 Sperry Corporation Hard or soft cell failure differentiator
US4310901A (en) * 1979-06-11 1982-01-12 Electronic Memories & Magnetics Corporation Address mapping for memory
JPS567299A (en) * 1979-06-25 1981-01-24 Fujitsu Ltd Error correcting circuit
JPS598852B2 (ja) * 1979-07-30 1984-02-28 富士通株式会社 エラ−処理方式
JPS6051749B2 (ja) * 1979-08-31 1985-11-15 富士通株式会社 エラ−訂正方式
US4319356A (en) * 1979-12-19 1982-03-09 Ncr Corporation Self-correcting memory system
DE3069611D1 (en) * 1979-12-27 1984-12-13 Fujitsu Ltd Apparatus and method for testing semiconductor memory devices
US4317201A (en) * 1980-04-01 1982-02-23 Honeywell, Inc. Error detecting and correcting RAM assembly
US4371930A (en) * 1980-06-03 1983-02-01 Burroughs Corporation Apparatus for detecting, correcting and logging single bit memory read errors
US4380066A (en) * 1980-12-04 1983-04-12 Burroughs Corporation Defect tolerant memory
US4471472A (en) * 1982-02-05 1984-09-11 Advanced Micro Devices, Inc. Semiconductor memory utilizing an improved redundant circuitry configuration
US4475194A (en) * 1982-03-30 1984-10-02 International Business Machines Corporation Dynamic replacement of defective memory words
US4493075A (en) * 1982-05-17 1985-01-08 National Semiconductor Corporation Self repairing bulk memory
US4453248A (en) * 1982-06-16 1984-06-05 International Business Machines Corporation Fault alignment exclusion method to prevent realignment of previously paired memory defects

Also Published As

Publication number Publication date
EP0139124A3 (en) 1987-10-28
US4608687A (en) 1986-08-26
JPS6061837A (ja) 1985-04-09
EP0139124A2 (en) 1985-05-02

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