BR112015029641A2 - wafer padrão para leds, wafer epitaxial para leds e método de fabricação de wafer epitaxial para leds - Google Patents

wafer padrão para leds, wafer epitaxial para leds e método de fabricação de wafer epitaxial para leds

Info

Publication number
BR112015029641A2
BR112015029641A2 BR112015029641A BR112015029641A BR112015029641A2 BR 112015029641 A2 BR112015029641 A2 BR 112015029641A2 BR 112015029641 A BR112015029641 A BR 112015029641A BR 112015029641 A BR112015029641 A BR 112015029641A BR 112015029641 A2 BR112015029641 A2 BR 112015029641A2
Authority
BR
Brazil
Prior art keywords
wafer
led
epitaxial
led wafer
standard
Prior art date
Application number
BR112015029641A
Other languages
English (en)
Inventor
Koike Jun
Original Assignee
Asahi Kasei E Mat Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kasei E Mat Corporation filed Critical Asahi Kasei E Mat Corporation
Publication of BR112015029641A2 publication Critical patent/BR112015029641A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

resumo patente de invenção: "wafer padrão para leds, wafer epitaxial para leds e método de fabricação de wafer epitaxial para leds". a presente invenção refere-se a um wafer padrão (10) para leds que é fornecido com uma estrutura desigual a (20) possuindo uma disposição com simetria de n fold substancialmente em pelo menos uma parte da superfície principal, onde em pelo menos uma parte da estrutura desigual a (20), um ângulo de mudança de rotação ? corresponde a 0°<??(180?n)° onde ? é o ângulo de mudança de rotação de um eixo geométrico de disposição a da estrutura desigual a (20) com relação a uma direção de eixo geométrico de cristal na superfície principal, e um topo da parte convexa da estrutura desigual a (20) é uma parte de canto com um raio de curvatura que excede "0". uma primeira camada semicondutora (30), uma camada semicondutora de emissão de luz (40) e uma segunda camada semicondutora (50) são colocadas em camadas na estrutura desigual a (20) para constituir um wafer epitaxial (100) para leds. é possível se fornecer o wafer padrão para leds e o wafer epitaxial para leds com rachaduras e eficiência de quantidade interna iqe aperfeiçoadas.
BR112015029641A 2013-05-31 2014-05-28 wafer padrão para leds, wafer epitaxial para leds e método de fabricação de wafer epitaxial para leds BR112015029641A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013116024 2013-05-31
JP2013116025 2013-05-31
PCT/JP2014/064153 WO2014192821A1 (ja) 2013-05-31 2014-05-28 Ｌｅｄ用パタンウェハ、ｌｅｄ用エピタキシャルウェハ及びｌｅｄ用エピタキシャルウェハの製造方法

Publications (1)

Publication Number Publication Date
BR112015029641A2 true BR112015029641A2 (pt) 2017-07-25

Family

ID=51988844

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015029641A BR112015029641A2 (pt) 2013-05-31 2014-05-28 wafer padrão para leds, wafer epitaxial para leds e método de fabricação de wafer epitaxial para leds

Country Status (8)

Country Link
US (1) US9660141B2 (pt)
EP (1) EP3007237B1 (pt)
JP (1) JP6049875B2 (pt)
KR (1) KR101843627B1 (pt)
CN (1) CN105247693B (pt)
BR (1) BR112015029641A2 (pt)
TW (1) TWI528585B (pt)
WO (1) WO2014192821A1 (pt)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10012769B2 (en) * 2013-03-06 2018-07-03 Element Six Technologies Limited Synthetic diamond optical elements
JP5927543B2 (ja) * 2013-07-24 2016-06-01 パナソニックＩｐマネジメント株式会社 ＧａＮ層の素子分離方法
JP6375890B2 (ja) * 2014-11-18 2018-08-22 日亜化学工業株式会社 窒化物半導体素子及びその製造方法
WO2016185645A1 (ja) * 2015-05-21 2016-11-24 パナソニック株式会社 窒化物半導体装置
CN108028299A (zh) * 2015-09-30 2018-05-11 旭化成株式会社 光学基材、半导体发光元件用基板及半导体发光元件
JP6229707B2 (ja) 2015-11-26 2017-11-15 日亜化学工業株式会社 発光素子及びその製造方法
JP6531729B2 (ja) * 2016-07-19 2019-06-19 株式会社Sumco シリコン試料の炭素濃度評価方法、シリコンウェーハ製造工程の評価方法、シリコンウェーハの製造方法およびシリコン単結晶インゴットの製造方法
KR102582649B1 (ko) 2018-02-12 2023-09-25 삼성디스플레이 주식회사 표시 장치
US11181668B2 (en) * 2018-07-13 2021-11-23 University Of Notre Dame Du Lac High contrast gradient index lens antennas
JP7238897B2 (ja) * 2018-09-14 2023-03-14 王子ホールディングス株式会社 突状構造体、発光素子用基板、その製造方法、及び発光素子
US11331767B2 (en) * 2019-02-01 2022-05-17 Micron Technology, Inc. Pads for chemical mechanical planarization tools, chemical mechanical planarization tools, and related methods
JP7503975B2 (ja) 2020-09-04 2024-06-21 株式会社小松製作所 作業機械
KR102537068B1 (ko) * 2020-11-27 2023-05-26 서울대학교산학협력단 사파이어 나노 멤브레인 상에서 산화갈륨층을 포함하는 기판의 제조방법
US20220367753A1 (en) * 2021-05-17 2022-11-17 Seoul Viosys Co., Ltd. Uv light emitting diode

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11238687A (ja) 1998-02-20 1999-08-31 Ricoh Co Ltd 半導体基板および半導体発光素子
JP5800452B2 (ja) 2001-07-24 2015-10-28 日亜化学工業株式会社 半導体発光素子
JP2005064492A (ja) * 2003-07-28 2005-03-10 Kyocera Corp 単結晶サファイア基板とその製造方法及び半導体発光素子
WO2006130721A2 (en) 2005-06-02 2006-12-07 The Board Of Trustees Of The University Of Illinois Printable semiconductor structures and related methods of making and assembling
JP2007281140A (ja) * 2006-04-05 2007-10-25 Hamamatsu Photonics Kk 化合物半導体基板、その製造方法及び半導体デバイス
GB0702560D0 (en) * 2007-02-09 2007-03-21 Univ Bath Production of Semiconductor devices
JP2011060917A (ja) * 2009-09-08 2011-03-24 Rohm Co Ltd 半導体発光素子
JP5170051B2 (ja) * 2009-09-30 2013-03-27 豊田合成株式会社 Ｉｉｉ族窒化物半導体の製造方法
JP2012124257A (ja) * 2010-12-07 2012-06-28 Toshiba Corp 半導体発光素子及びその製造方法
WO2012083578A1 (zh) * 2010-12-22 2012-06-28 青岛理工大学 整片晶圆纳米压印的装置和方法.
US8963165B2 (en) 2010-12-29 2015-02-24 Sharp Kabushiki Kaisha Nitride semiconductor structure, nitride semiconductor light emitting element, nitride semiconductor transistor element, method of manufacturing nitride semiconductor structure, and method of manufacturing nitride semiconductor element
WO2013021606A1 (ja) * 2011-08-09 2013-02-14 パナソニック株式会社 窒化物半導体層成長用構造、積層構造、窒化物系半導体素子および光源ならびにこれらの製造方法
US8686433B2 (en) * 2011-09-01 2014-04-01 Rohm Co., Ltd. Light emitting device and light emitting device package
JP5885436B2 (ja) * 2011-09-06 2016-03-15 ローム株式会社 発光素子および発光素子パッケージ
JP2013084832A (ja) * 2011-10-12 2013-05-09 Sharp Corp 窒化物半導体構造の製造方法
JP2013120829A (ja) * 2011-12-07 2013-06-17 Sharp Corp 窒化物半導体紫外発光素子
JPWO2014136393A1 (ja) * 2013-03-08 2017-02-09 国立大学法人山口大学 加工基板及びそれを用いた半導体装置

Also Published As

Publication number Publication date
KR101843627B1 (ko) 2018-03-29
JP6049875B2 (ja) 2016-12-21
JPWO2014192821A1 (ja) 2017-02-23
TWI528585B (zh) 2016-04-01
EP3007237A1 (en) 2016-04-13
KR20160002973A (ko) 2016-01-08
CN105247693A (zh) 2016-01-13
US9660141B2 (en) 2017-05-23
WO2014192821A1 (ja) 2014-12-04
CN105247693B (zh) 2018-04-20
TW201507201A (zh) 2015-02-16
US20160149079A1 (en) 2016-05-26
EP3007237B1 (en) 2017-08-02
EP3007237A4 (en) 2016-04-27

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements
B350 Update of information on the portal [chapter 15.35 patent gazette]