BR0309218A - Algoritmo de gerenciamento de memória para decodificadores de treliças - Google Patents
Algoritmo de gerenciamento de memória para decodificadores de treliçasInfo
- Publication number
- BR0309218A BR0309218A BR0309218-6A BR0309218A BR0309218A BR 0309218 A BR0309218 A BR 0309218A BR 0309218 A BR0309218 A BR 0309218A BR 0309218 A BR0309218 A BR 0309218A
- Authority
- BR
- Brazil
- Prior art keywords
- memory
- tracking
- aptft
- decoders
- management algorithm
- Prior art date
Links
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
- H03M13/4169—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3944—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes for block codes, especially trellis or lattice decoding thereof
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3961—Arrangements of methods for branch or transition metric calculation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
- H03M13/6505—Memory efficient implementations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0059—Convolutional codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/238—Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
- H04N21/2383—Channel coding or modulation of digital bit-stream, e.g. QPSK modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
- H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Multimedia (AREA)
- Artificial Intelligence (AREA)
- Error Detection And Correction (AREA)
Abstract
"ALGORITMO DE GERENCIAMENTO DE MEMóRIA PARA DECODIFICADORES DE TRELIçAS". Um sistema de rastreamento inverso/rastreamento direto de toda a trajetória (APTFT) para uso em gerenciar a memória usada nas seq³ências sobreviventes decodificadas de processamento O tamanho de memória é diminuído para T*N, onde T é uma profundidade de memória sobrevivente predeterminada e N é o número de estados na treliça. o valor de latência da presente invenção é igual a T. A exigência de memória e o valor de latência representam, um decréscimo de 33% no valor de parâmetros similares produzidos em um sistema de APTFT da técnica anterior. Uma unidade de seleção de trajetória/rastreamento direto existente é modificada para levar vantagem da natureza inerente do processo de rastreamento direto (7) a fim de simplificar o sistema de decodificação (9) . Uma versão generalizada do sistema de APTFT permite flexibilidade maior na escolha de tamanho de memória e valores de latência para satisfazer as exigências de um sistema de decodificação particular.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US37324602P | 2002-04-17 | 2002-04-17 | |
PCT/US2003/007166 WO2003090361A1 (en) | 2002-04-17 | 2003-03-10 | A memory management algorithm for trellis decoders |
Publications (1)
Publication Number | Publication Date |
---|---|
BR0309218A true BR0309218A (pt) | 2005-02-09 |
Family
ID=29251004
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0309218-6A BR0309218A (pt) | 2002-04-17 | 2003-03-10 | Algoritmo de gerenciamento de memória para decodificadores de treliças |
Country Status (9)
Country | Link |
---|---|
US (1) | US7149952B2 (pt) |
EP (1) | EP1495547A4 (pt) |
JP (1) | JP4191053B2 (pt) |
KR (1) | KR101010784B1 (pt) |
CN (1) | CN1647391B (pt) |
AU (1) | AU2003218034A1 (pt) |
BR (1) | BR0309218A (pt) |
MX (1) | MXPA04010142A (pt) |
WO (1) | WO2003090361A1 (pt) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8140947B2 (en) * | 2005-09-30 | 2012-03-20 | Agere Systems Inc. | Method and apparatus for storing survivor paths in a Viterbi detector using systematic pointer exchange |
US20080123210A1 (en) * | 2006-11-06 | 2008-05-29 | Wei Zeng | Handling synchronization errors potentially experienced by a storage device |
KR100864722B1 (ko) * | 2006-12-04 | 2008-10-23 | 삼성전자주식회사 | 트렐리스 인코더 및 이를 구비한 트렐리스 인코딩 장치 |
US8433004B2 (en) | 2010-02-26 | 2013-04-30 | Research In Motion Limited | Low-latency viterbi survivor memory architecture and method using register exchange, trace-back, and trace-forward |
US8402342B2 (en) * | 2010-02-26 | 2013-03-19 | Research In Motion Limited | Method and system for cyclic redundancy check |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3789360A (en) * | 1972-10-13 | 1974-01-29 | Harris Intertype Corp | Convolutional decoder |
KR0135796B1 (ko) * | 1994-11-14 | 1998-04-27 | 김광호 | 비터비복호기에서 트레이스백 수행장치 |
CN1136731A (zh) * | 1995-05-16 | 1996-11-27 | 林茂昭 | 多层网格编码系统 |
JP3280834B2 (ja) * | 1995-09-04 | 2002-05-13 | 沖電気工業株式会社 | 符号化通信方式における信号判定装置および受信装置ならびに信号判定方法および通信路状態推定方法 |
KR970063964A (ko) * | 1996-02-28 | 1997-09-12 | 김광호 | 비터비디코더의 생존메모리관리방법 및 그에 따른 생존메모리장치 |
US5914988A (en) * | 1996-04-09 | 1999-06-22 | Thomson Multimedia S.A. | Digital packet data trellis decoder |
US6094739A (en) * | 1997-09-24 | 2000-07-25 | Lucent Technologies, Inc. | Trellis decoder for real-time video rate decoding and de-interleaving |
KR100237490B1 (ko) * | 1997-11-29 | 2000-01-15 | 전주범 | 트렐리스 코드 데이터의 생존 경로 역추적 장치 |
US6775334B1 (en) * | 1998-11-03 | 2004-08-10 | Broadcom Corporation | Equalization and decision-directed loops with trellis demodulation in high definition TV |
ATE259999T1 (de) * | 1999-08-31 | 2004-03-15 | Broadcom Corp | Speicher ausführung von register-exchange traceback für gigabit ethernet sender-empfänger |
EP1091579B1 (en) * | 1999-09-07 | 2006-02-15 | Thomson Licensing | Trellis demapper for Trellis decoder |
US6560749B1 (en) * | 2000-01-28 | 2003-05-06 | Nec Electronics, Inc. | Apparatus and method for implementing a decoder for convolutionally encoded symbols |
MXPA04010139A (es) * | 2002-04-16 | 2005-06-08 | Thomson Licensing Sa | Arquitectura de descodificador de entramado de television de alta definicion. |
-
2003
- 2003-03-10 WO PCT/US2003/007166 patent/WO2003090361A1/en active Application Filing
- 2003-03-10 BR BR0309218-6A patent/BR0309218A/pt not_active IP Right Cessation
- 2003-03-10 AU AU2003218034A patent/AU2003218034A1/en not_active Abandoned
- 2003-03-10 CN CN038086786A patent/CN1647391B/zh not_active Expired - Lifetime
- 2003-03-10 EP EP03714015A patent/EP1495547A4/en not_active Ceased
- 2003-03-10 JP JP2003587013A patent/JP4191053B2/ja not_active Expired - Lifetime
- 2003-03-10 MX MXPA04010142A patent/MXPA04010142A/es active IP Right Grant
- 2003-03-10 US US10/511,655 patent/US7149952B2/en not_active Expired - Lifetime
- 2003-03-10 KR KR1020047016609A patent/KR101010784B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US20050257123A1 (en) | 2005-11-17 |
EP1495547A1 (en) | 2005-01-12 |
CN1647391A (zh) | 2005-07-27 |
KR101010784B1 (ko) | 2011-01-25 |
EP1495547A4 (en) | 2006-11-08 |
WO2003090361A1 (en) | 2003-10-30 |
KR20040099452A (ko) | 2004-11-26 |
JP2006511977A (ja) | 2006-04-06 |
AU2003218034A1 (en) | 2003-11-03 |
MXPA04010142A (es) | 2005-01-25 |
US7149952B2 (en) | 2006-12-12 |
JP4191053B2 (ja) | 2008-12-03 |
CN1647391B (zh) | 2011-05-11 |
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Legal Events
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B07A | Application suspended after technical examination (opinion) [chapter 7.1 patent gazette] | ||
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: INDEFIRO O PEDIDO DE ACORDO COM O ARTIGO 8O COMBINADO COM ARTIGO 13 DA LPI |
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B12B | Appeal against refusal [chapter 12.2 patent gazette] | ||
B08F | Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette] |
Free format text: REFERENTE A 16A ANUIDADE. |
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B08K | Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette] |
Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2506 DE 15-01-2019 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013. |