BE805959A - Procede de stabilisation des dispositifs a transistors a effet de champ comprenant des portes de silicium et des dielectriques de portes nitrure-oxyde composites - Google Patents

Procede de stabilisation des dispositifs a transistors a effet de champ comprenant des portes de silicium et des dielectriques de portes nitrure-oxyde composites

Info

Publication number
BE805959A
BE805959A BE136586A BE136586A BE805959A BE 805959 A BE805959 A BE 805959A BE 136586 A BE136586 A BE 136586A BE 136586 A BE136586 A BE 136586A BE 805959 A BE805959 A BE 805959A
Authority
BE
Belgium
Prior art keywords
doors
dielectrics
oxide
effect transistor
devices including
Prior art date
Application number
BE136586A
Other languages
English (en)
French (fr)
Inventor
C A Barile
R C Dockerty
A Nagarajan
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BE805959A publication Critical patent/BE805959A/xx

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
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    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
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    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
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    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
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    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
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    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10S148/00—Metal treatment
    • Y10S148/003—Anneal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S148/00—Metal treatment
    • Y10S148/113—Nitrides of boron or aluminum or gallium
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Thin Film Transistor (AREA)
BE136586A 1972-11-21 1973-10-11 Procede de stabilisation des dispositifs a transistors a effet de champ comprenant des portes de silicium et des dielectriques de portes nitrure-oxyde composites BE805959A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US30860872A 1972-11-21 1972-11-21

Publications (1)

Publication Number Publication Date
BE805959A true BE805959A (fr) 1974-02-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
BE136586A BE805959A (fr) 1972-11-21 1973-10-11 Procede de stabilisation des dispositifs a transistors a effet de champ comprenant des portes de silicium et des dielectriques de portes nitrure-oxyde composites

Country Status (9)

Country Link
US (1) US3793090A (it)
JP (1) JPS5422279B2 (it)
BE (1) BE805959A (it)
CA (1) CA996279A (it)
CH (1) CH555597A (it)
FR (1) FR2207359B1 (it)
GB (1) GB1396673A (it)
IT (1) IT998626B (it)
SE (1) SE384761B (it)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3911168A (en) * 1973-06-01 1975-10-07 Fairchild Camera Instr Co Method for forming a continuous layer of silicon dioxide over a substrate
US3892606A (en) * 1973-06-28 1975-07-01 Ibm Method for forming silicon conductive layers utilizing differential etching rates
US3943015A (en) * 1973-06-29 1976-03-09 International Business Machines Corporation Method for high temperature semiconductor processing
US3886000A (en) * 1973-11-05 1975-05-27 Ibm Method for controlling dielectric isolation of a semiconductor device
US3909320A (en) * 1973-12-26 1975-09-30 Signetics Corp Method for forming MOS structure using double diffusion
US3951693A (en) * 1974-01-17 1976-04-20 Motorola, Inc. Ion-implanted self-aligned transistor device including the fabrication method therefor
US4056825A (en) * 1975-06-30 1977-11-01 International Business Machines Corporation FET device with reduced gate overlap capacitance of source/drain and method of manufacture
US3966514A (en) * 1975-06-30 1976-06-29 Ibm Corporation Method for forming dielectric isolation combining dielectric deposition and thermal oxidation
US4045250A (en) * 1975-08-04 1977-08-30 Rca Corporation Method of making a semiconductor device
US4057821A (en) * 1975-11-20 1977-11-08 Nitron Corporation/Mcdonnell-Douglas Corporation Non-volatile semiconductor memory device
US4051273A (en) * 1975-11-26 1977-09-27 Ibm Corporation Field effect transistor structure and method of making same
US4096509A (en) * 1976-07-22 1978-06-20 The United States Of America As Represented By The Secretary Of The Air Force MNOS memory transistor having a redeposited silicon nitride gate dielectric
US4123834A (en) * 1977-06-14 1978-11-07 Westinghouse Electric Corp. Overlapping electrode structure for solid state devices
US4455737A (en) * 1978-05-26 1984-06-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4506437A (en) * 1978-05-26 1985-03-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4192059A (en) * 1978-06-06 1980-03-11 Rockwell International Corporation Process for and structure of high density VLSI circuits, having inherently self-aligned gates and contacts for FET devices and conducting lines
US4587711A (en) * 1978-05-26 1986-05-13 Rockwell International Corporation Process for high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4250206A (en) * 1978-12-11 1981-02-10 Texas Instruments Incorporated Method of making non-volatile semiconductor memory elements
JPS5621372A (en) * 1979-07-31 1981-02-27 Fujitsu Ltd Manufacture of semiconductor device
JPS5918677A (ja) * 1982-07-22 1984-01-31 Nec Corp 絶縁ゲ−ト電界効果型半導体装置の製造方法
US6784033B1 (en) 1984-02-15 2004-08-31 Semiconductor Energy Laboratory Co., Ltd. Method for the manufacture of an insulated gate field effect semiconductor device
JPS61140175A (ja) * 1984-12-13 1986-06-27 Semiconductor Energy Lab Co Ltd 被膜作製方法
US6113701A (en) 1985-02-14 2000-09-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, manufacturing method, and system
JPS6269664A (ja) * 1985-09-24 1987-03-30 Toshiba Corp 相補ｍｏｓ型半導体装置
JPS62128556A (ja) * 1985-11-29 1987-06-10 Fujitsu Ltd 半導体装置
US4784975A (en) * 1986-10-23 1988-11-15 International Business Machines Corporation Post-oxidation anneal of silicon dioxide
US4851370A (en) * 1987-12-28 1989-07-25 American Telephone And Telegraph Company, At&T Bell Laboratories Fabricating a semiconductor device with low defect density oxide
JPH0758701B2 (ja) * 1989-06-08 1995-06-21 株式会社東芝 半導体装置の製造方法
KR940011483B1 (ko) * 1990-11-28 1994-12-19 가부시끼가이샤 도시바 반도체 디바이스를 제조하기 위한 방법 및 이 방법에 의해 제조되는 반도체 디바이스
JP2845303B2 (ja) * 1991-08-23 1999-01-13 株式会社 半導体エネルギー研究所 半導体装置とその作製方法
US5387540A (en) * 1993-09-30 1995-02-07 Motorola Inc. Method of forming trench isolation structure in an integrated circuit
US5629221A (en) * 1995-11-24 1997-05-13 National Science Council Of Republic Of China Process for suppressing boron penetration in BF2 + -implanted P+ -poly-Si gate using inductively-coupled nitrogen plasma
US5910339A (en) * 1996-08-22 1999-06-08 Cornell Research Foundation, Inc. Fabrication of atomic step-free surfaces
US5960302A (en) * 1996-12-31 1999-09-28 Lucent Technologies, Inc. Method of making a dielectric for an integrated circuit
CN100342500C (zh) * 2000-09-19 2007-10-10 马特森技术公司 形成介电薄膜的方法
JP2002170888A (ja) * 2000-11-30 2002-06-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP4615755B2 (ja) * 2001-04-04 2011-01-19 セイコーインスツル株式会社 半導体装置の製造方法
JP4454883B2 (ja) * 2001-04-26 2010-04-21 東京エレクトロン株式会社 半導体装置の製造方法
JP4831885B2 (ja) 2001-04-27 2011-12-07 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7033894B1 (en) * 2003-08-05 2006-04-25 Advanced Micro Devices, Inc. Method for modulating flatband voltage of devices having high-k gate dielectrics by post-deposition annealing
KR100707169B1 (ko) * 2003-12-12 2007-04-13 삼성전자주식회사 메모리 소자 및 그 제조 방법
US20060014624A1 (en) * 2004-07-15 2006-01-19 Biljana Mikijelj High dielectric strength monolithic Si3N4
KR101009646B1 (ko) * 2007-08-01 2011-01-19 삼성모바일디스플레이주식회사 박막 트랜지스터 및 이를 구비한 표시 장치
US8941171B2 (en) 2010-07-02 2015-01-27 Micron Technology, Inc. Flatband voltage adjustment in a semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3514676A (en) * 1967-10-25 1970-05-26 North American Rockwell Insulated gate complementary field effect transistors gate structure
US3615873A (en) * 1969-06-03 1971-10-26 Sprague Electric Co Method of stabilizing mos devices
US3670403A (en) * 1970-03-19 1972-06-20 Gen Electric Three masking step process for fabricating insulated gate field effect transistors
US3699646A (en) * 1970-12-28 1972-10-24 Intel Corp Integrated circuit structure and method for making integrated circuit structure

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US3793090A (en) 1974-02-19
SE384761B (sv) 1976-05-17
JPS4984180A (it) 1974-08-13
CA996279A (en) 1976-08-31
FR2207359A1 (it) 1974-06-14
IT998626B (it) 1976-02-20
DE2355605A1 (de) 1974-06-12
GB1396673A (en) 1975-06-04
CH555597A (de) 1974-10-31
FR2207359B1 (it) 1977-08-12
JPS5422279B2 (it) 1979-08-06
DE2355605B2 (de) 1977-02-17

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