BE771137A - Structure en silicium polycristallin pour circuit integre et procede pour la former - Google Patents
Structure en silicium polycristallin pour circuit integre et procede pour la formerInfo
- Publication number
- BE771137A BE771137A BE771137A BE771137A BE771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A
- Authority
- BE
- Belgium
- Prior art keywords
- forming
- integrated circuit
- polycrystalline silicon
- silicon structure
- polycrystalline
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H10W10/041—
-
- H10W10/40—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/98—Utilizing process equivalents or options
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US6243770A | 1970-08-10 | 1970-08-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE771137A true BE771137A (fr) | 1972-02-10 |
Family
ID=22042478
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE771137A BE771137A (fr) | 1970-08-10 | 1971-08-10 | Structure en silicium polycristallin pour circuit integre et procede pour la former |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US3825451A (enExample) |
| JP (1) | JPS5024231B1 (enExample) |
| BE (1) | BE771137A (enExample) |
| CA (1) | CA931665A (enExample) |
| DE (6) | DE2140054A1 (enExample) |
| FR (1) | FR2102152A1 (enExample) |
| GB (1) | GB1365159A (enExample) |
| NL (1) | NL7111014A (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3911559A (en) * | 1973-12-10 | 1975-10-14 | Texas Instruments Inc | Method of dielectric isolation to provide backside collector contact and scribing yield |
| US4573257A (en) * | 1984-09-14 | 1986-03-04 | Motorola, Inc. | Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key |
| US4583282A (en) * | 1984-09-14 | 1986-04-22 | Motorola, Inc. | Process for self-aligned buried layer, field guard, and isolation |
| US4574469A (en) * | 1984-09-14 | 1986-03-11 | Motorola, Inc. | Process for self-aligned buried layer, channel-stop, and isolation |
| JPS61166071A (ja) * | 1985-01-17 | 1986-07-26 | Toshiba Corp | 半導体装置及びその製造方法 |
| US7687887B1 (en) * | 2006-12-01 | 2010-03-30 | National Semiconductor Corporation | Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter |
| DE102007010563A1 (de) * | 2007-02-22 | 2008-08-28 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | Selektives Wachstum von polykristallinem siliziumhaltigen Halbleitermaterial auf siliziumhaltiger Halbleiteroberfläche |
-
1971
- 1971-07-30 CA CA119528A patent/CA931665A/en not_active Expired
- 1971-08-03 GB GB3636771A patent/GB1365159A/en not_active Expired
- 1971-08-09 JP JP46059668A patent/JPS5024231B1/ja active Pending
- 1971-08-09 FR FR7129101A patent/FR2102152A1/fr not_active Withdrawn
- 1971-08-10 DE DE19712140054 patent/DE2140054A1/de active Pending
- 1971-08-10 BE BE771137A patent/BE771137A/xx unknown
- 1971-08-10 DE DE19717130660U patent/DE7130660U/de not_active Expired
- 1971-08-10 NL NL7111014A patent/NL7111014A/xx unknown
- 1971-08-10 DE DE19712140023 patent/DE2140023A1/de active Pending
- 1971-08-10 DE DE19717130637U patent/DE7130637U/de not_active Expired
- 1971-08-10 DE DE19712140012 patent/DE2140012A1/de active Pending
- 1971-08-10 DE DE19712140043 patent/DE2140043A1/de active Pending
-
1972
- 1972-05-01 US US00249404A patent/US3825451A/en not_active Expired - Lifetime
- 1972-05-01 US US00249403A patent/US3825450A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| FR2102152A1 (enExample) | 1972-04-07 |
| DE2140023A1 (de) | 1972-02-17 |
| DE7130637U (de) | 1971-12-02 |
| US3825451A (en) | 1974-07-23 |
| DE7130660U (de) | 1971-12-02 |
| JPS5024231B1 (enExample) | 1975-08-14 |
| NL7111014A (enExample) | 1972-02-14 |
| GB1365159A (en) | 1974-08-29 |
| DE2140043A1 (de) | 1972-02-17 |
| DE2140012A1 (de) | 1972-02-17 |
| DE2140054A1 (de) | 1972-02-17 |
| CA931665A (en) | 1973-08-07 |
| US3825450A (en) | 1974-07-23 |
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