BE771137A - Structure en silicium polycristallin pour circuit integre et procede pour la former - Google Patents
Structure en silicium polycristallin pour circuit integre et procede pour la formerInfo
- Publication number
- BE771137A BE771137A BE771137A BE771137A BE771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A BE 771137 A BE771137 A BE 771137A
- Authority
- BE
- Belgium
- Prior art keywords
- forming
- integrated circuit
- polycrystalline silicon
- silicon structure
- polycrystalline
- Prior art date
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/98—Utilizing process equivalents or options
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6243770A | 1970-08-10 | 1970-08-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
BE771137A true BE771137A (fr) | 1972-02-10 |
Family
ID=22042478
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BE771137A BE771137A (fr) | 1970-08-10 | 1971-08-10 | Structure en silicium polycristallin pour circuit integre et procede pour la former |
Country Status (8)
Country | Link |
---|---|
US (2) | US3825450A (xx) |
JP (1) | JPS5024231B1 (xx) |
BE (1) | BE771137A (xx) |
CA (1) | CA931665A (xx) |
DE (6) | DE7130637U (xx) |
FR (1) | FR2102152A1 (xx) |
GB (1) | GB1365159A (xx) |
NL (1) | NL7111014A (xx) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3911559A (en) * | 1973-12-10 | 1975-10-14 | Texas Instruments Inc | Method of dielectric isolation to provide backside collector contact and scribing yield |
US4574469A (en) * | 1984-09-14 | 1986-03-11 | Motorola, Inc. | Process for self-aligned buried layer, channel-stop, and isolation |
US4583282A (en) * | 1984-09-14 | 1986-04-22 | Motorola, Inc. | Process for self-aligned buried layer, field guard, and isolation |
US4573257A (en) * | 1984-09-14 | 1986-03-04 | Motorola, Inc. | Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key |
JPS61166071A (ja) * | 1985-01-17 | 1986-07-26 | Toshiba Corp | 半導体装置及びその製造方法 |
US7687887B1 (en) * | 2006-12-01 | 2010-03-30 | National Semiconductor Corporation | Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter |
DE102007010563A1 (de) * | 2007-02-22 | 2008-08-28 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | Selektives Wachstum von polykristallinem siliziumhaltigen Halbleitermaterial auf siliziumhaltiger Halbleiteroberfläche |
-
1971
- 1971-07-30 CA CA119528A patent/CA931665A/en not_active Expired
- 1971-08-03 GB GB3636771A patent/GB1365159A/en not_active Expired
- 1971-08-09 FR FR7129101A patent/FR2102152A1/fr not_active Withdrawn
- 1971-08-09 JP JP46059668A patent/JPS5024231B1/ja active Pending
- 1971-08-10 BE BE771137A patent/BE771137A/xx unknown
- 1971-08-10 DE DE19717130637U patent/DE7130637U/de not_active Expired
- 1971-08-10 DE DE19712140012 patent/DE2140012A1/de active Pending
- 1971-08-10 DE DE19712140054 patent/DE2140054A1/de active Pending
- 1971-08-10 NL NL7111014A patent/NL7111014A/xx unknown
- 1971-08-10 DE DE19712140023 patent/DE2140023A1/de active Pending
- 1971-08-10 DE DE19712140043 patent/DE2140043A1/de active Pending
- 1971-08-10 DE DE19717130660U patent/DE7130660U/de not_active Expired
-
1972
- 1972-05-01 US US00249403A patent/US3825450A/en not_active Expired - Lifetime
- 1972-05-01 US US00249404A patent/US3825451A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US3825451A (en) | 1974-07-23 |
NL7111014A (xx) | 1972-02-14 |
DE2140023A1 (de) | 1972-02-17 |
CA931665A (en) | 1973-08-07 |
GB1365159A (en) | 1974-08-29 |
US3825450A (en) | 1974-07-23 |
FR2102152A1 (xx) | 1972-04-07 |
DE7130660U (de) | 1971-12-02 |
DE2140012A1 (de) | 1972-02-17 |
DE7130637U (de) | 1971-12-02 |
DE2140043A1 (de) | 1972-02-17 |
JPS5024231B1 (xx) | 1975-08-14 |
DE2140054A1 (de) | 1972-02-17 |
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