BE749485A - Technique de fabrication de semi-conducteurs et dispositifs ainsi formes en utilisant un conducteur metallique dope - Google Patents

Technique de fabrication de semi-conducteurs et dispositifs ainsi formes en utilisant un conducteur metallique dope

Info

Publication number
BE749485A
BE749485A BE749485DA BE749485A BE 749485 A BE749485 A BE 749485A BE 749485D A BE749485D A BE 749485DA BE 749485 A BE749485 A BE 749485A
Authority
BE
Belgium
Prior art keywords
technique
devices
metal conductor
manufacturing semiconductors
dope metal
Prior art date
Application number
Other languages
English (en)
Inventor
W E Engeler
M Garfinkel
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of BE749485A publication Critical patent/BE749485A/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05558—Shape in side view conformal layer on a patterned surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Thermistors And Varistors (AREA)
  • Cold Cathode And The Manufacture (AREA)
BE749485D 1969-04-25 1970-04-24 Technique de fabrication de semi-conducteurs et dispositifs ainsi formes en utilisant un conducteur metallique dope BE749485A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81918669A 1969-04-25 1969-04-25

Publications (1)

Publication Number Publication Date
BE749485A true BE749485A (fr) 1970-10-26

Family

ID=25227434

Family Applications (1)

Application Number Title Priority Date Filing Date
BE749485D BE749485A (fr) 1969-04-25 1970-04-24 Technique de fabrication de semi-conducteurs et dispositifs ainsi formes en utilisant un conducteur metallique dope

Country Status (9)

Country Link
US (1) US3601888A (fr)
JP (1) JPS5443352B1 (fr)
BE (1) BE749485A (fr)
DE (2) DE2019655C2 (fr)
FR (1) FR2049078B1 (fr)
GB (1) GB1317583A (fr)
IE (1) IE33752B1 (fr)
NL (1) NL174684C (fr)
SE (1) SE365343B (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4050966A (en) * 1968-12-20 1977-09-27 Siemens Aktiengesellschaft Method for the preparation of diffused silicon semiconductor components
US3919007A (en) * 1969-08-12 1975-11-11 Kogyo Gijutsuin Method of manufacturing a field-effect transistor
US3604986A (en) * 1970-03-17 1971-09-14 Bell Telephone Labor Inc High frequency transistors with shallow emitters
US3863334A (en) * 1971-03-08 1975-02-04 Motorola Inc Aluminum-zinc metallization
JPS567304B2 (fr) * 1972-08-28 1981-02-17
US3909926A (en) * 1973-11-07 1975-10-07 Jearld L Hutson Method of fabricating a semiconductor diode having high voltage characteristics
JPS593421Y2 (ja) * 1979-05-31 1984-01-30 ソニー株式会社 テ−プカセツト
IE52791B1 (en) * 1980-11-05 1988-03-02 Fujitsu Ltd Semiconductor devices
US4481046A (en) * 1983-09-29 1984-11-06 International Business Machines Corporation Method for making diffusions into a substrate and electrical connections thereto using silicon containing rare earth hexaboride materials
US4490193A (en) * 1983-09-29 1984-12-25 International Business Machines Corporation Method for making diffusions into a substrate and electrical connections thereto using rare earth boride materials
JPS60220975A (ja) * 1984-04-18 1985-11-05 Toshiba Corp ＧａＡｓ電界効果トランジスタ及びその製造方法
US5075756A (en) * 1990-02-12 1991-12-24 At&T Bell Laboratories Low resistance contacts to semiconductor materials
US6225218B1 (en) * 1995-12-20 2001-05-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
US6885275B1 (en) * 1998-11-12 2005-04-26 Broadcom Corporation Multi-track integrated spiral inductor
KR100366046B1 (ko) * 2000-06-29 2002-12-27 삼성전자 주식회사 에벌란치 포토다이오드 제조방법
DE10315897B4 (de) * 2003-04-08 2005-03-10 Karlsruhe Forschzent Verfahren und Verwendung einer Vorrichtung zur Trennung von metallischen und halbleitenden Kohlenstoff-Nanoröhren
JP4914438B2 (ja) * 2005-05-17 2012-04-11 マックス−プランク−ゲゼルシャフト・ツア・フェルデルング・デア・ヴィッセンシャフテン・エー・ファオ 水素ベースのプラズマを用いた処理による材料の清浄化
US20080029854A1 (en) * 2006-08-03 2008-02-07 United Microelectronics Corp. Conductive shielding pattern and semiconductor structure with inductor device
US20140361407A1 (en) * 2013-06-05 2014-12-11 SCHMID Group Silicon material substrate doping method, structure and applications

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2817607A (en) * 1953-08-24 1957-12-24 Rca Corp Method of making semi-conductor bodies
US3169304A (en) * 1961-06-22 1965-02-16 Giannini Controls Corp Method of forming an ohmic semiconductor contact
US3206827A (en) * 1962-07-06 1965-09-21 Gen Instrument Corp Method of producing a semiconductor device
GB1102164A (en) * 1964-04-15 1968-02-07 Texas Instruments Inc Selective impurity diffusion
US3382568A (en) * 1965-07-22 1968-05-14 Ibm Method for providing electrical connections to semiconductor devices
US3391035A (en) * 1965-08-20 1968-07-02 Westinghouse Electric Corp Method of making p-nu-junction devices by diffusion
DE1544273A1 (de) * 1965-12-13 1969-09-04 Siemens Ag Verfahren zum Eindiffundieren von aus der Gasphase dargebotenem Dotierungsmaterial in einen Halbleitergrundkristall
JPS556287B1 (fr) * 1966-04-27 1980-02-15
FR1531539A (fr) * 1966-05-23 1968-07-05 Siemens Ag Procédé de fabrication d'un transistor
DE1564608B2 (de) * 1966-05-23 1976-11-18 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen eines transistors
US3403284A (en) * 1966-12-29 1968-09-24 Bell Telephone Labor Inc Target structure storage device using diode array

Also Published As

Publication number Publication date
GB1317583A (en) 1973-05-23
NL174684C (nl) 1984-07-16
US3601888A (en) 1971-08-31
JPS5443352B1 (fr) 1979-12-19
DE2019655C2 (de) 1982-05-06
DE7015061U (de) 1972-01-05
IE33752B1 (en) 1974-10-16
SE365343B (fr) 1974-03-18
FR2049078A1 (fr) 1971-03-26
DE2019655A1 (de) 1970-11-12
NL7005888A (fr) 1970-10-27
IE33752L (en) 1970-10-25
FR2049078B1 (fr) 1974-05-03

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