BR6912979D0 - Processo de fabricacao de dispositivo semicondutor dispositivo semicondutor fabricado pelo mesmo - Google Patents

Processo de fabricacao de dispositivo semicondutor dispositivo semicondutor fabricado pelo mesmo

Info

Publication number
BR6912979D0
BR6912979D0 BR212979/69A BR21297969A BR6912979D0 BR 6912979 D0 BR6912979 D0 BR 6912979D0 BR 212979/69 A BR212979/69 A BR 212979/69A BR 21297969 A BR21297969 A BR 21297969A BR 6912979 D0 BR6912979 D0 BR 6912979D0
Authority
BR
Brazil
Prior art keywords
semiconductor device
same
manufacturing process
device manufacturing
device manufactured
Prior art date
Application number
BR212979/69A
Other languages
English (en)
Inventor
M Iisuka
S Fujiwara
G Kano
H Iwasa
H Hasegawa
I Teramoto
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of BR6912979D0 publication Critical patent/BR6912979D0/pt

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/14—Aqueous compositions
    • C23F1/32—Alkaline compositions
    • C23F1/40—Alkaline compositions for etching other metallic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30608—Anisotropic liquid etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/102—Mask alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/115—Orientation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
BR212979/69A 1968-10-04 1969-10-02 Processo de fabricacao de dispositivo semicondutor dispositivo semicondutor fabricado pelo mesmo BR6912979D0 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP43072668A JPS4826188B1 (pt) 1968-10-04 1968-10-04

Publications (1)

Publication Number Publication Date
BR6912979D0 true BR6912979D0 (pt) 1973-01-11

Family

ID=13495958

Family Applications (1)

Application Number Title Priority Date Filing Date
BR212979/69A BR6912979D0 (pt) 1968-10-04 1969-10-02 Processo de fabricacao de dispositivo semicondutor dispositivo semicondutor fabricado pelo mesmo

Country Status (11)

Country Link
US (1) US3752702A (pt)
JP (1) JPS4826188B1 (pt)
AT (1) AT321991B (pt)
BE (1) BE739805A (pt)
BR (1) BR6912979D0 (pt)
DE (1) DE1949646C3 (pt)
ES (1) ES372101A1 (pt)
FR (1) FR2019961A1 (pt)
GB (1) GB1246026A (pt)
NL (1) NL153719B (pt)
SE (1) SE348319B (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2224159C3 (de) * 1972-05-18 1980-02-28 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Mikrowellendiode
US3841904A (en) * 1972-12-11 1974-10-15 Rca Corp Method of making a metal silicide-silicon schottky barrier
US3920861A (en) * 1972-12-18 1975-11-18 Rca Corp Method of making a semiconductor device
US3945110A (en) * 1973-08-23 1976-03-23 Hughes Aircraft Company Method of making an integrated optical detector
US4374012A (en) * 1977-09-14 1983-02-15 Raytheon Company Method of making semiconductor device having improved Schottky-barrier junction
US4261095A (en) * 1978-12-11 1981-04-14 International Business Machines Corporation Self aligned schottky guard ring
US4670970A (en) * 1985-04-12 1987-06-09 Harris Corporation Method for making a programmable vertical silicide fuse
DE4106287A1 (de) * 1990-10-25 1992-04-30 Bosch Gmbh Robert Verfahren zum anisotropen aetzen von monokristallinen, scheibenfoermigen traegern
JP2730357B2 (ja) * 1991-11-18 1998-03-25 松下電器産業株式会社 電子部品実装接続体およびその製造方法

Also Published As

Publication number Publication date
DE1949646A1 (de) 1970-04-30
ES372101A1 (es) 1971-09-01
NL153719B (nl) 1977-06-15
US3752702A (en) 1973-08-14
JPS4826188B1 (pt) 1973-08-07
BE739805A (pt) 1970-03-16
AT321991B (de) 1975-04-25
GB1246026A (en) 1971-09-15
DE1949646C3 (de) 1980-02-07
DE1949646B2 (de) 1972-01-27
FR2019961A1 (pt) 1970-07-10
SE348319B (pt) 1972-08-28
NL6914976A (pt) 1970-04-07

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