AU2003295647A1 - RELAXED SiGe LAYERS ON Si OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING - Google Patents
RELAXED SiGe LAYERS ON Si OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALINGInfo
- Publication number
- AU2003295647A1 AU2003295647A1 AU2003295647A AU2003295647A AU2003295647A1 AU 2003295647 A1 AU2003295647 A1 AU 2003295647A1 AU 2003295647 A AU2003295647 A AU 2003295647A AU 2003295647 A AU2003295647 A AU 2003295647A AU 2003295647 A1 AU2003295647 A1 AU 2003295647A1
- Authority
- AU
- Australia
- Prior art keywords
- silicon
- ion implantation
- thermal annealing
- relaxed sige
- sige layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 229910000577 Silicon-germanium Inorganic materials 0.000 title 1
- 238000000137 annealing Methods 0.000 title 1
- 239000012212 insulator Substances 0.000 title 1
- 238000005468 ion implantation Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/933—Germanium or silicon or Ge-Si on III-V
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Recrystallisation Techniques (AREA)
- Junction Field-Effect Transistors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/299,880 | 2002-11-19 | ||
| US10/299,880 US6855649B2 (en) | 2001-06-12 | 2002-11-19 | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| PCT/US2003/036969 WO2004047150A2 (en) | 2002-11-19 | 2003-11-19 | RELAXED SiGe LAYERS ON Si OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU2003295647A8 AU2003295647A8 (en) | 2004-06-15 |
| AU2003295647A1 true AU2003295647A1 (en) | 2004-06-15 |
Family
ID=32324383
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2003295647A Abandoned AU2003295647A1 (en) | 2002-11-19 | 2003-11-19 | RELAXED SiGe LAYERS ON Si OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6855649B2 (enExample) |
| EP (1) | EP1570511A4 (enExample) |
| JP (1) | JP5062955B2 (enExample) |
| KR (1) | KR100724509B1 (enExample) |
| CN (1) | CN100370586C (enExample) |
| AU (1) | AU2003295647A1 (enExample) |
| WO (1) | WO2004047150A2 (enExample) |
Families Citing this family (84)
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| JP2004507084A (ja) | 2000-08-16 | 2004-03-04 | マサチューセッツ インスティテュート オブ テクノロジー | グレーデッドエピタキシャル成長を用いた半導体品の製造プロセス |
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| US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
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| WO2018012546A1 (ja) * | 2016-07-15 | 2018-01-18 | 国立大学法人東京農工大学 | 半導体積層膜の製造方法、および半導体積層膜 |
| CN111128699B (zh) * | 2019-11-20 | 2022-05-13 | 济南晶正电子科技有限公司 | 一种复合单晶压电衬底薄膜及其制备方法 |
| WO2024263524A1 (en) * | 2023-06-20 | 2024-12-26 | Applied Materials, Inc. | Reduced strain and stop layer for si/sige epi stacks |
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| US4962051A (en) * | 1988-11-18 | 1990-10-09 | Motorola, Inc. | Method of forming a defect-free semiconductor layer on insulator |
| US5461243A (en) * | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
| US5710450A (en) * | 1994-12-23 | 1998-01-20 | Intel Corporation | Transistor with ultra shallow tip and method of fabrication |
| US6251720B1 (en) * | 1996-09-27 | 2001-06-26 | Randhir P. S. Thakur | High pressure reoxidation/anneal of high dielectric constant materials |
| EP0851513B1 (en) * | 1996-12-27 | 2007-11-21 | Canon Kabushiki Kaisha | Method of producing semiconductor member and method of producing solar cell |
| US5908313A (en) * | 1996-12-31 | 1999-06-01 | Intel Corporation | Method of forming a transistor |
| US6121100A (en) * | 1997-12-31 | 2000-09-19 | Intel Corporation | Method of fabricating a MOS transistor with a raised source/drain extension |
| DE19802977A1 (de) * | 1998-01-27 | 1999-07-29 | Forschungszentrum Juelich Gmbh | Verfahren zur Herstellung einer einkristallinen Schicht auf einem nicht gitterangepaßten Substrat, sowie eine oder mehrere solcher Schichten enthaltendes Bauelement |
| DE19859429A1 (de) * | 1998-12-22 | 2000-06-29 | Daimler Chrysler Ag | Verfahren zur Herstellung epitaktischer Silizium-Germaniumschichten |
| US6489241B1 (en) * | 1999-09-17 | 2002-12-03 | Applied Materials, Inc. | Apparatus and method for surface finishing a silicon film |
| US6555839B2 (en) * | 2000-05-26 | 2003-04-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
| WO2001099169A2 (en) * | 2000-06-22 | 2001-12-27 | Massachusetts Institute Of Technology | Etch stop layer system for sige devices |
| JP4269541B2 (ja) * | 2000-08-01 | 2009-05-27 | 株式会社Sumco | 半導体基板と電界効果型トランジスタ並びにSiGe層の形成方法及びこれを用いた歪みSi層の形成方法と電界効果型トランジスタの製造方法 |
| US6995076B2 (en) * | 2000-09-05 | 2006-02-07 | The Regents Of The University Of California | Relaxed SiGe films by surfactant mediation |
| US6593625B2 (en) * | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| US6562703B1 (en) * | 2002-03-13 | 2003-05-13 | Sharp Laboratories Of America, Inc. | Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content |
| JP2004079912A (ja) * | 2002-08-21 | 2004-03-11 | Sharp Corp | 半導体基板改質方法およびこの方法を用いた半導体装置 |
| JP4289864B2 (ja) * | 2002-10-22 | 2009-07-01 | シャープ株式会社 | 半導体装置及び半導体装置製造方法 |
| US7169226B2 (en) * | 2003-07-01 | 2007-01-30 | International Business Machines Corporation | Defect reduction by oxidation of silicon |
-
2002
- 2002-11-19 US US10/299,880 patent/US6855649B2/en not_active Expired - Fee Related
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2003
- 2003-11-19 EP EP03786848A patent/EP1570511A4/en not_active Withdrawn
- 2003-11-19 WO PCT/US2003/036969 patent/WO2004047150A2/en not_active Ceased
- 2003-11-19 CN CNB2003801035173A patent/CN100370586C/zh not_active Expired - Fee Related
- 2003-11-19 AU AU2003295647A patent/AU2003295647A1/en not_active Abandoned
- 2003-11-19 KR KR1020057007781A patent/KR100724509B1/ko not_active Expired - Fee Related
- 2003-11-19 JP JP2004553934A patent/JP5062955B2/ja not_active Expired - Fee Related
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| CN100370586C (zh) | 2008-02-20 |
| US6855649B2 (en) | 2005-02-15 |
| JP5062955B2 (ja) | 2012-10-31 |
| KR20050074980A (ko) | 2005-07-19 |
| CN1711625A (zh) | 2005-12-21 |
| JP2006506821A (ja) | 2006-02-23 |
| US20030218189A1 (en) | 2003-11-27 |
| WO2004047150A3 (en) | 2004-06-24 |
| AU2003295647A8 (en) | 2004-06-15 |
| KR100724509B1 (ko) | 2007-06-04 |
| EP1570511A2 (en) | 2005-09-07 |
| EP1570511A4 (en) | 2009-06-10 |
| WO2004047150A2 (en) | 2004-06-03 |
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