AU2002342218A1 - Ball grid array with x-ray alignment mark - Google Patents

Ball grid array with x-ray alignment mark

Info

Publication number
AU2002342218A1
AU2002342218A1 AU2002342218A AU2002342218A AU2002342218A1 AU 2002342218 A1 AU2002342218 A1 AU 2002342218A1 AU 2002342218 A AU2002342218 A AU 2002342218A AU 2002342218 A AU2002342218 A AU 2002342218A AU 2002342218 A1 AU2002342218 A1 AU 2002342218A1
Authority
AU
Australia
Prior art keywords
alignment mark
grid array
ball grid
ray alignment
ray
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002342218A
Other languages
English (en)
Inventor
Paul W. Primrose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of AU2002342218A1 publication Critical patent/AU2002342218A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/168—Wrong mounting prevention
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H10W46/103—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols alphanumeric information, e.g. words, letters or serial numbers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/603—Formed on wafers or substrates before dicing and remaining on chips after dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
AU2002342218A 2001-10-30 2002-10-29 Ball grid array with x-ray alignment mark Abandoned AU2002342218A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/016,288 2001-10-30
US10/016,288 US6563905B1 (en) 2001-10-30 2001-10-30 Ball grid array X-ray orientation mark
PCT/US2002/034809 WO2003038896A2 (en) 2001-10-30 2002-10-29 Ball grid array with x-ray alignment mark

Publications (1)

Publication Number Publication Date
AU2002342218A1 true AU2002342218A1 (en) 2003-05-12

Family

ID=21776350

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002342218A Abandoned AU2002342218A1 (en) 2001-10-30 2002-10-29 Ball grid array with x-ray alignment mark

Country Status (9)

Country Link
US (2) US6563905B1 (https=)
EP (1) EP1440471A2 (https=)
JP (2) JP2006502557A (https=)
CN (1) CN100375281C (https=)
AU (1) AU2002342218A1 (https=)
BR (1) BR0206243A (https=)
CA (1) CA2433488A1 (https=)
IL (2) IL156724A0 (https=)
WO (1) WO2003038896A2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7027070B2 (en) * 2001-11-29 2006-04-11 Agilent Technologies, Inc. Systems and methods for manipulating a graphical display of a printed circuit board model for an automated x-ray inspection system
US7386376B2 (en) 2002-01-25 2008-06-10 Intelligent Mechatronic Systems, Inc. Vehicle visual and non-visual data recording system
US7529336B2 (en) 2007-05-31 2009-05-05 Test Research, Inc. System and method for laminography inspection
US7989229B2 (en) * 2007-09-10 2011-08-02 International Business Machines Corporation Tactile surface inspection during device fabrication or assembly
JP5493360B2 (ja) * 2009-01-08 2014-05-14 オムロン株式会社 Ｘ線検査方法、ｘ線検査装置およびｘ線検査プログラム
JP2014192176A (ja) * 2013-03-26 2014-10-06 Ngk Spark Plug Co Ltd 配線基板
US10607049B2 (en) 2016-04-04 2020-03-31 Soreq Nuclear Research Center Method and a system for XRF marking and reading XRF marks of electronic systems
US11029267B2 (en) * 2016-04-04 2021-06-08 Security Matters Ltd. Method and a system for XRF marking and reading XRF marks of electronic systems

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4926452A (en) * 1987-10-30 1990-05-15 Four Pi Systems Corporation Automated laminography system for inspection of electronics
GB8806232D0 (en) * 1988-03-16 1988-04-13 Plessey Co Plc Vernier structure for flip chip bonded devices
JP3457348B2 (ja) * 1993-01-15 2003-10-14 株式会社東芝 半導体装置の製造方法
US5465152A (en) * 1994-06-03 1995-11-07 Robotic Vision Systems, Inc. Method for coplanarity inspection of package or substrate warpage for ball grid arrays, column arrays, and similar structures
JPH10226A (ja) * 1996-04-15 1998-01-06 Mitsugi Sugiyama Ｘ線により識別可能なプレス・スルー・パッケージ包装
JPH1074802A (ja) * 1996-08-30 1998-03-17 Shimu:Kk ボールグリッドアレイパッケージの接続構造及びその接続検査方法
JP3535683B2 (ja) * 1997-01-09 2004-06-07 株式会社ルネサステクノロジ 位置認識用マーク付半導体装置
JPH10284812A (ja) * 1997-04-08 1998-10-23 Mitsubishi Electric Corp 半導体デバイス
CA2289721A1 (en) * 1997-05-05 1998-11-12 Macrotron Process Technologies Gmbh Process and circuitry for inspecting welding points
JPH11191575A (ja) * 1997-12-25 1999-07-13 Shinkawa Ltd フリップチップボンディング用部品、フリップチップボンディング確認用部品及びフリップチップボンディング方法
JP3929178B2 (ja) * 1998-07-30 2007-06-13 シチズン時計株式会社 Ｉｃ実装構造
GB2344550A (en) * 1998-12-09 2000-06-14 Ibm Pad design for electronic package
US6272204B1 (en) * 1999-02-23 2001-08-07 Cr Technology, Inc. Integrated X-ray and visual inspection systems
US6577019B1 (en) * 2000-01-21 2003-06-10 Micron Technology, Inc. Alignment and orientation features for a semiconductor package
US6617702B2 (en) * 2001-01-25 2003-09-09 Ibm Corporation Semiconductor device utilizing alignment marks for globally aligning the front and back sides of a semiconductor substrate

Also Published As

Publication number Publication date
EP1440471A2 (en) 2004-07-28
CN1515032A (zh) 2004-07-21
HK1064509A1 (zh) 2005-01-28
JP2006502557A (ja) 2006-01-19
US6563905B1 (en) 2003-05-13
CN100375281C (zh) 2008-03-12
US20030082898A1 (en) 2003-05-01
IL156724A (en) 2007-07-04
CA2433488A1 (en) 2003-05-08
BR0206243A (pt) 2004-12-28
US20040008812A1 (en) 2004-01-15
WO2003038896A2 (en) 2003-05-08
IL156724A0 (en) 2004-01-04
JP2010103543A (ja) 2010-05-06
WO2003038896A3 (en) 2003-07-31
US6777821B2 (en) 2004-08-17

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase