BR0206243A - Marca de orientação de raios x para matriz de bolas em grade - Google Patents

Marca de orientação de raios x para matriz de bolas em grade

Info

Publication number
BR0206243A
BR0206243A BR0206243-7A BR0206243A BR0206243A BR 0206243 A BR0206243 A BR 0206243A BR 0206243 A BR0206243 A BR 0206243A BR 0206243 A BR0206243 A BR 0206243A
Authority
BR
Brazil
Prior art keywords
ray
electronic component
ball array
orientation mark
ray orientation
Prior art date
Application number
BR0206243-7A
Other languages
English (en)
Portuguese (pt)
Inventor
Paul W Primrose
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR0206243A publication Critical patent/BR0206243A/pt

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/168Wrong mounting prevention
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/101Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/101Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H10W46/103Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols alphanumeric information, e.g. words, letters or serial numbers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/601Marks applied to devices, e.g. for alignment or identification for use after dicing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/601Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/603Formed on wafers or substrates before dicing and remaining on chips after dicing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07231Techniques
    • H10W72/07236Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/944Dispositions of multiple bond pads
    • H10W72/9445Top-view layouts, e.g. mirror arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
BR0206243-7A 2001-10-30 2002-10-29 Marca de orientação de raios x para matriz de bolas em grade BR0206243A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/016,288 US6563905B1 (en) 2001-10-30 2001-10-30 Ball grid array X-ray orientation mark
PCT/US2002/034809 WO2003038896A2 (en) 2001-10-30 2002-10-29 Ball grid array with x-ray alignment mark

Publications (1)

Publication Number Publication Date
BR0206243A true BR0206243A (pt) 2004-12-28

Family

ID=21776350

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0206243-7A BR0206243A (pt) 2001-10-30 2002-10-29 Marca de orientação de raios x para matriz de bolas em grade

Country Status (9)

Country Link
US (2) US6563905B1 (https=)
EP (1) EP1440471A2 (https=)
JP (2) JP2006502557A (https=)
CN (1) CN100375281C (https=)
AU (1) AU2002342218A1 (https=)
BR (1) BR0206243A (https=)
CA (1) CA2433488A1 (https=)
IL (2) IL156724A0 (https=)
WO (1) WO2003038896A2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7027070B2 (en) * 2001-11-29 2006-04-11 Agilent Technologies, Inc. Systems and methods for manipulating a graphical display of a printed circuit board model for an automated x-ray inspection system
US7386376B2 (en) 2002-01-25 2008-06-10 Intelligent Mechatronic Systems, Inc. Vehicle visual and non-visual data recording system
US7529336B2 (en) 2007-05-31 2009-05-05 Test Research, Inc. System and method for laminography inspection
US7989229B2 (en) * 2007-09-10 2011-08-02 International Business Machines Corporation Tactile surface inspection during device fabrication or assembly
JP5493360B2 (ja) * 2009-01-08 2014-05-14 オムロン株式会社 X線検査方法、x線検査装置およびx線検査プログラム
JP2014192176A (ja) * 2013-03-26 2014-10-06 Ngk Spark Plug Co Ltd 配線基板
US10607049B2 (en) 2016-04-04 2020-03-31 Soreq Nuclear Research Center Method and a system for XRF marking and reading XRF marks of electronic systems
US11029267B2 (en) * 2016-04-04 2021-06-08 Security Matters Ltd. Method and a system for XRF marking and reading XRF marks of electronic systems

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4926452A (en) * 1987-10-30 1990-05-15 Four Pi Systems Corporation Automated laminography system for inspection of electronics
GB8806232D0 (en) * 1988-03-16 1988-04-13 Plessey Co Plc Vernier structure for flip chip bonded devices
JP3457348B2 (ja) * 1993-01-15 2003-10-14 株式会社東芝 半導体装置の製造方法
US5465152A (en) * 1994-06-03 1995-11-07 Robotic Vision Systems, Inc. Method for coplanarity inspection of package or substrate warpage for ball grid arrays, column arrays, and similar structures
JPH10226A (ja) * 1996-04-15 1998-01-06 Mitsugi Sugiyama X線により識別可能なプレス・スルー・パッケージ包装
JPH1074802A (ja) * 1996-08-30 1998-03-17 Shimu:Kk ボールグリッドアレイパッケージの接続構造及びその接続検査方法
JP3535683B2 (ja) * 1997-01-09 2004-06-07 株式会社ルネサステクノロジ 位置認識用マーク付半導体装置
JPH10284812A (ja) * 1997-04-08 1998-10-23 Mitsubishi Electric Corp 半導体デバイス
CA2289721A1 (en) * 1997-05-05 1998-11-12 Macrotron Process Technologies Gmbh Process and circuitry for inspecting welding points
JPH11191575A (ja) * 1997-12-25 1999-07-13 Shinkawa Ltd フリップチップボンディング用部品、フリップチップボンディング確認用部品及びフリップチップボンディング方法
JP3929178B2 (ja) * 1998-07-30 2007-06-13 シチズン時計株式会社 Ic実装構造
GB2344550A (en) * 1998-12-09 2000-06-14 Ibm Pad design for electronic package
US6272204B1 (en) * 1999-02-23 2001-08-07 Cr Technology, Inc. Integrated X-ray and visual inspection systems
US6577019B1 (en) * 2000-01-21 2003-06-10 Micron Technology, Inc. Alignment and orientation features for a semiconductor package
US6617702B2 (en) * 2001-01-25 2003-09-09 Ibm Corporation Semiconductor device utilizing alignment marks for globally aligning the front and back sides of a semiconductor substrate

Also Published As

Publication number Publication date
EP1440471A2 (en) 2004-07-28
CN1515032A (zh) 2004-07-21
HK1064509A1 (zh) 2005-01-28
JP2006502557A (ja) 2006-01-19
US6563905B1 (en) 2003-05-13
CN100375281C (zh) 2008-03-12
US20030082898A1 (en) 2003-05-01
IL156724A (en) 2007-07-04
CA2433488A1 (en) 2003-05-08
US20040008812A1 (en) 2004-01-15
WO2003038896A2 (en) 2003-05-08
IL156724A0 (en) 2004-01-04
JP2010103543A (ja) 2010-05-06
WO2003038896A3 (en) 2003-07-31
US6777821B2 (en) 2004-08-17
AU2002342218A1 (en) 2003-05-12

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Legal Events

Date Code Title Description
B08L Patent application lapsed because of non payment of annual fee [chapter 8.12 patent gazette]

Free format text: REFERENTE AO NAO RECOLHIMENTO DAS 10A E 11A ANUIDADES.

B08I Publication cancelled [chapter 8.9 patent gazette]

Free format text: ANULADA A PUBLICACAO CODIGO 8.12 NA RPI NO 2258 DE 15/04/2014 POR TER SIDO INDEVIDA.

B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE AS 10A, 11A, 12A, 13A, 14A, 15A, 16A, 17A E 18A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2602 DE 17-11-2020 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.