ATE77025T1 - Datenstromsynchronisiereinrichtungen. - Google Patents

Datenstromsynchronisiereinrichtungen.

Info

Publication number
ATE77025T1
ATE77025T1 AT85309200T AT85309200T ATE77025T1 AT E77025 T1 ATE77025 T1 AT E77025T1 AT 85309200 T AT85309200 T AT 85309200T AT 85309200 T AT85309200 T AT 85309200T AT E77025 T1 ATE77025 T1 AT E77025T1
Authority
AT
Austria
Prior art keywords
data stream
elastic buffer
synchronizer
data
synchronizers
Prior art date
Application number
AT85309200T
Other languages
English (en)
Inventor
Gerald L Bemis
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE77025T1 publication Critical patent/ATE77025T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/05—Electric or magnetic storage of signals before transmitting or retransmitting for changing the transmission rate
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/12—Indexing scheme relating to groups G06F5/12 - G06F5/14
    • G06F2205/123—Contention resolution, i.e. resolving conflicts between simultaneous read and write operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Paper (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Small-Scale Networks (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
AT85309200T 1984-12-18 1985-12-17 Datenstromsynchronisiereinrichtungen. ATE77025T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/683,434 US4692894A (en) 1984-12-18 1984-12-18 Overflow/Underflow detection for elastic buffer
EP85309200A EP0188111B1 (de) 1984-12-18 1985-12-17 Datenstromsynchronisiereinrichtungen

Publications (1)

Publication Number Publication Date
ATE77025T1 true ATE77025T1 (de) 1992-06-15

Family

ID=24744027

Family Applications (1)

Application Number Title Priority Date Filing Date
AT85309200T ATE77025T1 (de) 1984-12-18 1985-12-17 Datenstromsynchronisiereinrichtungen.

Country Status (5)

Country Link
US (1) US4692894A (de)
EP (1) EP0188111B1 (de)
JP (1) JPS61146030A (de)
AT (1) ATE77025T1 (de)
DE (1) DE3586177T2 (de)

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KR102342547B1 (ko) 2017-07-12 2021-12-23 삼성전자주식회사 버퍼 컨트롤러, 메모리 장치 및 집적회로 장치
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Also Published As

Publication number Publication date
EP0188111A3 (en) 1988-10-05
EP0188111B1 (de) 1992-06-03
US4692894A (en) 1987-09-08
JPS61146030A (ja) 1986-07-03
DE3586177D1 (de) 1992-07-09
DE3586177T2 (de) 1992-12-03
EP0188111A2 (de) 1986-07-23

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee