ATE61173T1 - Verriegelungsschaltung mit dynamisch waehlbarer polaritaet des ausgangs. - Google Patents
Verriegelungsschaltung mit dynamisch waehlbarer polaritaet des ausgangs.Info
- Publication number
- ATE61173T1 ATE61173T1 AT85110388T AT85110388T ATE61173T1 AT E61173 T1 ATE61173 T1 AT E61173T1 AT 85110388 T AT85110388 T AT 85110388T AT 85110388 T AT85110388 T AT 85110388T AT E61173 T1 ATE61173 T1 AT E61173T1
- Authority
- AT
- Austria
- Prior art keywords
- input
- data
- node
- output
- state
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356069—Bistable circuits using additional transistors in the feedback circuit
- H03K3/356078—Bistable circuits using additional transistors in the feedback circuit with synchronous operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
- H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
Landscapes
- Logic Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Interface Circuits In Exchanges (AREA)
- Lock And Its Accessories (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Control Of El Displays (AREA)
- Ultra Sonic Daignosis Equipment (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/652,257 US4638183A (en) | 1984-09-20 | 1984-09-20 | Dynamically selectable polarity latch |
EP85110388A EP0178419B1 (de) | 1984-09-20 | 1985-08-20 | Verriegelungsschaltung mit dynamisch wählbarer Polarität des Ausgangs |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE61173T1 true ATE61173T1 (de) | 1991-03-15 |
Family
ID=24616152
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT85110388T ATE61173T1 (de) | 1984-09-20 | 1985-08-20 | Verriegelungsschaltung mit dynamisch waehlbarer polaritaet des ausgangs. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4638183A (de) |
EP (1) | EP0178419B1 (de) |
JP (1) | JPS6174036A (de) |
AT (1) | ATE61173T1 (de) |
CA (1) | CA1241388A (de) |
DE (1) | DE3581872D1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2689416B2 (ja) * | 1986-08-18 | 1997-12-10 | 日本電気株式会社 | フリツプフロツプ |
FR2628878B1 (fr) * | 1988-03-18 | 1990-08-17 | Radiotechnique Compelec | Cellule de memorisation adressable, registre a decalage et memoire comportant de telles cellules |
US4939392A (en) * | 1988-08-11 | 1990-07-03 | Waferscale Integration, Inc. | Output circuit for driving a memory device output lead including a three-state inverting buffer and a transfer gate coupled between the buffer input lead and the buffer output lead |
US4914322A (en) * | 1988-12-16 | 1990-04-03 | Advanced Micro Devices, Inc. | Polarity option control logic for use with a register of a programmable logic array macrocell |
US5023486A (en) * | 1990-03-30 | 1991-06-11 | Atmel Corporation | Logic output control circuit for a latch |
US6353903B1 (en) * | 1994-10-28 | 2002-03-05 | International Business Machines Corporation | Method and apparatus for testing differential signals |
US6621302B2 (en) * | 2001-03-21 | 2003-09-16 | Bae Systems Information And Electronic Systems Integration, Inc | Efficient sequential circuits using critical race control |
US8255854B2 (en) * | 2006-09-22 | 2012-08-28 | Actel Corporation | Architecture and method for compensating for disparate signal rise and fall times by using polarity selection to improve timing and power in an integrated circuit |
US7816946B1 (en) | 2008-01-31 | 2010-10-19 | Actel Corporation | Inverting flip-flop for use in field programmable gate arrays |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3783254A (en) * | 1972-10-16 | 1974-01-01 | Ibm | Level sensitive logic system |
JPS5338373A (en) * | 1976-09-20 | 1978-04-08 | Seiko Epson Corp | Ic for watch |
US4107556A (en) * | 1977-05-12 | 1978-08-15 | Rca Corporation | Sense circuit employing complementary field effect transistors |
GB2030807B (en) * | 1978-10-02 | 1982-11-10 | Ibm | Latch circuit |
US4380055A (en) * | 1980-12-24 | 1983-04-12 | Mostek Corporation | Static RAM memory cell |
US4541076A (en) * | 1982-05-13 | 1985-09-10 | Storage Technology Corporation | Dual port CMOS random access memory |
US4506167A (en) * | 1982-05-26 | 1985-03-19 | Motorola, Inc. | High speed logic flip-flop latching arrangements including input and feedback pairs of transmission gates |
US4493077A (en) * | 1982-09-09 | 1985-01-08 | At&T Laboratories | Scan testable integrated circuit |
JPS59121697A (ja) * | 1982-12-27 | 1984-07-13 | Toshiba Corp | シフトレジスタ |
US4495629A (en) * | 1983-01-25 | 1985-01-22 | Storage Technology Partners | CMOS scannable latch |
US4554664A (en) * | 1983-10-06 | 1985-11-19 | Sperry Corporation | Static memory cell with dynamic scan test latch |
-
1984
- 1984-09-20 US US06/652,257 patent/US4638183A/en not_active Expired - Lifetime
-
1985
- 1985-05-17 JP JP60104127A patent/JPS6174036A/ja active Granted
- 1985-05-17 CA CA000481786A patent/CA1241388A/en not_active Expired
- 1985-08-20 DE DE8585110388T patent/DE3581872D1/de not_active Expired - Fee Related
- 1985-08-20 EP EP85110388A patent/EP0178419B1/de not_active Expired - Lifetime
- 1985-08-20 AT AT85110388T patent/ATE61173T1/de active
Also Published As
Publication number | Publication date |
---|---|
CA1241388A (en) | 1988-08-30 |
JPS6174036A (ja) | 1986-04-16 |
EP0178419A2 (de) | 1986-04-23 |
US4638183A (en) | 1987-01-20 |
EP0178419B1 (de) | 1991-02-27 |
DE3581872D1 (de) | 1991-04-04 |
EP0178419A3 (en) | 1989-10-11 |
JPH0417531B2 (de) | 1992-03-26 |
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