ATE523896T1 - Halbleitervorrichtung und herstellungsverfahren - Google Patents

Halbleitervorrichtung und herstellungsverfahren

Info

Publication number
ATE523896T1
ATE523896T1 AT08253481T AT08253481T ATE523896T1 AT E523896 T1 ATE523896 T1 AT E523896T1 AT 08253481 T AT08253481 T AT 08253481T AT 08253481 T AT08253481 T AT 08253481T AT E523896 T1 ATE523896 T1 AT E523896T1
Authority
AT
Austria
Prior art keywords
plating film
lead
tin
semiconductor device
constituting
Prior art date
Application number
AT08253481T
Other languages
English (en)
Inventor
Yasutaka Okura
Tomio Iwasaki
Takeshi Terasaki
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Application granted granted Critical
Publication of ATE523896T1 publication Critical patent/ATE523896T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07141—Means for applying energy, e.g. ovens or lasers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Wire Bonding (AREA)
AT08253481T 2007-10-26 2008-10-24 Halbleitervorrichtung und herstellungsverfahren ATE523896T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007278437A JP2009108339A (ja) 2007-10-26 2007-10-26 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
ATE523896T1 true ATE523896T1 (de) 2011-09-15

Family

ID=40239698

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08253481T ATE523896T1 (de) 2007-10-26 2008-10-24 Halbleitervorrichtung und herstellungsverfahren

Country Status (7)

Country Link
US (1) US20090108420A1 (de)
EP (2) EP2053656B1 (de)
JP (1) JP2009108339A (de)
KR (1) KR20090042716A (de)
CN (1) CN101419958A (de)
AT (1) ATE523896T1 (de)
TW (1) TW200931620A (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011527100A (ja) * 2008-06-30 2011-10-20 アギア システムズ インコーポレーテッド 金属フィルム上の成長形成物の防止または軽減
JP2010283303A (ja) * 2009-06-08 2010-12-16 Renesas Electronics Corp 半導体装置及びその製造方法
JP5419275B2 (ja) * 2009-11-30 2014-02-19 Ｊｘ日鉱日石金属株式会社 リフローＳｎめっき部材
US9349679B2 (en) * 2010-08-31 2016-05-24 Utac Thai Limited Singulation method for semiconductor package with plating on side of connectors
CN103187382B (zh) * 2011-12-27 2015-12-16 万国半导体(开曼)股份有限公司 应用在功率半导体元器件中的铝合金引线框架
JP2013206898A (ja) * 2012-03-27 2013-10-07 Tdk Corp チップ型電子部品
US20140377915A1 (en) * 2013-06-20 2014-12-25 Infineon Technologies Ag Pre-mold for a magnet semiconductor assembly group and method of producing the same
CN110265376A (zh) 2018-03-12 2019-09-20 意法半导体股份有限公司 引线框架表面精整
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same
JP6733940B1 (ja) * 2019-03-22 2020-08-05 大口マテリアル株式会社 リードフレーム

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3441194B2 (ja) * 1994-10-27 2003-08-25 京セラ株式会社 半導体装置及びその製造方法
US5614328A (en) * 1995-01-19 1997-03-25 The Furukawa Electric Co. Ltd. Reflow-plated member and a manufacturing method therefor
US6087714A (en) * 1998-04-27 2000-07-11 Matsushita Electric Industrial Co., Ltd. Semiconductor devices having tin-based solder film containing no lead and process for producing the devices
JP3402228B2 (ja) * 1998-11-26 2003-05-06 松下電器産業株式会社 鉛を含まない錫ベース半田皮膜を有する半導体装置
JP2001015666A (ja) * 1999-06-30 2001-01-19 Sony Corp 半導体装置及びその製造方法
JP4016637B2 (ja) * 2001-10-24 2007-12-05 松下電器産業株式会社 錫−銀合金めっき皮膜を有する電子部品用リードフレーム及びその製造方法
US6860981B2 (en) * 2002-04-30 2005-03-01 Technic, Inc. Minimizing whisker growth in tin electrodeposits
JP4367149B2 (ja) * 2004-01-30 2009-11-18 日立電線株式会社 フラットケーブル用導体及びその製造方法並びにフラットケーブル
US7488408B2 (en) * 2004-07-20 2009-02-10 Panasonic Corporation Tin-plated film and method for producing the same
US7215014B2 (en) * 2004-07-29 2007-05-08 Freescale Semiconductor, Inc. Solderable metal finish for integrated circuit package leads and method for forming
US7984841B2 (en) * 2005-06-17 2011-07-26 Fujitsu Limited Member formed with coating film having tin as its main component, coating film forming method and soldering method
US20070287022A1 (en) * 2006-06-07 2007-12-13 Honeywell International, Inc. Intumescent paint coatings for inhibiting tin whisker growth and methods of making and using the same

Also Published As

Publication number Publication date
KR20090042716A (ko) 2009-04-30
US20090108420A1 (en) 2009-04-30
CN101419958A (zh) 2009-04-29
EP2053656A2 (de) 2009-04-29
EP2385550A1 (de) 2011-11-09
TW200931620A (en) 2009-07-16
JP2009108339A (ja) 2009-05-21
EP2053656B1 (de) 2011-09-07
EP2053656A3 (de) 2010-05-05

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Legal Events

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