ATE50665T1 - Integrierte speichervorrichtungen. - Google Patents

Integrierte speichervorrichtungen.

Info

Publication number
ATE50665T1
ATE50665T1 AT85309201T AT85309201T ATE50665T1 AT E50665 T1 ATE50665 T1 AT E50665T1 AT 85309201 T AT85309201 T AT 85309201T AT 85309201 T AT85309201 T AT 85309201T AT E50665 T1 ATE50665 T1 AT E50665T1
Authority
AT
Austria
Prior art keywords
buried layer
storage devices
integrated storage
memory
memory cell
Prior art date
Application number
AT85309201T
Other languages
English (en)
Inventor
Drew Wanderman
Matthew Weinberg
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE50665T1 publication Critical patent/ATE50665T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/10SRAM devices comprising bipolar components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Saccharide Compounds (AREA)
  • Bipolar Transistors (AREA)
AT85309201T 1984-12-18 1985-12-17 Integrierte speichervorrichtungen. ATE50665T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US68328884A 1984-12-18 1984-12-18
EP85309201A EP0185544B1 (de) 1984-12-18 1985-12-17 Integrierte Speichervorrichtungen

Publications (1)

Publication Number Publication Date
ATE50665T1 true ATE50665T1 (de) 1990-03-15

Family

ID=24743373

Family Applications (1)

Application Number Title Priority Date Filing Date
AT85309201T ATE50665T1 (de) 1984-12-18 1985-12-17 Integrierte speichervorrichtungen.

Country Status (4)

Country Link
EP (1) EP0185544B1 (de)
JP (1) JPS61150266A (de)
AT (1) ATE50665T1 (de)
DE (1) DE3576244D1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0727974B2 (ja) * 1988-04-26 1995-03-29 三菱電機株式会社 半導体記憶装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564263A (en) * 1979-06-25 1981-01-17 Hitachi Ltd Semiconductor memory
JPS5953711B2 (ja) * 1980-03-25 1984-12-26 日本電気株式会社 メモリセル

Also Published As

Publication number Publication date
JPS61150266A (ja) 1986-07-08
EP0185544A1 (de) 1986-06-25
EP0185544B1 (de) 1990-02-28
DE3576244D1 (de) 1990-04-05

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties