ATE504192T1 - Leiterplatte und elektronisches bauteil - Google Patents

Leiterplatte und elektronisches bauteil

Info

Publication number
ATE504192T1
ATE504192T1 AT07254159T AT07254159T ATE504192T1 AT E504192 T1 ATE504192 T1 AT E504192T1 AT 07254159 T AT07254159 T AT 07254159T AT 07254159 T AT07254159 T AT 07254159T AT E504192 T1 ATE504192 T1 AT E504192T1
Authority
AT
Austria
Prior art keywords
circuit board
hole
insulating layer
electronic component
base insulating
Prior art date
Application number
AT07254159T
Other languages
English (en)
Inventor
Kensuke Nishi
Akinori Itokawa
Visit Thaveeprungsriporn
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Application granted granted Critical
Publication of ATE504192T1 publication Critical patent/ATE504192T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969—Apertured conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Burglar Alarm Systems (AREA)
  • Filters And Equalizers (AREA)
AT07254159T 2006-10-27 2007-10-19 Leiterplatte und elektronisches bauteil ATE504192T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006292803A JP4919761B2 (ja) 2006-10-27 2006-10-27 配線回路基板および電子部品装置

Publications (1)

Publication Number Publication Date
ATE504192T1 true ATE504192T1 (de) 2011-04-15

Family

ID=38963237

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07254159T ATE504192T1 (de) 2006-10-27 2007-10-19 Leiterplatte und elektronisches bauteil

Country Status (6)

Country Link
US (1) US7985926B2 (de)
EP (1) EP1916885B1 (de)
JP (1) JP4919761B2 (de)
CN (1) CN101170867B (de)
AT (1) ATE504192T1 (de)
DE (1) DE602007013511D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101321430B (zh) * 2007-06-04 2010-11-10 鸿富锦精密工业（深圳）有限公司 电路板组件及其制造方法
TW201121004A (en) * 2009-12-10 2011-06-16 Bridge Semiconductor Corp Semiconductor chipsets.
CN101894762B (zh) * 2010-06-12 2012-12-26 深圳大学 一种金属导热基板及其制作方法
JP5395854B2 (ja) * 2011-08-11 2014-01-22 タツタ電線株式会社 プリント配線板及びプリント配線板の製造方法
US8586217B2 (en) * 2011-12-22 2013-11-19 Samsung Sdi Co., Ltd. Protective circuit module
JP5939102B2 (ja) * 2012-09-18 2016-06-22 富士通株式会社 電子機器
CN105009692A (zh) * 2013-10-24 2015-10-28 住友电气工业株式会社 散热电路板及其制造方法
JP2015211204A (ja) * 2014-04-30 2015-11-24 イビデン株式会社 回路基板及びその製造方法
JP5659379B1 (ja) * 2014-09-04 2015-01-28 東洋インキＳｃホールディングス株式会社 プリント配線板
JP2017224788A (ja) * 2016-06-17 2017-12-21 ミヨシ電子株式会社 電子回路装置
CN107134443B (zh) * 2017-06-23 2019-09-03 厦门天马微电子有限公司 覆晶薄膜、显示装置和集成电路的封装方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835598A (en) * 1985-06-13 1989-05-30 Matsushita Electric Works, Ltd. Wiring board
JPH0263141A (ja) * 1989-04-05 1990-03-02 Ibiden Co Ltd 電子部品搭載用基板の製造方法
US5113315A (en) * 1990-08-07 1992-05-12 Cirqon Technologies Corporation Heat-conductive metal ceramic composite material panel system for improved heat dissipation
JPH0786718A (ja) * 1993-06-21 1995-03-31 Sony Corp プリント配線基板におけるベアチップ実装構造
JP3004578B2 (ja) * 1995-05-12 2000-01-31 財団法人工業技術研究院 熱放散増強のための多熱導伝路とパッケージ統合性及び信頼性向上のための縁の周りを囲むキャップからなる集積回路パッケージ
US6156980A (en) * 1998-06-04 2000-12-05 Delco Electronics Corp. Flip chip on circuit board with enhanced heat dissipation and method therefor
US6710433B2 (en) * 2000-11-15 2004-03-23 Skyworks Solutions, Inc. Leadless chip carrier with embedded inductor
JP2002162626A (ja) * 2000-11-22 2002-06-07 Sony Corp 液晶表示用光源の放熱装置及びその製造方法
JP2003282778A (ja) 2002-03-26 2003-10-03 Fujikura Ltd 半導体装置及びプリント配線基板
JP2003289191A (ja) * 2002-03-28 2003-10-10 Denso Corp 電子制御装置
US7161240B2 (en) * 2002-06-27 2007-01-09 Eastman Kodak Company Insitu-cooled electrical assemblage
JP3878527B2 (ja) * 2002-08-20 2007-02-07 住友電工プリントサーキット株式会社 プリント基板
US20040037044A1 (en) * 2002-08-21 2004-02-26 Alexander Cook Heat sink for surface mounted power devices
US7026664B2 (en) * 2003-04-24 2006-04-11 Power-One, Inc. DC-DC converter implemented in a land grid array package
TWI348748B (en) * 2003-10-07 2011-09-11 Rohm Co Ltd Semiconductor device and method of fabricating the same
JP4386763B2 (ja) * 2004-03-05 2009-12-16 ローム株式会社 半導体装置
JP4081052B2 (ja) * 2003-12-05 2008-04-23 三井金属鉱業株式会社 プリント配線基板の製造法
JP4721161B2 (ja) * 2005-03-31 2011-07-13 ミネベア株式会社 面状照明装置

Also Published As

Publication number Publication date
CN101170867A (zh) 2008-04-30
EP1916885A2 (de) 2008-04-30
JP4919761B2 (ja) 2012-04-18
EP1916885B1 (de) 2011-03-30
US20080099237A1 (en) 2008-05-01
JP2008109044A (ja) 2008-05-08
EP1916885A3 (de) 2009-08-05
DE602007013511D1 (de) 2011-05-12
CN101170867B (zh) 2011-06-01
US7985926B2 (en) 2011-07-26

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties