ATE374435T1 - Verfahren zur herstellung einer halbleiteranordnung mit einer versenkten isolierschicht mit veränderlicher dicke - Google Patents
Verfahren zur herstellung einer halbleiteranordnung mit einer versenkten isolierschicht mit veränderlicher dickeInfo
- Publication number
- ATE374435T1 ATE374435T1 AT01936228T AT01936228T ATE374435T1 AT E374435 T1 ATE374435 T1 AT E374435T1 AT 01936228 T AT01936228 T AT 01936228T AT 01936228 T AT01936228 T AT 01936228T AT E374435 T1 ATE374435 T1 AT E374435T1
- Authority
- AT
- Austria
- Prior art keywords
- trench
- insulating layer
- producing
- semiconductor device
- variable thickness
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000000463 material Substances 0.000 abstract 4
- 238000000151 deposition Methods 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 2
- 239000000945 filler Substances 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/664—Inverted VDMOS transistors, i.e. source-down VDMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
- H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/231—Emitter or collector electrodes for bipolar transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/152—Source regions of DMOS transistors
- H10D62/154—Dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/254—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts
Landscapes
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
- Thyristors (AREA)
- Led Devices (AREA)
- Drying Of Semiconductors (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0010041.2A GB0010041D0 (en) | 2000-04-26 | 2000-04-26 | Trench semiconductor device manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE374435T1 true ATE374435T1 (de) | 2007-10-15 |
Family
ID=9890465
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT01936228T ATE374435T1 (de) | 2000-04-26 | 2001-04-12 | Verfahren zur herstellung einer halbleiteranordnung mit einer versenkten isolierschicht mit veränderlicher dicke |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6319777B1 (de) |
| EP (1) | EP1281200B1 (de) |
| JP (1) | JP2003532293A (de) |
| AT (1) | ATE374435T1 (de) |
| DE (1) | DE60130647T2 (de) |
| GB (1) | GB0010041D0 (de) |
| WO (1) | WO2001082359A2 (de) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6635534B2 (en) * | 2000-06-05 | 2003-10-21 | Fairchild Semiconductor Corporation | Method of manufacturing a trench MOSFET using selective growth epitaxy |
| US6583479B1 (en) * | 2000-10-16 | 2003-06-24 | Advanced Micro Devices, Inc. | Sidewall NROM and method of manufacture thereof for non-volatile memory cells |
| US6649477B2 (en) * | 2001-10-04 | 2003-11-18 | General Semiconductor, Inc. | Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands |
| US6465304B1 (en) * | 2001-10-04 | 2002-10-15 | General Semiconductor, Inc. | Method for fabricating a power semiconductor device having a floating island voltage sustaining layer |
| US7736976B2 (en) * | 2001-10-04 | 2010-06-15 | Vishay General Semiconductor Llc | Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands |
| US6674124B2 (en) * | 2001-11-15 | 2004-01-06 | General Semiconductor, Inc. | Trench MOSFET having low gate charge |
| US6566201B1 (en) * | 2001-12-31 | 2003-05-20 | General Semiconductor, Inc. | Method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion |
| US6576516B1 (en) | 2001-12-31 | 2003-06-10 | General Semiconductor, Inc. | High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and diffusion from regions of oppositely doped polysilicon |
| US6750104B2 (en) * | 2001-12-31 | 2004-06-15 | General Semiconductor, Inc. | High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching using an etchant gas that is also a doping source |
| US6656797B2 (en) | 2001-12-31 | 2003-12-02 | General Semiconductor, Inc. | High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation |
| ITVA20020005A1 (it) * | 2002-01-25 | 2003-07-25 | St Microelectronics Srl | Flusso di processo per la realizzazione di un transitore mos di potenza a trench di gate con canale di dimensioni scalate |
| US6742247B2 (en) * | 2002-03-14 | 2004-06-01 | General Dynamics Advanced Information Systems, Inc. | Process for manufacturing laminated high layer count printed circuit boards |
| US6686244B2 (en) * | 2002-03-21 | 2004-02-03 | General Semiconductor, Inc. | Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step |
| DE10219329B4 (de) * | 2002-04-30 | 2014-01-23 | Infineon Technologies Ag | Halbleiterschaltungsanordnung |
| KR100521369B1 (ko) * | 2002-12-18 | 2005-10-12 | 삼성전자주식회사 | 고속도 및 저전력 소모 반도체 소자 및 그 제조 방법 |
| US7279743B2 (en) | 2003-12-02 | 2007-10-09 | Vishay-Siliconix | Closed cell trench metal-oxide-semiconductor field effect transistor |
| US6906380B1 (en) | 2004-05-13 | 2005-06-14 | Vishay-Siliconix | Drain side gate trench metal-oxide-semiconductor field effect transistor |
| US8183629B2 (en) * | 2004-05-13 | 2012-05-22 | Vishay-Siliconix | Stacked trench metal-oxide-semiconductor field effect transistor device |
| JP5350783B2 (ja) * | 2005-05-24 | 2013-11-27 | ヴィシェイ−シリコニックス | トレンチ型金属酸化物半導体電界効果トランジスタの製造方法 |
| JP4622905B2 (ja) * | 2006-03-24 | 2011-02-02 | トヨタ自動車株式会社 | 絶縁ゲート型半導体装置の製造方法 |
| TWI320207B (en) * | 2006-05-05 | 2010-02-01 | Method of fabricating metal oxide semiconductor | |
| US8471390B2 (en) * | 2006-05-12 | 2013-06-25 | Vishay-Siliconix | Power MOSFET contact metallization |
| US8368126B2 (en) | 2007-04-19 | 2013-02-05 | Vishay-Siliconix | Trench metal oxide semiconductor with recessed trench material and remote contacts |
| JP2009026809A (ja) * | 2007-07-17 | 2009-02-05 | Toyota Motor Corp | 半導体装置とその製造方法 |
| JP5266738B2 (ja) * | 2007-12-05 | 2013-08-21 | トヨタ自動車株式会社 | トレンチゲート型半導体装置の製造方法 |
| KR100905789B1 (ko) * | 2008-01-02 | 2009-07-02 | 주식회사 하이닉스반도체 | 수직형 트랜지스터를 구비한 반도체 소자의 제조방법 |
| US10205017B2 (en) * | 2009-06-17 | 2019-02-12 | Alpha And Omega Semiconductor Incorporated | Bottom source NMOS triggered Zener clamp for configuring an ultra-low voltage transient voltage suppressor (TVS) |
| US9306056B2 (en) | 2009-10-30 | 2016-04-05 | Vishay-Siliconix | Semiconductor device with trench-like feed-throughs |
| US8604525B2 (en) | 2009-11-02 | 2013-12-10 | Vishay-Siliconix | Transistor structure with feed-through source-to-substrate contact |
| DE102010034116B3 (de) * | 2010-08-12 | 2012-01-12 | Infineon Technologies Austria Ag | Verfahren zum Erzeugen einer Isolationsschicht zwischen zwei Elektroden |
| US9543208B2 (en) * | 2014-02-24 | 2017-01-10 | Infineon Technologies Ag | Method of singulating semiconductor devices using isolation trenches |
| US9425304B2 (en) | 2014-08-21 | 2016-08-23 | Vishay-Siliconix | Transistor structure with improved unclamped inductive switching immunity |
| US9559158B2 (en) | 2015-01-12 | 2017-01-31 | The Hong Kong University Of Science And Technology | Method and apparatus for an integrated capacitor |
| CN109037337A (zh) * | 2018-06-28 | 2018-12-18 | 华为技术有限公司 | 一种功率半导体器件及制造方法 |
| TWI803217B (zh) * | 2021-12-16 | 2023-05-21 | 南亞科技股份有限公司 | 具有減少洩漏的字元線的記憶體元件 |
| US20230197771A1 (en) * | 2021-12-16 | 2023-06-22 | Nanya Technology Corporation | Memory device having word lines with reduced leakage |
| EP4290585A1 (de) | 2022-06-08 | 2023-12-13 | Nexperia B.V. | Seitlich orientierter metalloxidhalbleiter, mos-vorrichtung mit einem halbleiterkörper |
| US12581715B2 (en) * | 2023-01-12 | 2026-03-17 | Macronix International Co., Ltd. | Semiconductor device and a method of fabricating the same with increased effective width of the channel without increasing the width of the gate active region |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0294477A (ja) * | 1988-09-30 | 1990-04-05 | Toshiba Corp | 半導体装置及びその製造方法 |
| US5242845A (en) * | 1990-06-13 | 1993-09-07 | Kabushiki Kaisha Toshiba | Method of production of vertical MOS transistor |
| JP3008479B2 (ja) * | 1990-11-05 | 2000-02-14 | 日産自動車株式会社 | 半導体装置 |
| US5345102A (en) * | 1992-02-28 | 1994-09-06 | Nec Corporation | Bipolar transistor having collector electrode penetrating emitter and base regions |
| JP3338178B2 (ja) * | 1994-05-30 | 2002-10-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
| KR0172262B1 (ko) * | 1995-12-30 | 1999-02-01 | 김주용 | 반도체 소자의 제조방법 |
| DE19638439C2 (de) * | 1996-09-19 | 2000-06-15 | Siemens Ag | Durch Feldeffekt steuerbares, vertikales Halbleiterbauelement und Herstellungsverfahren |
| WO1999043029A1 (de) * | 1998-02-20 | 1999-08-26 | Infineon Technologies Ag | Graben-gate-mos-transistor, dessen verwendung in einer eeprom-anordnung und verfahren zu dessen herstellung |
-
2000
- 2000-04-26 GB GBGB0010041.2A patent/GB0010041D0/en not_active Ceased
-
2001
- 2001-04-12 JP JP2001579350A patent/JP2003532293A/ja not_active Withdrawn
- 2001-04-12 EP EP01936228A patent/EP1281200B1/de not_active Expired - Lifetime
- 2001-04-12 WO PCT/EP2001/004187 patent/WO2001082359A2/en not_active Ceased
- 2001-04-12 DE DE60130647T patent/DE60130647T2/de not_active Expired - Lifetime
- 2001-04-12 AT AT01936228T patent/ATE374435T1/de not_active IP Right Cessation
- 2001-04-24 US US09/840,816 patent/US6319777B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE60130647D1 (de) | 2007-11-08 |
| EP1281200A2 (de) | 2003-02-05 |
| EP1281200B1 (de) | 2007-09-26 |
| JP2003532293A (ja) | 2003-10-28 |
| GB0010041D0 (en) | 2000-06-14 |
| US6319777B1 (en) | 2001-11-20 |
| WO2001082359A2 (en) | 2001-11-01 |
| DE60130647T2 (de) | 2008-06-19 |
| WO2001082359A3 (en) | 2002-05-16 |
| US20010036704A1 (en) | 2001-11-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |