ATE357045T1 - Matrixadressierbares array integrierter transistor-/speicherstrukturen - Google Patents

Matrixadressierbares array integrierter transistor-/speicherstrukturen

Info

Publication number
ATE357045T1
ATE357045T1 AT02804659T AT02804659T ATE357045T1 AT E357045 T1 ATE357045 T1 AT E357045T1 AT 02804659 T AT02804659 T AT 02804659T AT 02804659 T AT02804659 T AT 02804659T AT E357045 T1 ATE357045 T1 AT E357045T1
Authority
AT
Austria
Prior art keywords
electrode
electrodes
source
recess
transistor
Prior art date
Application number
AT02804659T
Other languages
English (en)
Inventor
Hans Gude Gudesen
Original Assignee
Thin Film Electronics Asa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics Asa filed Critical Thin Film Electronics Asa
Application granted granted Critical
Publication of ATE357045T1 publication Critical patent/ATE357045T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT02804659T 2001-12-10 2002-11-18 Matrixadressierbares array integrierter transistor-/speicherstrukturen ATE357045T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NO20016041A NO20016041A (no) 2001-12-10 2001-12-10 Matriseadresserbar gruppe av integrerte transistor/minnestrukturer

Publications (1)

Publication Number Publication Date
ATE357045T1 true ATE357045T1 (de) 2007-04-15

Family

ID=19913138

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02804659T ATE357045T1 (de) 2001-12-10 2002-11-18 Matrixadressierbares array integrierter transistor-/speicherstrukturen

Country Status (11)

Country Link
EP (1) EP1451825B1 (de)
JP (1) JP2005512338A (de)
KR (1) KR100556089B1 (de)
CN (1) CN1602531A (de)
AT (1) ATE357045T1 (de)
AU (1) AU2002366675A1 (de)
CA (1) CA2466153C (de)
DE (1) DE60218887D1 (de)
NO (1) NO20016041A (de)
RU (1) RU2287205C2 (de)
WO (1) WO2003050814A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8120082B2 (en) 2005-09-12 2012-02-21 University of Seoul, Foundation of Industry-Academic Cooperation Ferroelectric memory device and method for manufacturing the same
KR100988227B1 (ko) * 2005-09-12 2010-10-18 서울시립대학교 산학협력단 강유전체 메모리장치 및 그 제조방법
EP1808863A1 (de) * 2006-01-16 2007-07-18 Deutsche Thomson-Brandt Gmbh Verfahren und Vorrichtung zur Aufzeichnung von Hochgeschwindigkeitseingabedaten auf einer Speichergerätematrix
KR101245293B1 (ko) * 2006-01-19 2013-03-19 서울시립대학교 산학협력단 강유전체 메모리의 제조를 위한 강유전 물질
US10163917B2 (en) * 2016-11-01 2018-12-25 Micron Technology, Inc. Cell disturb prevention using a leaker device to reduce excess charge from an electronic device
CN112908368B (zh) * 2021-02-04 2023-03-21 清华大学 基于单片三维异质集成的三态内容寻址存储器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4952031A (en) * 1987-06-19 1990-08-28 Victor Company Of Japan, Ltd. Liquid crystal display device
RU2054753C1 (ru) * 1993-03-19 1996-02-20 Институт физики полупроводников СО РАН Устройство считывания на приборах с зарядовой связью для двумерных приемников изображения
JPH07106450A (ja) * 1993-10-08 1995-04-21 Olympus Optical Co Ltd 強誘電体ゲートトランジスタメモリ
DE69739045D1 (de) * 1997-08-27 2008-11-27 St Microelectronics Srl Herstellungsverfahren für elektronische Speicherbauelemente mit virtueller Masse
US6072716A (en) * 1999-04-14 2000-06-06 Massachusetts Institute Of Technology Memory structures and methods of making same
US6473388B1 (en) * 2000-08-31 2002-10-29 Hewlett Packard Company Ultra-high density information storage device based on modulated cathodoconductivity

Also Published As

Publication number Publication date
WO2003050814A1 (en) 2003-06-19
EP1451825A1 (de) 2004-09-01
KR100556089B1 (ko) 2006-03-03
JP2005512338A (ja) 2005-04-28
CN1602531A (zh) 2005-03-30
CA2466153A1 (en) 2003-06-19
AU2002366675A1 (en) 2003-06-23
NO20016041D0 (no) 2001-12-10
CA2466153C (en) 2007-01-23
KR20040064733A (ko) 2004-07-19
NO314736B1 (no) 2003-05-12
EP1451825B1 (de) 2007-03-14
DE60218887D1 (de) 2007-04-26
RU2287205C2 (ru) 2006-11-10
NO20016041A (no) 2003-05-12
RU2004120776A (ru) 2005-09-20

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