ATE340411T1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents

Verfahren zur herstellung einer halbleitervorrichtung

Info

Publication number
ATE340411T1
ATE340411T1 AT97947922T AT97947922T ATE340411T1 AT E340411 T1 ATE340411 T1 AT E340411T1 AT 97947922 T AT97947922 T AT 97947922T AT 97947922 T AT97947922 T AT 97947922T AT E340411 T1 ATE340411 T1 AT E340411T1
Authority
AT
Austria
Prior art keywords
temperature
sputtering process
aluminum
temperature sputtering
producing
Prior art date
Application number
AT97947922T
Other languages
English (en)
Inventor
Toyohiko Kuno
Kenichi Kitamura
Ken Tanaka
Original Assignee
Asahi Chemical Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chemical Ind filed Critical Asahi Chemical Ind
Application granted granted Critical
Publication of ATE340411T1 publication Critical patent/ATE340411T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846—Layer combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Physical Vapour Deposition (AREA)
AT97947922T 1996-12-12 1997-12-12 Verfahren zur herstellung einer halbleitervorrichtung ATE340411T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33193196 1996-12-12

Publications (1)

Publication Number Publication Date
ATE340411T1 true ATE340411T1 (de) 2006-10-15

Family

ID=18249249

Family Applications (1)

Application Number Title Priority Date Filing Date
AT97947922T ATE340411T1 (de) 1996-12-12 1997-12-12 Verfahren zur herstellung einer halbleitervorrichtung

Country Status (10)

Country Link
US (1) US6162729A (de)
EP (1) EP0951066B1 (de)
JP (1) JP4226658B2 (de)
KR (1) KR100339670B1 (de)
CN (1) CN1121711C (de)
AT (1) ATE340411T1 (de)
AU (1) AU5411498A (de)
DE (1) DE69736717T2 (de)
TW (1) TW417178B (de)
WO (1) WO1998026450A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10032792A1 (de) * 2000-06-28 2002-01-17 Infineon Technologies Ag Verfahren zur Herstellung einer Verdrahtung für Kontaktlöcher
US20060157947A1 (en) * 2003-09-19 2006-07-20 Paulovits Gabor Jr Method of skate board identification
JP2007299947A (ja) * 2006-04-28 2007-11-15 Toshiba Corp 半導体装置の製造方法
CN101673678B (zh) * 2008-09-09 2011-03-16 中芯国际集成电路制造(北京)有限公司 铝层的生长方法及金属-绝缘体-金属板
JP6096013B2 (ja) * 2013-03-15 2017-03-15 旭化成エレクトロニクス株式会社 半導体装置の製造方法および半導体装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5055908A (en) * 1987-07-27 1991-10-08 Texas Instruments Incorporated Semiconductor circuit having metallization with TiW
US4970176A (en) * 1989-09-29 1990-11-13 Motorola, Inc. Multiple step metallization process
US5658828A (en) * 1989-11-30 1997-08-19 Sgs-Thomson Microelectronics, Inc. Method for forming an aluminum contact through an insulating layer
JPH0464222A (ja) * 1990-07-04 1992-02-28 Fujitsu Ltd 半導体装置の製造方法
US5300813A (en) * 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US5270255A (en) * 1993-01-08 1993-12-14 Chartered Semiconductor Manufacturing Pte, Ltd. Metallization process for good metal step coverage while maintaining useful alignment mark
JP3457348B2 (ja) * 1993-01-15 2003-10-14 株式会社東芝 半導体装置の製造方法
JPH06260441A (ja) * 1993-03-03 1994-09-16 Nec Corp 半導体装置の製造方法
US5356836A (en) * 1993-08-19 1994-10-18 Industrial Technology Research Institute Aluminum plug process
KR950015602A (ko) * 1993-11-22 1995-06-17 모리시다 요이치 반도체 장치의 제조방법
US5523259A (en) * 1994-12-05 1996-06-04 At&T Corp. Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer
TW298674B (de) * 1995-07-07 1997-02-21 At & T Corp
US5633199A (en) * 1995-11-02 1997-05-27 Motorola Inc. Process for fabricating a metallized interconnect structure in a semiconductor device
US5844318A (en) * 1997-02-18 1998-12-01 Micron Technology, Inc. Aluminum film for semiconductive devices

Also Published As

Publication number Publication date
KR20000069433A (ko) 2000-11-25
CN1121711C (zh) 2003-09-17
US6162729A (en) 2000-12-19
EP0951066A4 (de) 2000-02-23
AU5411498A (en) 1998-07-03
WO1998026450A1 (fr) 1998-06-18
JP4226658B2 (ja) 2009-02-18
EP0951066A1 (de) 1999-10-20
EP0951066B1 (de) 2006-09-20
TW417178B (en) 2001-01-01
DE69736717T2 (de) 2007-09-13
KR100339670B1 (ko) 2002-06-05
DE69736717D1 (de) 2006-11-02
CN1240052A (zh) 1999-12-29

Similar Documents

Publication Publication Date Title
ATE233657T1 (de) Verfahren zur herstellung eines reissverschlusselements
ATE195610T1 (de) Verfahren zur herstellung eines halbleiterkörpers
DE69012727D1 (de) Verfahren zur herstellung eines polykristallinen filmes mittels chemischen dampfniederschlags.
ATE473518T1 (de) Verfahren zur herstellung von dünnschichtbauelementen für solarzellen oder soi- anwendungen
DE3782683D1 (de) Verfahren zur herstellung eines duennfilmtransistors.
WO2002077716A3 (en) Scanning probe based lithographic alignment
ATE194884T1 (de) Verfahren zur herstellung eines halbleiter- bauelements
DE69937803D1 (de) Verfahren zur herstellung eines czochralski silizium wafers ohne sauerstoffniederschlag
DE69942582D1 (de) Zusammengesetzter zeolithfilm und verfahren zur herstellung desselben
DE69622261D1 (de) Verfahren zur herstellung einer struktur unter verwendung von wiederablagerung
ATE240824T1 (de) Lithophanieartiger gegenstand und verfahren zur herstellung desselben
ATE201460T1 (de) Verfahren zur herstellung von aluminiumoxidfilmen unter verwendung von dialkylaluminiumalkoxid
ATE340411T1 (de) Verfahren zur herstellung einer halbleitervorrichtung
DE3574740D1 (de) Verfahren zur herstellung eines keramischen films.
DE69032340D1 (de) Verfahren zur Herstellung einer Halbleiterdünnschicht
DE69506215T2 (de) Verfahren zur herstellung einer dünnen schicht aus konjugiertem, substituiertem oder nicht-substituiertem poly(p-phenylen-vinylen) mittels gasphasenabscheidung und herstellungsverfahren einer elektrolumineszierenden vorrichtung
ATE423330T1 (de) Verfahren zum herstellen eines optischen bauteils mit einer wasserabstossenden dünnschicht
ATE28082T1 (de) Verfahren zur herstellung von folien aus kopolymeren.
ATE120472T1 (de) Kontinuierliches verfahren zur herstellung von filmen aus poly(aryl-ether-keton-ketonen).
DE69231288D1 (de) Verfahren zur Herstellung einer Verbindungshalbleiter-Dünnschicht
DE3485599D1 (de) Duennschicht-feldeffekttransistor mit kurzem kanal und verfahren zu seiner herstellung.
ATE336390T1 (de) Verfahren zur herstellung einer lichtempfindlichen flachdruckplatte
DE69524568D1 (de) Verfahren zur herstellung eines thermisch stabilen silizids
DE69000112D1 (de) Substrat zur herstellung eines dickschichtschaltkreises.
DE69404214D1 (de) Verfahren zur Herstellung einer supraleitenden dünnen Schicht vom Hg-Typ

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties