ATE235094T1 - Stabilisierkreise für mehrere digitale bits - Google Patents
Stabilisierkreise für mehrere digitale bitsInfo
- Publication number
- ATE235094T1 ATE235094T1 AT97922523T AT97922523T ATE235094T1 AT E235094 T1 ATE235094 T1 AT E235094T1 AT 97922523 T AT97922523 T AT 97922523T AT 97922523 T AT97922523 T AT 97922523T AT E235094 T1 ATE235094 T1 AT E235094T1
- Authority
- AT
- Austria
- Prior art keywords
- memory
- charge
- memory cells
- memory system
- predetermined levels
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5657—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using ferroelectric storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Plural Heterocyclic Compounds (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/640,367 US5815439A (en) | 1996-04-30 | 1996-04-30 | Stabilization circuits and techniques for storage and retrieval of single or multiple digital bits per memory cell |
PCT/US1997/007152 WO1997041640A1 (en) | 1996-04-30 | 1997-04-28 | Stabilization circuits for multiple digital bits |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE235094T1 true ATE235094T1 (de) | 2003-04-15 |
Family
ID=24567961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT97922523T ATE235094T1 (de) | 1996-04-30 | 1997-04-28 | Stabilisierkreise für mehrere digitale bits |
Country Status (9)
Country | Link |
---|---|
US (2) | US5815439A (de) |
EP (1) | EP0896763B1 (de) |
JP (1) | JP3706146B2 (de) |
KR (1) | KR100522561B1 (de) |
CN (1) | CN1126256C (de) |
AT (1) | ATE235094T1 (de) |
DE (1) | DE69719968T2 (de) |
TW (1) | TW345660B (de) |
WO (1) | WO1997041640A1 (de) |
Families Citing this family (115)
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US6781883B1 (en) * | 1997-03-20 | 2004-08-24 | Altera Corporation | Apparatus and method for margin testing single polysilicon EEPROM cells |
JPH1139886A (ja) * | 1997-07-14 | 1999-02-12 | Rohm Co Ltd | 半導体メモリ |
KR100292625B1 (ko) * | 1998-06-29 | 2001-07-12 | 박종섭 | 고속인터페이스장치 |
US6282145B1 (en) * | 1999-01-14 | 2001-08-28 | Silicon Storage Technology, Inc. | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
US6166962A (en) * | 1999-06-24 | 2000-12-26 | Amic Technology, Inc. | Circuit and method for conditioning flash memory array |
US6198662B1 (en) | 1999-06-24 | 2001-03-06 | Amic Technology, Inc. | Circuit and method for pre-erasing/erasing flash memory array |
US6211698B1 (en) * | 1999-06-29 | 2001-04-03 | Hyundai Electronics Industries Co., Ltd. | High speed interface apparatus |
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KR20010005001A (ko) | 1999-06-30 | 2001-01-15 | 김영환 | 플래쉬 메모리 셀의 제조 방법 |
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1996
- 1996-04-30 US US08/640,367 patent/US5815439A/en not_active Expired - Lifetime
-
1997
- 1997-04-28 EP EP97922523A patent/EP0896763B1/de not_active Expired - Lifetime
- 1997-04-28 CN CN97194257A patent/CN1126256C/zh not_active Expired - Fee Related
- 1997-04-28 KR KR1019980708749A patent/KR100522561B1/ko not_active IP Right Cessation
- 1997-04-28 WO PCT/US1997/007152 patent/WO1997041640A1/en active IP Right Grant
- 1997-04-28 AT AT97922523T patent/ATE235094T1/de not_active IP Right Cessation
- 1997-04-28 DE DE69719968T patent/DE69719968T2/de not_active Expired - Fee Related
- 1997-04-28 JP JP53914497A patent/JP3706146B2/ja not_active Expired - Lifetime
- 1997-04-29 TW TW086105888A patent/TW345660B/zh not_active IP Right Cessation
-
1998
- 1998-04-02 US US09/054,370 patent/US5901089A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100522561B1 (ko) | 2006-01-27 |
CN1126256C (zh) | 2003-10-29 |
TW345660B (en) | 1998-11-21 |
JP3706146B2 (ja) | 2005-10-12 |
JP2001508218A (ja) | 2001-06-19 |
KR20000065145A (ko) | 2000-11-06 |
DE69719968T2 (de) | 2004-01-08 |
DE69719968D1 (de) | 2003-04-24 |
US5815439A (en) | 1998-09-29 |
EP0896763A1 (de) | 1999-02-17 |
US5901089A (en) | 1999-05-04 |
WO1997041640A1 (en) | 1997-11-06 |
EP0896763A4 (de) | 2000-08-16 |
EP0896763B1 (de) | 2003-03-19 |
CN1268261A (zh) | 2000-09-27 |
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