AT324426B - Verfahren zum herstellen eines pnp-silizium-transistors - Google Patents

Verfahren zum herstellen eines pnp-silizium-transistors

Info

Publication number
AT324426B
AT324426B AT37971A AT37971A AT324426B AT 324426 B AT324426 B AT 324426B AT 37971 A AT37971 A AT 37971A AT 37971 A AT37971 A AT 37971A AT 324426 B AT324426 B AT 324426B
Authority
AT
Austria
Prior art keywords
manufacturing
silicon transistor
pnp silicon
pnp
transistor
Prior art date
Application number
AT37971A
Other languages
German (de)
English (en)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of AT324426B publication Critical patent/AT324426B/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/928Front and rear surface processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
AT37971A 1970-02-23 1971-01-18 Verfahren zum herstellen eines pnp-silizium-transistors AT324426B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702008319 DE2008319A1 (de) 1970-02-23 1970-02-23 Verfahren zum Herstellen eines pnp Silicium Transistors

Publications (1)

Publication Number Publication Date
AT324426B true AT324426B (de) 1975-08-25

Family

ID=5763100

Family Applications (1)

Application Number Title Priority Date Filing Date
AT37971A AT324426B (de) 1970-02-23 1971-01-18 Verfahren zum herstellen eines pnp-silizium-transistors

Country Status (8)

Country Link
US (1) US3791884A (enExample)
AT (1) AT324426B (enExample)
CH (1) CH518007A (enExample)
DE (1) DE2008319A1 (enExample)
FR (1) FR2081028A1 (enExample)
GB (1) GB1316712A (enExample)
NL (1) NL7100179A (enExample)
SE (1) SE356847B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4416051A (en) * 1979-01-22 1983-11-22 Westinghouse Electric Corp. Restoration of high infrared sensitivity in extrinsic silicon detectors
US4233093A (en) * 1979-04-12 1980-11-11 Pel Chow Process for the manufacture of PNP transistors high power
EP0229180B1 (en) * 1985-06-17 1992-01-22 Sony Corporation Process for manufacturing semiconductor devices
US5789308A (en) * 1995-06-06 1998-08-04 Advanced Micro Devices, Inc. Manufacturing method for wafer slice starting material to optimize extrinsic gettering during semiconductor fabrication

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3418181A (en) * 1965-10-20 1968-12-24 Motorola Inc Method of forming a semiconductor by masking and diffusing
GB1209914A (en) * 1967-03-29 1970-10-21 Marconi Co Ltd Improvements in or relating to semi-conductor devices
US3669768A (en) * 1969-12-04 1972-06-13 Bell Telephone Labor Inc Fabrication process for light sensitive silicon diode array target

Also Published As

Publication number Publication date
DE2008319A1 (de) 1971-09-09
FR2081028A1 (enExample) 1971-11-26
CH518007A (de) 1972-01-15
SE356847B (enExample) 1973-06-04
US3791884A (en) 1974-02-12
NL7100179A (enExample) 1971-08-25
GB1316712A (en) 1973-05-16

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee