CH522291A - Verfahren zur Herstellung eines Halbleiterbauelements - Google Patents
Verfahren zur Herstellung eines HalbleiterbauelementsInfo
- Publication number
- CH522291A CH522291A CH511071A CH511071A CH522291A CH 522291 A CH522291 A CH 522291A CH 511071 A CH511071 A CH 511071A CH 511071 A CH511071 A CH 511071A CH 522291 A CH522291 A CH 522291A
- Authority
- CH
- Switzerland
- Prior art keywords
- manufacturing
- semiconductor component
- semiconductor
- component
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/113—Nitrides of boron or aluminum or gallium
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Weting (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2020531A DE2020531C2 (de) | 1970-04-27 | 1970-04-27 | Verfahren zur Herstellung von Silizium-Höchstfrequenz-Planartransistoren |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH522291A true CH522291A (de) | 1972-06-15 |
Family
ID=5769521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH511071A CH522291A (de) | 1970-04-27 | 1971-04-07 | Verfahren zur Herstellung eines Halbleiterbauelements |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3798080A (de) |
| JP (1) | JPS5652444B1 (de) |
| CA (1) | CA918307A (de) |
| CH (1) | CH522291A (de) |
| DE (1) | DE2020531C2 (de) |
| FR (1) | FR2086373B1 (de) |
| GB (1) | GB1308764A (de) |
| NL (1) | NL7104800A (de) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3977920A (en) * | 1970-10-30 | 1976-08-31 | Hitachi, Ltd. | Method of fabricating semiconductor device using at least two sorts of insulating films different from each other |
| US3860466A (en) * | 1971-10-22 | 1975-01-14 | Texas Instruments Inc | Nitride composed masking for integrated circuits |
| JPS6028397B2 (ja) * | 1978-10-26 | 1985-07-04 | 株式会社東芝 | 半導体装置の製造方法 |
| US4402128A (en) * | 1981-07-20 | 1983-09-06 | Rca Corporation | Method of forming closely spaced lines or contacts in semiconductor devices |
| JPS6192150U (de) * | 1984-11-22 | 1986-06-14 | ||
| JP6900727B2 (ja) | 2017-03-28 | 2021-07-07 | 横河電機株式会社 | エンジニアリング支援システム、エンジニアリング支援方法、クライアント装置、及びクライアントプログラム |
| JP6897452B2 (ja) | 2017-09-22 | 2021-06-30 | 横河電機株式会社 | 情報収集システム |
| JP2019057196A (ja) | 2017-09-22 | 2019-04-11 | 横河電機株式会社 | 情報収集装置、情報収集方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3477886A (en) * | 1964-12-07 | 1969-11-11 | Motorola Inc | Controlled diffusions in semiconductive materials |
| US3597667A (en) * | 1966-03-01 | 1971-08-03 | Gen Electric | Silicon oxide-silicon nitride coatings for semiconductor devices |
| DE158928C (de) * | 1966-09-26 | |||
| DE1614435B2 (de) * | 1967-02-23 | 1979-05-23 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von aus Germanium bestehenden, doppeldiffundierten Halbleiteranordnungen |
| US3475234A (en) * | 1967-03-27 | 1969-10-28 | Bell Telephone Labor Inc | Method for making mis structures |
| NL6807952A (de) * | 1967-07-06 | 1969-01-08 | ||
| FR2020020B1 (de) * | 1968-10-07 | 1974-09-20 | Ibm | |
| US3615940A (en) * | 1969-03-24 | 1971-10-26 | Motorola Inc | Method of forming a silicon nitride diffusion mask |
-
1970
- 1970-04-27 DE DE2020531A patent/DE2020531C2/de not_active Expired
-
1971
- 1971-04-07 CH CH511071A patent/CH522291A/de not_active IP Right Cessation
- 1971-04-08 NL NL7104800A patent/NL7104800A/xx unknown
- 1971-04-19 FR FR7113691A patent/FR2086373B1/fr not_active Expired
- 1971-04-22 US US00136341A patent/US3798080A/en not_active Expired - Lifetime
- 1971-04-23 GB GB1095171*[A patent/GB1308764A/en not_active Expired
- 1971-04-27 CA CA111441A patent/CA918307A/en not_active Expired
- 1971-04-27 JP JP2788071A patent/JPS5652444B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2020531C2 (de) | 1982-10-21 |
| US3798080A (en) | 1974-03-19 |
| JPS5652444B1 (de) | 1981-12-12 |
| GB1308764A (en) | 1973-03-07 |
| FR2086373B1 (de) | 1977-08-05 |
| NL7104800A (de) | 1971-10-29 |
| FR2086373A1 (de) | 1971-12-31 |
| DE2020531A1 (de) | 1971-11-18 |
| CA918307A (en) | 1973-01-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |