AR007853A1 - Metodo de conexionado electrico, de un circuito integrado a por lo menos un conductor electrico en un sustrato flexible y rotulo de identificacion de radiofrecuencia - Google Patents

Metodo de conexionado electrico, de un circuito integrado a por lo menos un conductor electrico en un sustrato flexible y rotulo de identificacion de radiofrecuencia

Info

Publication number
AR007853A1
AR007853A1 ARP970103099A AR007853A1 AR 007853 A1 AR007853 A1 AR 007853A1 AR P970103099 A ARP970103099 A AR P970103099A AR 007853 A1 AR007853 A1 AR 007853A1
Authority
AR
Argentina
Prior art keywords
integrated circuit
flexible substrate
configuration
connection
electrical conductor
Prior art date
Application number
Other languages
English (en)
Original Assignee
Checkpoint Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Checkpoint Systems Inc filed Critical Checkpoint Systems Inc
Publication of AR007853A1 publication Critical patent/AR007853A1/es

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Classifications

    • H—ELECTRICITY
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • G06K19/0726—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs the arrangement including a circuit for tuning the resonance frequency of an antenna on the record carrier
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    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
  • Burglar Alarm Systems (AREA)

Abstract

Un método de conexionado eléctrico de un circuito integrado a por lo menos un conector eléctrico en un sustrato flexible y un rótulo de identificación deradio frecuencia. Un sustrato dieléctrico flexible tiene un área de vinculación de circuitointe grado y por lo menos un circuito resonante formado sobre elmismo. El circuito resonante está formado con una primer configuración conductora dispuesta sobre una primer superficie principal del sustratoflexible y una segundaconfiguración con ductora dispuesta sobre una segunda supeficie principal opuesta del sustrato flexible. La primer configuraciónconductora es conectada eléctricamente a la segunda configuración conductora de modo que la primer configuraciónconductora y la segunda configuración formenun inductor y un capacitor, funcionando el inductor también como una antena. El área de vinculación de circuito integrado del sustrato flexible se limpia y elsustrato flexible se fija en una posición fijaen un plenum para evitar el sustancial desplazamiento del mismo. El circuito integrado se fija al área devinculación del circuito integrado del sustrato flexible para minimizar el desplazamiento del circuito integrado en relación alsustrato flexible. Elconexionad o por medio de conductores del circuito integrado a por lo menos un conductor eléctrico del circuito resonante se efectúa para conectareléctricamente el circuito integrado a por lo menos un conductor eléctrico. Unacobertura protectora se alica sob re el circuito integrado y la conexión deconductores para proteger la conexión de conductores de deterioros o fuerzas externas.
ARP970103099 1996-07-22 1997-07-11 Metodo de conexionado electrico, de un circuito integrado a por lo menos un conductor electrico en un sustrato flexible y rotulo de identificacion de radiofrecuencia AR007853A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/681,195 US5708419A (en) 1996-07-22 1996-07-22 Method of wire bonding an integrated circuit to an ultraflexible substrate

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AR007853A1 true AR007853A1 (es) 1999-11-24

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Country Status (15)

Country Link
US (1) US5708419A (es)
EP (1) EP0821406B1 (es)
JP (2) JP4290233B2 (es)
KR (1) KR100543349B1 (es)
CN (1) CN1108634C (es)
AR (1) AR007853A1 (es)
AT (1) ATE375004T1 (es)
AU (1) AU715326B2 (es)
CA (1) CA2210833C (es)
DE (1) DE69738172T2 (es)
ES (1) ES2294790T3 (es)
IL (1) IL121087A (es)
MX (1) MX9705524A (es)
NZ (1) NZ328217A (es)
TW (1) TW342582B (es)

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CN1173735A (zh) 1998-02-18
JP2008165829A (ja) 2008-07-17
MX9705524A (es) 1998-02-28
DE69738172D1 (de) 2007-11-15
KR100543349B1 (ko) 2006-06-13
CA2210833C (en) 2008-01-29
EP0821406B1 (en) 2007-10-03
JP4342589B2 (ja) 2009-10-14
AU715326B2 (en) 2000-01-20
CN1108634C (zh) 2003-05-14
JPH1084075A (ja) 1998-03-31
AU2491597A (en) 1998-01-29
EP0821406A3 (en) 2000-03-22
IL121087A (en) 2000-07-26
JP4290233B2 (ja) 2009-07-01
TW342582B (en) 1998-10-11
CA2210833A1 (en) 1998-01-22
KR980012391A (ko) 1998-04-30
ATE375004T1 (de) 2007-10-15
US5708419A (en) 1998-01-13
NZ328217A (en) 1998-03-25
DE69738172T2 (de) 2008-07-10
ES2294790T3 (es) 2008-04-01
IL121087A0 (en) 1997-11-20
EP0821406A2 (en) 1998-01-28

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