Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Definitions

• This disclosure relates to a bonded substrate, a method for manufacturing a bonded substrate, and a method for manufacturing a semiconductor device.
• This disclosure has been made in consideration of the above-mentioned problems, and aims to provide technology that can prevent moisture from entering the gap between the edges of two substrates.
• the surface roughness of the deposit is greater than the surface roughness of at least one of the upper surface of the upper substrate and the lower surface of the lower substrate. This configuration makes it possible to prevent moisture from penetrating the gap between the ends of the two substrates.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a first embodiment.
• 3 is a flowchart showing a method for manufacturing the bonded substrate and the semiconductor device according to the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a first modified example of the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a first modified example of the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a second modification of the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a second modification of the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a second modification of the first embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a second modification of the first embodiment.
• FIG. 11 is a cross-sectional view showing a configuration of a bonded substrate according to a third modification of the first embodiment.
• FIG. 11 is a cross-sectional view showing a configuration of a bonded substrate according to a third modification of the first embodiment.
• FIG. 10 is a cross-sectional view showing the configuration of a bonded substrate according to a second embodiment.
• 10 is a flowchart showing a method for manufacturing a bonded substrate and a semiconductor device according to a second embodiment.
• FIG. 10 is a cross-sectional view showing a configuration of a bonded substrate according to a modified example of the second embodiment.
• FIG. 10 is a cross-sectional view showing the configuration of a bonded substrate according to a third embodiment.
• FIG. 11 is a plan view showing the configuration of a bonded substrate according to a third embodiment.
• FIG. 11 is a cross-sectional view showing a configuration of a bonded substrate according to a modified example of the third embodiment.
• FIG. 11 is a cross-sectional view showing a configuration of a bonded substrate according to a modified example of the third embodiment.
• First Embodiment 1 is a cross-sectional view showing the structure of a bonded substrate according to the present embodiment 1.
• the bonded substrate of FIG. 1 is a cross-sectional view showing the structure of a bonded substrate according to the present embodiment 1. The bonded substrate of FIG.
• the upper substrate 1 has a first end portion 1a and an upper surface 1b, and the first end portion 1a has a first upper surface 1c, a first end surface 1d, and a first lower surface 1e.
• the upper surface 1b and the first upper surface 1c are distinguished, but the upper surface 1b may also include the first upper surface 1c.
• the first lower surface 1e is inclined toward the center of the first end portion 1a
• the first upper surface 1c is inclined toward the center of the first end portion 1a.
• the lower substrate 2 has a second end portion 2a and a lower surface 2b, and the second end portion 2a has a second upper surface 2c, a second end surface 2d, and a second lower surface 2e.
• the lower surface 2b and the second lower surface 2e are distinguished, but the lower surface 2b may include the second lower surface 2e.
• the second lower surface 2e is inclined toward the center of the second end portion 2a, and the second upper surface 2c is not inclined toward the center of the second end portion 2a.
• the upper substrate 1 and the lower substrate 2 are joined together with a gap 4 between the first end 1a and the second end 2a.
• the gap 4 is provided between the first lower surface 1e of the first end 1a and the second upper surface 2c of the second end 2a.
• each of the upper substrate 1 and the lower substrate 2 is, for example, 50 ⁇ m or more and 500 ⁇ m or less.
• At least one of the upper substrate 1 and the lower substrate 2 is made of, for example, single-crystal silicon carbide (SiC).
• SiC single-crystal silicon carbide
• at least one of the upper substrate 1 and the lower substrate 2 may be made of a wide bandgap semiconductor other than silicon carbide, such as gallium nitride (GaN), gallium oxide (Ga 2 O 3 ), or diamond.
• substrates using wide bandgap semiconductors are expensive, and using a single thin substrate in semiconductor manufacturing can result in mechanical deformation, damage, and other defects, which can have a significant impact on the production cost of semiconductor devices.
• the number of substrates using wide bandgap semiconductors that can be obtained is limited depending on the required specifications, and as a result, the production volume of semiconductor devices may fall short of the plan.
• the bonding technology disclosed herein it is possible to appropriately set the thickness of the bonded substrate while preventing moisture from entering the gap 4, thereby reducing the production cost of semiconductor devices using wide bandgap semiconductor substrates and ensuring production volume.
• Semiconductor devices formed by performing semiconductor manufacturing processes on a junction substrate of wide bandgap semiconductors enable stable operation at high temperatures and high voltages, and faster switching speeds.
• Semiconductor devices include, for example, at least one of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), RC-IGBTs (Reverse Conducting IGBTs), SBDs (Schottky Barrier Diodes), and PNDs (PN junction diodes).
• MOSFETs Metal Oxide Semiconductor Field Effect Transistors
• IGBTs Insulated Gate Bipolar Transistors
• RC-IGBTs Reverse Conducting IGBTs
• SBDs Schottky Barrier Diodes
• PNDs PN junction diodes
• the deposit 3 is connected to the first end 1a and the second end 2a.
• the deposit 3 includes a first connection portion 3a connecting the first end surface 1d and the second end surface 2d, and a second connection portion 3b connecting the first lower surface 1e and the second upper surface 2c.
• the second connection portion 3b in Figure 1 is provided except for the innermost portion of the gap 4.
• the surface roughness of deposit 3 is greater than the surface roughness of at least one of the upper surface 1b of upper substrate 1 and the lower surface 2b of lower substrate 2.
• the surface roughness (Ra) of deposit 3 only needs to be greater than that of a mirror-polished surface, and can be, for example, Ra ⁇ 2 nm.
• the surface roughness of the deposit 3 is greater than the surface roughness of at least one of the upper surface 1b of the upper substrate 1 and the lower surface 2b of the lower substrate 2, thereby making the water repellency of the deposit 3 higher than that of at least one of these.
• the surface roughness of the deposit 3 may also be greater than the surface roughness of at least one of the first upper surface 1c and the second lower surface 2e, thereby making the water repellency of the deposit 3 higher than that of at least one of these.
• the surface roughness of the deposit 3 may also be greater than the surface roughness of at least one of the first end surface 1d and the second end surface 2d, thereby making the water repellency of the deposit 3 higher than that of at least one of these.
• the surface roughness of the first end 1a or the second end 2a, which is the periphery of the deposit 3 is greater than the surface roughness of at least one of the upper surface 1b of the upper substrate 1 and the lower surface 2b of the lower substrate 2, adhesion of moisture to the periphery of the deposit 3 can be suppressed. As a result, even if there are small moisture infiltration paths, such as micropores, in the deposit 3, moisture adhering to or remaining around the periphery of the deposit 3 can be prevented from infiltrating into the gap 4 via the moisture infiltration paths in the deposit 3.
• a predetermined semiconductor manufacturing process is performed on the upper substrate 1 to form a semiconductor device.
• the predetermined semiconductor manufacturing process includes, for example, a process for forming impurity regions and a process for forming various layers (various films) using epitaxial growth, etc.
• step S5 after the semiconductor manufacturing process of step S4, a portion is separated from the upper substrate 1 and the lower substrate 2.
• the separated portion may be part of the upper substrate 1 and all of the lower substrate 2, or at least part of the lower substrate 2, and will be used as the upper substrate 1 or lower substrate 2 in the next manufacturing process.
• Laser slicing technology for example, is used for the separation.
• the deposit 3 is formed on the first end 1a and the second end 2a using resist in step S3, but this is not limited to this.
• the deposit 3 on the upper surface 1b of the upper substrate 1 and the lower surface 2b of the lower substrate 2 may be removed by polishing.
• the bonded substrate according to the first embodiment as described above includes a deposit 3 connected to the first end 1 a and the second end 2 a.
• the surface roughness of the deposit 3 is greater than the surface roughness of at least one of the upper surface 1 b of the upper substrate 1 and the lower surface 2 b of the lower substrate 2, thereby making the water repellency of the deposit 3 higher than that of at least one of the upper surface 1 b of the upper substrate 1 and the lower surface 2 b of the lower substrate 2.
• This configuration can prevent moisture, which is a foreign substance, from entering the gap 4 between the first end 1 a and the second end 2 a, thereby improving the quality of the semiconductor device.
• the deposit 3 includes a first connection portion 3a connecting the first end surface 1d and the second end surface 2d, and a second connection portion 3b connecting the first lower surface 1e and the second upper surface 2c.
• This configuration effectively prevents moisture from penetrating the gap 4, compared to a configuration in which the deposit 3 includes only one of the first connection portion 3a and the second connection portion 3b.
• the second connection portion 3b is provided excluding the innermost portion of the gap 4, i.e., excluding the portion that is relatively difficult to fill in practically, so a bonded substrate can be realized using a realistic deposit 3.
• portions are separated from the upper substrate 1 and the lower substrate 2 after the semiconductor manufacturing process.
• the separated portions can be reused as the upper substrate 1 or the lower substrate 2 in the next manufacturing process.
• a semiconductor device is manufactured by separating part or all of the upper substrate 1 on which semiconductor elements have been formed through the semiconductor manufacturing process, and then collecting multiple substrates whose remaining portions have been flattened by polishing or the like for reuse. These substrates can then be bonded together to form the deposit 3, allowing the semiconductor manufacturing process to begin again.
• substrate utilization efficiency is improved and production costs can be reduced. This is particularly effective in reducing production costs when using expensive substrates such as wide-gap semiconductor substrates.
• the separation and reuse of substrates may be repeated multiple times.
• ⁇ Modification 1> 3 and 4 are cross-sectional views showing variations of the shape of the deposit 3 in first to fourteenth examples.
• the shape of the deposit 3 in the first example is the same as the shape of the deposit 3 in Fig. 1. Note that some reference numerals are omitted in Fig. 3 and Fig. 4.
• the deposit 3 in Examples 1 to 7 includes a first connection portion 3a connecting the first end surface 1d and the second end surface 2d, and a second connection portion 3b connecting the first lower surface 1e and the second upper surface 2c.
• the right side surface of the first connection portion 3a in Figure 3 is flat.
• the right side surface of the first connection portion 3a in Figure 3 is a curved surface that bulges in the center.
• a recess corresponding to the gap 4 is provided on the right side surface of the first connection portion 3a in Figure 3.
• the gap 4 in the first and second examples is completely or substantially filled by the second connection portion 3b.
• the first connection portion 3a in the first example is connected to the corner 2f between the second upper surface 2c and the second end surface 2d.
• the first connection portion 3a in the first example is connected to the corner 1f between the first lower surface 1e and the first end surface 1d.
• the deposits 3 in Examples 8 to 11 of Figure 4 include the first connection portion 3a but not the second connection portion 3b.
• the second connection portion 3b has been omitted from Examples 1, 2, 6, and 7.
• the deposits 3 in Examples 12 to 14 do not include a first connection portion 3a but include a second connection portion 3b.
• the gap 4 is completely or substantially filled with the second connection portion 3b.
• the second connection portion 3b is provided except for the innermost portion of the gap 4.
• the second connection portion 3b is provided only in the innermost portion of the gap 4.
• the shape of the deposit 3 is not limited to the above.
• ⁇ Modification 2> 5 to 7 are cross-sectional views showing 21st to 38th examples of variations in the shapes of the upper substrate 1 and the lower substrate 2. Note that some reference numerals are omitted in FIGS.
• the first lower surface 1e is inclined toward the center of the first end 1a, and the first upper surface 1c is inclined toward the center of the first end 1a.
• the second lower surface 2e is inclined toward the center of the second end 2a, and the second upper surface 2c is not inclined toward the center of the second end 2a.
• the shape of the lower substrate 2 in Examples 21 to 26 of FIG. 5 is similar to the shape of the lower substrate 2 in FIG. 1, but the shape of the upper substrate 1 in Examples 21 to 26 of FIG. 5 is different from the shape of the upper substrate 1 in FIG. 1.
• the first lower surface 1e is inclined toward the center of the first end 1a, and the first upper surface 1c is not inclined toward the center of the first end 1a.
• the shapes of the deposits 3 in Examples 21, 22, 23, 24, 25, and 26 of FIG. 5 are similar to the shapes of the deposits 3 in Examples 1, 4, 8, 12, 13, and 14 of FIGS. 3 and 4.
• the shape of the upper substrate 1 in Examples 27 to 32 of FIG. 6 is similar to the shape of the upper substrate 1 in FIG. 1, but the shape of the lower substrate 2 in Examples 27 to 32 of FIG. 6 is different from the shape of the lower substrate 2 in FIG. 1.
• the second lower surface 2e is inclined toward the center of the second end 2a
• the second upper surface 2c is inclined toward the center of the second end 2a.
• the shape of the deposit 3 in Examples 27 to 32 of FIG. 6 is similar to the shape of the deposit 3 in Examples 21 to 26 of FIG. 5.
• the shape of the upper substrate 1 in Examples 33 to 38 of FIG. 7 is similar to the shape of the upper substrate 1 in Examples 21 to 26 of FIG. 5, and the shape of the lower substrate 2 in Examples 33 to 38 of FIG. 6 is similar to the shape of the lower substrate 2 in Examples 27 to 32.
• the shape of the deposit 3 in Examples 33 to 38 of FIG. 7 is similar to the shape of the deposit 3 in Examples 21 to 26 of FIG. 5.
• the same effects as in embodiment 1 can be obtained.
• substrates with a specific cross-sectional shape substrates with a variety of cross-sectional shapes can be used for the upper substrate 1 and lower substrate 2, thereby improving the productivity of bonded substrates.
• the shapes of the upper substrate 1, lower substrate 2, and deposit 3 are not limited to those described above.
• ⁇ Modification 3> 8 and 9 are cross-sectional views showing variations of the shapes of the upper substrate 1 and the lower substrate 2 in examples 41 to 54. Note that some reference numerals are omitted in FIGS.
• the shape of the upper substrate 1 in Examples 41 to 54 of Figures 8 and 9 is similar to that of the upper substrate 1 in Figure 1, but the shape of the lower substrate 2 in Examples 41 to 54 of Figures 8 and 9 is different from that of the lower substrate 2 in Figure 1.
• a step 2g is provided on the second end surface 2d on the gap 4 side of the second end 2a.
• the shape of the deposit 3 in Examples 41 to 54 is similar to that of the deposit 3 in Examples 1 to 14.
• ⁇ Second Embodiment> 10 is a cross-sectional view showing the structure of a bonded substrate according to the second embodiment.
• the second embodiment has the same structure as that shown in FIG. 1 except that an epitaxial growth layer 5 is provided.

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• 2024
  • 2024-03-14 JP JP2025518326A patent/JP7728488B1/ja active Active
  • 2024-03-14 WO PCT/JP2024/009922 patent/WO2025191767A1/ja active Pending

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