WO2025169634A1 - フレキシブル多層回路基板 - Google Patents
フレキシブル多層回路基板Info
- Publication number
- WO2025169634A1 WO2025169634A1 PCT/JP2024/045929 JP2024045929W WO2025169634A1 WO 2025169634 A1 WO2025169634 A1 WO 2025169634A1 JP 2024045929 W JP2024045929 W JP 2024045929W WO 2025169634 A1 WO2025169634 A1 WO 2025169634A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulating layer
- porous insulating
- circuit board
- layer
- precursor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
Definitions
- the present invention relates to a flexible multilayer circuit board.
- a wired circuit board As a flexible circuit board, for example, a wired circuit board has been proposed that includes a porous insulating layer and a conductor layer in that order toward one side in the thickness direction, with the conductor layer having a first wiring portion and a second wiring portion that is thicker than the first wiring portion (see Patent Document 1).
- a laminate of a wiring portion precursor 54A and a first porous insulating layer precursor 52A is prepared (FIG. 11A).
- the first porous insulating layer precursor 52A has pores P.
- the wiring portion precursor 54A in the prepared laminate is selectively etched to form the wiring portion 54, thereby obtaining a first circuit board precursor 70A (FIG. 11B).
- a second circuit board precursor 70B is prepared (FIG. 11C) including a second conductor layer 53 and a second porous insulating layer precursor 52B arranged on one thickness-wise side of the second conductor layer 53.
- the second porous insulating layer precursor 52B has holes P.
- the first circuit board precursor 70A and the second circuit board precursor 70B are arranged so that the wiring portion 54 and the second porous insulating layer precursor 52B face each other (FIG. 11D). Then, the first circuit board precursor 70A and the second circuit board precursor 70B are bonded together, whereby the first porous insulating layer precursor 52A and the second porous insulating layer precursor 52B are integrated to form the porous insulating layer 52 (FIG. 11E). Next, the first conductor layer 51 is attached to one side of the porous insulating layer 52 in the thickness direction (FIG. 11F), thereby obtaining the flexible multilayer circuit board 60 shown in FIG.
- the resulting porous insulating layer 52 is deformed by pressure.
- the deformation of the porous insulating layer 52 changes the insulating properties (e.g., dielectric properties) of the porous insulating layer 52, which may result in the electrical properties of the wiring portion 54 deviating from the desired electrical properties.
- the present invention aims to provide a flexible multilayer circuit board that can suppress fluctuations in the electrical characteristics of the wiring section.
- the present inventors have conducted extensive research to solve the above problems, and as a result have found that the above problems can be solved, and have completed the present invention having the following gist. That is, the present invention includes the following.
- a flexible multilayer circuit board comprising: the insulating layer has a porous insulating layer and a non-porous insulating layer, the wiring portion is embedded in the porous insulating layer; Flexible multilayer circuit board.
- the insulating layer further has a second non-porous insulating layer, the non-porous insulating layer is disposed on one side of the porous insulating layer in a thickness direction, the second porous insulating layer is disposed on the other side of the porous insulating layer in the thickness direction;
- FIG. 5 is a schematic diagram of another embodiment of a flexible multilayer circuit board.
- FIG. 6 is a schematic diagram of another embodiment of a flexible multilayer circuit board.
- FIG. 7 is a schematic diagram of another embodiment of a flexible multilayer circuit board.
- FIG. 8A is a perspective view of an example of a flexible multilayer circuit board.
- Figure 8B is a cross-sectional view taken along line A-A' in Figure 8A.
- FIG. 9A is a perspective view of an example of a flexible multilayer circuit board.
- Figure 9B is a cross-sectional view taken along line A-A' in Figure 9A.
- FIG. 10 is a schematic diagram of an example of a conventional flexible multilayer circuit board.
- FIG. 10 is a schematic diagram of an example of a conventional flexible multilayer circuit board.
- the material of the first conductor layer and the second conductor layer is not particularly limited and may be, for example, a metal material, such as copper, nickel, gold, solder, or an alloy of two or more of these.
- the materials of the first conductor layer and the second conductor layer may be the same or different.
- the thickness of the first conductor layer and the second conductor layer is not particularly limited and is, for example, 3 ⁇ m or more, preferably 5 ⁇ m or more, and for example, 50 ⁇ m or less, preferably 30 ⁇ m or less.
- the thickness of the first conductor layer and the second conductor layer may be the same or different.
- the term "thickness" refers to the length of the flexible multilayer circuit board in the thickness direction.
- the thickness direction of the flexible multilayer circuit board refers to, for example, a direction perpendicular to the surface direction of the first conductor layer and the second conductor layer.
- the material of the wiring portion is not particularly limited, and examples thereof include metal materials such as copper, nickel, gold, solder, and alloys of two or more of these.
- the thickness of the wiring portion is not particularly limited and is, for example, 3 ⁇ m or more, preferably 5 ⁇ m or more, and for example, 50 ⁇ m or less, preferably 30 ⁇ m or less. Note that, since the wiring portion is embedded in the porous insulating layer, the thickness of the wiring portion is usually thinner than the thickness of the porous insulating layer.
- the wiring portion is embedded in the porous insulating layer, but the wiring portion may have a non-porous insulating film covering its surface.
- Examples of materials that can be used to form the non-porous insulating film include those listed below in the description of materials that can be used to form the insulating layer.
- the insulating layer contains, for example, a resin.
- resins include polycarbonate resins, polyimide resins, fluorinated polyimide resins, epoxy resins, phenolic resins, urea resins, melamine resins, diallyl phthalate resins, silicone resins, thermosetting urethane resins, fluororesins, cycloolefin polymers, and liquid crystal polymers. From the viewpoints of high insulation properties, high heat resistance, and high mechanical strength, polyimide resins, cycloolefin polymers, and liquid crystal polymers are preferred.
- the porous insulating layer (including the second porous insulating layer and the third porous insulating layer described below) is porous and has a large number of minute pores (air pores) as pores.
- Examples of the cell structure of the porous insulating layer include a closed cell structure and an open cell structure.
- a porous insulating layer with an open-cell structure is more susceptible to deformation due to pressure during the production of a flexible multilayer circuit board than a porous insulating layer with a closed-cell structure. Therefore, since the flexible multilayer circuit board of the present invention has a non-porous insulating layer, deformation of the porous insulating layer due to pressure can be further suppressed when the porous insulating layer has an open-cell structure.
- the porous insulating layer has an open-cell structure.
- the closed-cell structure refers to a structure in which the resin portions between the pores do not have holes that connect the pores, and gas does not flow between adjacent pores
- the open-cell structure refers to a structure in which adjacent pores are connected by holes, and gas can flow between the pores.
- the thickness of the porous insulating layer is not particularly limited, but is, for example, 5 ⁇ m or more, preferably 10 ⁇ m or more, and, for example, 150 ⁇ m or less, preferably 100 ⁇ m or less.
- the dielectric loss tangent of the porous insulating layer at a frequency of 60 GHz is, for example, 0.006 or less, and is, for example, greater than 0.
- the dielectric loss tangent of the porous insulating layer is measured using a resonator method at a frequency of 60 GHz.
- the nonporous insulating layers are not porous, and therefore have a porosity of approximately 0%. Furthermore, the dielectric constant of the non-porous insulating layer coincides with the dielectric constant determined from the material that constitutes the non-porous insulating layer. For example, when the non-porous insulating layer is made of only resin, the dielectric constant of the non-porous insulating layer matches the dielectric constant of the resin that makes up the non-porous insulating layer.
- the thickness of the non-porous insulating layer is not particularly limited, but is, for example, 1 ⁇ m or more, preferably 5 ⁇ m or more, and, for example, 150 ⁇ m or less, preferably 100 ⁇ m or less.
- the non-porous insulating layer and non-porous insulating film may be a skin layer.
- a skin layer is a dense film made of the same resin as the resin that constitutes the adjacent porous insulating layer or porous insulating layer precursor.
- a skin layer can be obtained, for example, by heating the porous insulating layer or porous insulating layer precursor to eliminate pores on the surface of the porous insulating layer or porous insulating layer precursor and densify the surface.
- FIG. 2A a laminate of a wiring portion precursor 5A and a porous insulating layer first precursor 2A is prepared ( FIG. 2A ). Both the wiring portion precursor 5A and the porous insulating layer first precursor 2A are layered.
- the porous insulating layer first precursor 2A has pores P.
- the porous insulating layer first precursor 2A is bonded to the porous insulating layer second precursor 2B, it is integrated with the porous insulating layer second precursor 2B to form a porous insulating layer.
- the prepared wiring portion precursor 5A of the laminate is selectively etched to form the wiring portion 5, thereby obtaining a first circuit board precursor 20A (FIG. 2B).
- a second circuit board precursor 20B and a third circuit board precursor 20C are prepared.
- the second circuit board precursor 20B includes a first conductor layer 1 and a porous insulating layer second precursor 2B arranged on one thickness-wise side of the first conductor layer 1.
- the porous insulating layer second precursor 2B has holes P.
- the third circuit board precursor 20C includes a second conductor layer 4 and a non-porous insulating layer 3 arranged on one thickness-wise side of the second conductor layer 4.
- the first circuit board precursor 20A and the second circuit board precursor 20B are then arranged so that the wiring portion 5 faces the porous insulating layer second precursor 2B. Furthermore, the second circuit board precursor 20B and the third circuit board precursor 20C are arranged so that the non-porous insulating layer 3 faces the surface of the first porous insulating layer precursor 2A opposite the wiring portion 5 ( FIG. 2C ). Then, the second circuit board precursor 20B, the first circuit board precursor 20A, and the third circuit board precursor 20C are bonded together.
- the pressure and temperature during bonding are not particularly limited.
- the first circuit board precursor 20D has a second conductor layer 4 and a non-porous insulating layer 3 disposed on one side of the second conductor layer 4 in the thickness direction.
- the second circuit board precursor 20E includes a first porous insulating layer precursor 2C and a wiring portion 5 disposed on one side in the thickness direction of the first porous insulating layer precursor 2C.
- the first porous insulating layer precursor 2C has holes P.
- circuit board precursor 20D four circuit board precursors (first circuit board precursor 20D, second circuit board precursor 20E, third circuit board precursor 20F, and fourth circuit board precursor 20G) are bonded together at one time.
- the number of circuit board precursors bonded together at one time may be two, three, or four or more.
- the porous insulating layer 2 is sandwiched between the non-porous insulating layer 3 and the second non-porous insulating layer 6.
- the porous insulating layer 2 is not in contact with the first conductor layer 1 or the second conductor layer 4.
- the porous insulating layer 2 is sandwiched between a third non-porous insulating layer 8 and a fourth non-porous insulating layer 9 .
- the porous insulating layer 2 in which the wiring portion 5 is embedded between the third non-porous insulating layer 8 and the fourth non-porous insulating layer 9 deformation of the porous insulating layer due to pressure when manufacturing a flexible multilayer circuit board can be further suppressed.
- FIGS. 8A and 8B are schematic diagrams of an example of a flexible multilayer circuit board.
- the flexible multilayer circuit board shown in Figures 8A and 8B is a stripline.
- Fig. 8A is a perspective view
- Fig. 8B is a cross-sectional view taken along line AA' of Fig. 8A.
- 8A and 8B are schematic diagrams, and therefore, for example, in Fig. 8B, the ratio between the length in the longitudinal direction and the length in the thickness direction is not accurate.
- the flexible multilayer circuit board 10 includes an insulating layer 21 , a first conductor layer 1 , a second conductor layer 4 , and a wiring portion 5 .
- the insulating layer 21 has a porous insulating layer 2 and a non-porous insulating layer 3.
- the porous insulating layer 2 has a large number of pores P.
- the insulating layer 21 is a laminate of the porous insulating layer 2 and the non-porous insulating layer 3.
- the first conductor layer 1 is disposed on one side in the thickness direction of the insulating layer 21.
- the first conductor layer 1 contacts the porous insulating layer 2 of the insulating layer 21 on one side in the thickness direction of the insulating layer 21.
- the thickness direction of the insulating layer 21 is the vertical direction on the paper surface in FIG. 9B .
- the second conductor layer 4 is disposed on the other side in the thickness direction of the insulating layer 21.
- the conductive portion 101 electrically connects the first conductor layer 1 and the second conductor layer 4.
- the first conductor layer 1, the second conductor layer 4, and the conductive portion 101 form a ground.
- a portion of the conductive portion 101 is formed simultaneously with the formation of the wiring portion 5 (the first signal line 501 and the second signal line 502), and therefore the portion of the conductive portion 101 is made of the same material as the wiring portion 5.
- the two conductive portions 101 are arranged on either side of the wiring portion 5 (first signal line 501 and second signal line 502) extending in the longitudinal direction.
- the conductive portions 101 are arranged spaced apart along the wiring portion 5 (first signal line 501 and second signal line 502).
- Flexible multilayer circuit boards are used as flexible multilayer circuit boards for high-speed transmission in electronic devices such as mobile phones, smartphones, tablet devices, and digital cameras, as they become smaller, lighter, and more functional.
- First conductor layer 2 Porous insulating layer 2A Porous insulating layer first precursor 2B Porous insulating layer second precursor 2C Porous insulating layer first precursor 2D Porous insulating layer second precursor 3 Non-porous insulating layer 4 Second conductor layer 5 Wiring portion 5A Wiring portion precursor 6 Second non-porous insulating layer 7 Second porous insulating layer 8 Third non-porous insulating layer 9 Fourth non-porous insulating layer 10 Flexible multilayer circuit board 11 Third porous insulating layer 12 Non-porous insulating film 20A Circuit board first precursor 20B Circuit board second precursor 20C Circuit board third precursor 20D Circuit board first precursor 20E Circuit board second precursor 20F Circuit board third precursor 20G Circuit board fourth precursor 21 Insulating layer 51 First conductor layer 52 Porous insulating layer 52A Porous insulating layer first precursor 52B Porous insulating layer second precursor 53 Second conductor layer 54 Wiring portion 54A Wiring portion precursor 60 Flexible multilayer circuit board 70A First circuit board precursor 70B Second circuit board precursor 101 Conduct
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2025543846A JPWO2025169634A1 (https=) | 2024-02-07 | 2024-12-25 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2024017336 | 2024-02-07 | ||
| JP2024-017336 | 2024-02-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2025169634A1 true WO2025169634A1 (ja) | 2025-08-14 |
Family
ID=96699773
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2024/045929 Pending WO2025169634A1 (ja) | 2024-02-07 | 2024-12-25 | フレキシブル多層回路基板 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPWO2025169634A1 (https=) |
| TW (1) | TW202533646A (https=) |
| WO (1) | WO2025169634A1 (https=) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002261453A (ja) * | 2001-02-28 | 2002-09-13 | Kyocera Corp | 多層配線基板 |
| JP2007088409A (ja) * | 2005-08-23 | 2007-04-05 | Tohoku Univ | 多層回路基板及び電子機器 |
| JP2021044475A (ja) * | 2019-09-13 | 2021-03-18 | 日東電工株式会社 | 配線回路基板 |
| WO2022124038A1 (ja) * | 2020-12-09 | 2022-06-16 | 株式会社村田製作所 | 回路基板及び電子機器 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003008233A (ja) * | 2001-06-19 | 2003-01-10 | Nitto Denko Corp | 多層配線基板 |
| HK1244833B (zh) * | 2015-03-23 | 2019-11-29 | 拓自达电线株式会社 | 树脂浸渗物、复合材料和覆铜层叠体的制造方法 |
| JP7762044B2 (ja) * | 2021-05-28 | 2025-10-29 | 日東電工株式会社 | 配線回路基板およびその製造方法 |
| JPWO2022260092A1 (https=) * | 2021-06-09 | 2022-12-15 |
-
2024
- 2024-12-25 JP JP2025543846A patent/JPWO2025169634A1/ja active Pending
- 2024-12-25 WO PCT/JP2024/045929 patent/WO2025169634A1/ja active Pending
- 2024-12-27 TW TW113151111A patent/TW202533646A/zh unknown
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002261453A (ja) * | 2001-02-28 | 2002-09-13 | Kyocera Corp | 多層配線基板 |
| JP2007088409A (ja) * | 2005-08-23 | 2007-04-05 | Tohoku Univ | 多層回路基板及び電子機器 |
| JP2021044475A (ja) * | 2019-09-13 | 2021-03-18 | 日東電工株式会社 | 配線回路基板 |
| WO2022124038A1 (ja) * | 2020-12-09 | 2022-06-16 | 株式会社村田製作所 | 回路基板及び電子機器 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPWO2025169634A1 (https=) | 2025-08-14 |
| TW202533646A (zh) | 2025-08-16 |
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