WO2024108772A1 - 显示面板及显示装置 - Google Patents
显示面板及显示装置 Download PDFInfo
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- WO2024108772A1 WO2024108772A1 PCT/CN2023/075630 CN2023075630W WO2024108772A1 WO 2024108772 A1 WO2024108772 A1 WO 2024108772A1 CN 2023075630 W CN2023075630 W CN 2023075630W WO 2024108772 A1 WO2024108772 A1 WO 2024108772A1
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- 239000000463 material Substances 0.000 claims description 77
- 239000000758 substrate Substances 0.000 claims description 58
- 239000010409 thin film Substances 0.000 claims description 34
- 239000004020 conductor Substances 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 abstract description 14
- 238000000034 method Methods 0.000 abstract description 11
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 12
- 239000010408 film Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- -1 polyethylene Polymers 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 1
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 1
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000747 poly(lactic acid) Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 239000004626 polylactic acid Substances 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000004984 smart glass Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/82—Interconnections, e.g. terminals
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/549—Organic PV cells
Definitions
- the present application relates to the field of display technology, and in particular to a display panel and a display device.
- OLED Organic Light-Emitting Diode
- the back wiring method requires removing the back substrate layer of the display panel to expose the electrodes, so as to achieve the overlap of the display panel electrodes and the flexible circuit board electrodes.
- the sacrificial layer of the substrate on the side of the OLED thin-film transistor layer electrode away from the light-emitting layer is peeled off (usually using laser peeling technology or mechanical peeling), it is bound and connected to the electrode of the flexible circuit board on the back.
- the whole surface peeling process of the sacrificial layer there may be risks such as film separation between adjacent film layers in the product or damage to the array substrate layer and the light-emitting layer structure.
- the embodiments of the present application provide a display panel and a display device, which do not require mechanical peeling or laser peeling technology, and can effectively improve the narrow frame effect of the display panel and the production yield of the spliced display panel.
- An embodiment of the present application provides a display panel, including:
- a substrate comprising a first sublayer and a second sublayer which are stacked
- the thin film transistor layer arranged on a side of the first sub-layer away from the second sub-layer, the thin film transistor layer comprising a first insulating layer, a second insulating layer, and an electrode wiring layer arranged between the first insulating layer and the second insulating layer, the first insulating layer being arranged on a side of the second insulating layer close to the substrate;
- a binding terminal layer is arranged between the first sub-layer and the second sub-layer, and a first connecting hole is arranged through the first insulating layer and the first sub-layer, the first connecting hole is arranged between the binding terminal layer and the electrode wiring layer, and the electrode wiring layer is electrically connected to the binding terminal layer through the first connecting hole; a second connecting hole is arranged on the second sub-layer, and the second connecting hole exposes at least part of the binding terminal layer.
- the electrode routing layer includes multiple sub-routings
- the binding terminal layer includes multiple binding terminals arranged at intervals
- one sub-routing is connected to one binding terminal
- the number of the second connection holes is the same as the number of the binding terminals
- one second connection hole corresponds to one binding terminal setting.
- the second connecting hole includes a first opening close to one side of the binding terminal, and a second opening away from the binding terminal, the first opening has a first diameter, the second opening has a second diameter, the first diameter and the second diameter are different in size, and the inner wall of the second connecting hole has a first angle with a direction perpendicular to the substrate.
- the inner wall of the second connecting hole is a rough surface, and the roughness Ra of the inner wall of the second connecting hole ranges from 0.1 to 100.
- the inner wall of the second connecting hole includes a plurality of stepped structures extending along the axial direction of the second connecting hole, or a plurality of protrusions are arranged on the inner wall of the second connecting hole.
- the second sublayer includes a first material sublayer and a second material sublayer stacked together
- the second connecting hole includes a first subhole arranged on the first material sublayer, and a second subhole arranged on the second material sublayer
- the first material sublayer and the second material sublayer are made of different materials.
- the first material sublayer is located on a side of the second material sublayer close to the binding terminal layer, the sidewall of the first subhole forms at least a preset angle with a direction perpendicular to the substrate, and the diameter of the first subhole is greater than or equal to the diameter of the second subhole.
- the first sub-hole includes a third opening close to the binding terminal layer, and a fourth opening close to the second material sub-layer, the diameter of the third opening is a third diameter, the diameter of the fourth opening is a fourth diameter, the diameter of the first sub-hole between the third opening and the fourth opening is a fifth diameter, and the fifth diameter is greater than the third diameter, the fifth diameter is greater than the fourth diameter, and the side wall of the first sub-hole is an arc-shaped side wall.
- the display panel includes a binding area and a display area
- the binding terminal layer includes a plurality of binding terminals and a shading portion
- the plurality of binding terminals are located in the binding area
- the shading portion is located in the display area
- the thin film transistor layer includes a plurality of driving devices
- the driving device includes a channel portion
- the shading portion at least covers the channel portion.
- the display panel further includes a flexible circuit board, the second connection hole has a conductive material therein, the flexible circuit board includes a connection terminal corresponding to the binding terminal, and the connection terminal is electrically connected to the binding terminal through the conductive material in the second connection hole.
- An embodiment of the present application provides a display device, wherein the display device includes a display panel, and the display panel includes:
- a substrate comprising a first sublayer and a second sublayer which are stacked
- the thin film transistor layer arranged on a side of the first sub-layer away from the second sub-layer, the thin film transistor layer comprising a first insulating layer, a second insulating layer, and an electrode wiring layer arranged between the first insulating layer and the second insulating layer, the first insulating layer being arranged on a side of the second insulating layer close to the substrate;
- a binding terminal layer is arranged between the first sub-layer and the second sub-layer, and a first connecting hole is arranged through the first insulating layer and the first sub-layer, the first connecting hole is arranged between the binding terminal layer and the electrode wiring layer, and the electrode wiring layer is electrically connected to the binding terminal layer through the first connecting hole; a second connecting hole is arranged on the second sub-layer, and the second connecting hole exposes at least part of the binding terminal layer.
- the electrode routing layer includes multiple sub-routings
- the binding terminal layer includes multiple binding terminals arranged at intervals
- one sub-routing is connected to one binding terminal
- the number of the second connection holes is the same as the number of the binding terminals
- one second connection hole corresponds to one binding terminal setting.
- the second connecting hole includes a first opening close to one side of the binding terminal, and a second opening away from the binding terminal, the first opening has a first diameter, the second opening has a second diameter, the first diameter and the second diameter are different in size, and the inner wall of the second connecting hole has a first angle with a direction perpendicular to the substrate.
- the inner wall of the second connecting hole is a rough surface, and the roughness Ra of the inner wall of the second connecting hole ranges from 0.1 to 100.
- the inner wall of the second connecting hole includes a plurality of stepped structures extending along the axial direction of the second connecting hole, or a plurality of protrusions are arranged on the inner wall of the second connecting hole.
- the second sublayer includes a first material sublayer and a second material sublayer stacked together
- the second connecting hole includes a first subhole arranged on the first material sublayer, and a second subhole arranged on the second material sublayer
- the first material sublayer and the second material sublayer are made of different materials.
- the first material sublayer is located on a side of the second material sublayer close to the binding terminal layer, the sidewall of the first subhole has a second angle with the direction perpendicular to the substrate, and the diameter of the first subhole is greater than or equal to the diameter of the second subhole.
- the first sub-hole includes a third opening close to the binding terminal layer, and a fourth opening close to the second material sub-layer, the diameter of the third opening is a third diameter, the diameter of the fourth opening is a fourth diameter, the diameter of the first sub-hole between the third opening and the fourth opening is a fifth diameter, and the fifth diameter is greater than the third diameter, the fifth diameter is greater than the fourth diameter, and the side wall of the first sub-hole is an arc-shaped side wall.
- the display panel includes a binding area and a display area
- the binding terminal layer includes a plurality of binding terminals and a shading portion
- the plurality of binding terminals are located in the binding area
- the shading portion is located in the display area
- the thin film transistor layer includes a plurality of driving devices
- the driving device includes a channel portion
- the shading portion at least covers the channel portion.
- the display panel further includes a flexible circuit board, the second connection hole has a conductive material therein, the flexible circuit board includes a connection terminal corresponding to the binding terminal, and the connection terminal is electrically connected to the binding terminal through the conductive material in the second connection hole.
- the embodiment of the present application provides a display panel and a display device, wherein the display panel includes a substrate and a thin film transistor layer arranged on the substrate, a binding terminal layer is arranged between a first sub-layer and a second sub-layer, a first connecting hole is provided on a first insulating layer of the first sub-layer and the thin film transistor layer, an electrode wiring layer is electrically connected to the binding terminal layer through the first connecting hole, and a second connecting hole is provided on the second sub-layer, so that part of the binding terminal layer is exposed.
- the second connecting hole can be filled with silver paste and then electrically connected to the connecting terminal on the flexible circuit board, thereby avoiding the use of mechanical or laser stripping means to strip the insulating layer on the electrode surface of the array substrate layer during the manufacturing process, and reducing the risk of part of the film layer in the thin film transistor layer being detached due to the stress or laser of the stripping during the product production process, thereby reducing the risk of reducing the life of the light-emitting layer due to the stress of the stripping or the laser.
- FIG. 1 is a schematic diagram of a structure in which a sacrificial layer of a display panel is peeled off and bound in the prior art
- FIG2 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application.
- FIG3 is a schematic structural diagram of a substrate of a display panel provided in an embodiment of the present application.
- FIG4 is a schematic diagram of the structure in which the second connection hole on the substrate of the display panel in FIG3 is filled with a conductive material;
- FIG5 is a schematic structural diagram of a substrate of a display panel provided in an embodiment of the present application.
- FIG6 is a schematic diagram of the structure in which the second connection hole on the substrate of the display panel in FIG5 is filled with a conductive material
- FIG7 is a physical diagram of the structure of the second connection hole on the substrate of the display panel in FIG5;
- FIG8 is a schematic structural diagram of a substrate of a display panel provided in an embodiment of the present application.
- FIG9 is a schematic structural diagram of a substrate of a display panel provided in an embodiment of the present application.
- FIG10 is a schematic diagram of the structure in which the second connection hole on the substrate of the display panel in FIG9 is filled with a conductive material;
- FIG11 is a schematic structural diagram of a substrate of a display panel provided in an embodiment of the present application.
- FIG. 12 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application.
- Substrate-10 first sublayer-101, second sublayer-102, thin film transistor layer-20, first insulating layer 2031, second insulating layer-2032, binding terminal layer-103, binding terminal-1031, first connection hole-CH1, electrode wiring layer-202, second connection hole-CH2, light-emitting layer-30, conductive material-40, driving device-201, active layer-2013, gate-2012, source-2011a, drain-2011b, sacrificial layer-60, first diameter-H1, second diameter-H2, first material sublayer-1021, second material sublayer-1022, first subhole-CH21, second subhole-CH22, third diameter-H3, fourth diameter-H4, display area-A2, binding area-A1, shading portion-1032.
- the embodiments of the present application provide a display panel and a display device.
- the following are detailed descriptions. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments.
- the term “including” means “including but not limited to”.
- the terms first, second, third, etc. are only used as labels, and no numerical requirements are imposed or order is established.
- Various embodiments of the present invention may exist in the form of a range; it should be understood that the description in the form of a range is only for convenience and simplicity, and should not be understood as a rigid limitation on the scope of the present invention; therefore, it should be considered that the range description has specifically disclosed all possible sub-ranges and single numerical values within the range.
- Display panels usually use a back wiring method to achieve a narrow frame effect. As shown in FIG1 , the back wiring method requires removing the sacrificial layer 60 on the back of the display panel to expose the electrode wiring layer to achieve overlapping of the display panel electrodes and the electrodes of the flexible circuit board FPC.
- the sacrificial layer 60 of the electrode wiring layer 202 of the thin film transistor layer 20 of the OLED is peeled off (usually by laser peeling technology or mechanical peeling), it is bound and connected to the electrode of the back flexible circuit board FPC.
- the process of peeling off the whole surface of the sacrificial layer 60 there may be risks such as film separation between adjacent film layers in the product or damage to the array substrate layer and the light-emitting layer 30 structure.
- the present application provides the following technical solutions, please refer to the following embodiments and Figures 2 to 12 for details.
- the embodiment of the present application provides a display panel, as shown in FIG. 2 to FIG. 12 , including:
- the substrate 10 includes a first sublayer 101 and a second sublayer 102 which are stacked;
- the thin film transistor layer 20 is arranged on a side of the first sub-layer 101 away from the second sub-layer 102, and the thin film transistor layer 20 includes a first insulating layer 2031, a second insulating layer 2032, and an electrode wiring layer 202 arranged between the first insulating layer 2031 and the second insulating layer 2032, and the first insulating layer 2031 is arranged on a side of the second insulating layer 2032 close to the substrate 10;
- a binding terminal layer 103 is arranged between the first sub-layer 101 and the second sub-layer 102, and a first connecting hole CH1 is arranged on the first insulating layer 2031 and the first sub-layer 101, and the first connecting hole CH1 is arranged between the binding terminal layer 103 and the electrode wiring layer 202, and the electrode wiring layer 202 is electrically connected to the binding terminal layer 103 through the first connecting hole CH1; a second connecting hole CH2 is arranged on the second sub-layer 102, and the second connecting hole CH2 exposes at least part of the binding terminal layer 103.
- the display panel includes but is not limited to an OLED display panel, and the display panel includes a substrate 10, a thin film transistor layer 20 disposed on the substrate 10, and a light emitting layer 30 disposed on the thin film transistor layer 20;
- the light-emitting layer 30 includes a plurality of sub-pixel units, the light-emitting layer 30 includes an anode layer, a pixel definition layer arranged on the anode layer, an organic light-emitting layer arranged on the anode layer, and a cathode layer arranged on the organic light-emitting layer, wherein the anode layer includes a plurality of anodes arranged at intervals, a plurality of pixel openings are arranged on the pixel definition layer, the pixel openings are used to expose the anodes, and the pixel openings are filled with organic light-emitting materials (i.e., organic light-emitting layers), the cathode layer at least covers the organic light-emitting materials, one pixel opening corresponds to one sub-pixel unit, the cathode layer at least covers the organic light-emitting materials, the organic light-emitting materials emit light when electricity is passed between the anode layer and the cathode layer, and the ano
- the thin film transistor layer 20 includes a plurality of driving devices 201 , and the driving devices 201 and the sub-pixel units may be arranged in a one-to-one correspondence, and the driving devices 201 are electrically connected to the anodes of the corresponding sub-pixel units;
- the driving device 201 includes an insulated and stacked active layer 2013 , a gate 2012 , a source 2011a and a drain 2011b , wherein the source 2011a and the drain 2011b are respectively electrically connected to the channel portion of the active layer 2013 , and the source 2011a is electrically connected to the anode of the light-emitting layer 30 .
- the thin film transistor layer 20 also includes an insulating layer 203
- the insulating layer 203 includes a first insulating layer 2031 and a second insulating layer 2032
- an electrode wiring layer 202 is arranged between the first insulating layer 2031 and the second insulating layer 2032
- the material of the insulating layer 203 includes an organic insulating material or an inorganic insulating material, specifically silicon nitride or silicon oxide.
- the substrate 10 may be a hard substrate or a flexible substrate.
- the material of the substrate 10 includes one of glass, sapphire, silicon, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene terephthalate, polyimide or polyurethane.
- the substrate 10 includes a first sub-layer 101 and a second sub-layer 102 .
- a binding terminal layer 103 is disposed between the first sub-layer 101 and the second sub-layer 102 .
- the binding terminal layer 103 may include a plurality of binding terminals 1031 disposed at intervals.
- the materials of the first sub-layer 101 and the second sub-layer 102 may be the same or different, and there is no specific limitation;
- the first sublayer 101 or the second sublayer 102 may include a first material layer and a second material layer
- the first material layer may be an inorganic buffer layer
- the material of the inorganic buffer layer may be silicon nitride or silicon oxide
- the second material layer may be a polyimide layer.
- the material of the binding terminal layer 103 is a conductive material, and specifically may be a metal such as copper, aluminum, titanium, or an alloy thereof.
- both sides of the binding terminal layer 103 are inorganic buffer layers, and the polyimide layer is located outside the first material layer.
- a penetrating first connection hole CH1 is provided on the first insulating layer 2031 and the first sublayer 101, and the first connection hole CH1 is provided between the binding terminal layer 103 and the electrode wiring layer 202, and the electrode wiring layer 202 is electrically connected to the binding terminal layer 103 through the first connection hole CH1.
- the first connection hole CH1 can be filled with a conductive material 40 that is the same as the material of the electrode wiring layer 202, so that the electrode wiring layer 202 and the binding terminal layer 103 are electrically connected.
- the first connection hole CH1 can be formed by wet or dry etching, and there is no restriction on the setting shape and opening area of the first connection hole CH1.
- the structure that can electrically connect the binding terminal layer 103 and the electrode wiring layer 202 is within the protection scope of the present application.
- a second connection hole CH2 is provided on the second sub-layer 102 , and the second connection hole CH2 exposes at least a portion of the binding terminal layer 103 .
- the second connection hole CH2 serves to expose a portion of the binding terminal 1031 , so that the exposed binding terminal 1031 can be bound to the connection terminal of the flexible circuit board.
- one of the binding terminals 1031 may correspond to one of the second connection holes CH2 , and in a direction perpendicular to the substrate 10 , the projection of the binding terminal 1031 at least covers the projection of the second connection hole CH2 .
- the opening shape of the second connection hole CH2 is not limited and may be circular or square.
- the inner wall of the second connection hole CH2 can be a plane or a curved surface, which is not specifically limited.
- the binding terminal layer 103 is arranged between the first sub-layer 101 and the second sub-layer 102, and a first connecting hole CH1 is provided on the insulating layer 203 of the first sub-layer 101 and the thin film transistor layer 20, and the electrode wiring layer 202 is electrically connected to the binding terminal layer 103 through the first connecting hole CH1, and a second connecting hole CH2 is provided on the second sub-layer 102, so that part of the binding terminal layer 103 is exposed.
- the second connecting hole CH2 can be filled with silver paste and then electrically connected to the connecting terminal on the flexible circuit board, thereby avoiding the use of mechanical or laser stripping to strip the sacrificial layer 60 on the surface of the electrode wiring layer 202 of the thin film transistor layer 20 during the manufacturing process, thereby reducing the risk of part of the film layer in the thin film transistor layer 20 being detached due to the stress or laser of the stripping during the product production process, and reducing the life of the light-emitting layer 30.
- the electrode routing layer 202 includes a plurality of sub-routings
- the binding terminal layer 103 includes a plurality of binding terminals 1031 arranged at intervals
- one of the sub-routings is connected to one of the binding terminals 1031
- the number of the second connection holes CH2 is the same as the number of the binding terminals 1031
- one of the second connection holes CH2 is arranged corresponding to one of the binding terminals 1031.
- the electrode wiring layer 202 can be a data line connecting the source 2011a and the drain 2011b of the driving device 201, or it can be a scanning line connecting the gate 2012 of the driving device 201.
- the present application does not impose any restrictions on this, and it can be adjusted according to the binding situation of the display panel and the flexible circuit board in actual production.
- the plurality of sub-routes may be arranged in the same layer or in different layers, and may be adjusted according to the actual arrangement of the thin film transistors.
- multiple binding terminal layers 103 may be insulated and stacked in the substrate 10 , the second connection holes CH2 corresponding to different binding terminal layers 103 have different depths, and the orthographic projections of different second connection holes CH2 corresponding to different binding terminal layers 103 in the direction perpendicular to the substrate 10 do not overlap.
- a sub-route corresponds to one of the binding terminals 1031, and one of the binding terminals 1031 corresponds to one of the second connection holes CH2, that is, the three are arranged in a one-to-one correspondence.
- a sub-route can be connected to one of the binding terminals 1031 through multiple first connection holes CH1, and one of the binding terminals 1031 corresponds to one of the second connection holes CH2, so as to ensure that the sub-route can have a good telecommunication connection with the flexible circuit board.
- the number of the second connection holes CH2 is the same as the number of the binding terminals 1031, and one second connection hole CH2 is set corresponding to one binding terminal 1031, which can further improve the conductivity between the electrode traces and the connection terminals of the flexible circuit board, and prevent the electrode traces of the display panel and the connection terminals of the flexible circuit board from being broken, resulting in poor display problems.
- the second connection hole CH2 includes a first opening close to one side of the binding terminal 1031, and a second opening away from the binding terminal 1031, the first opening has a first diameter H1, the second opening has a second diameter H2, the first diameter H1 and the second diameter H2 are different in size, and the inner wall of the second connection hole CH2 has a first angle with the direction perpendicular to the substrate 10.
- the diameter in this embodiment and the following embodiments refers to the longest distance between the inner walls of the second connection hole CH2 in the horizontal direction, and does not limit the opening of the second connection hole CH2 to be circular or elliptical.
- the first diameter H1 is greater than the second diameter H2, and the cross-section of the second connection hole CH2 is an inverted trapezoid.
- the adhesion strength between the display panel and the flexible circuit board is significantly improved.
- the first diameter H1 is smaller than the second diameter H2, and the cross-section of the second connection hole CH2 is trapezoidal.
- the adhesion strength between the display panel and the flexible circuit board can be improved.
- the inner wall of the second connection hole CH2 and the conductive material 40 filled therein have a larger contact area, which can further improve the adhesion strength between the display panel and the flexible circuit board.
- the inner wall of the second connection hole CH2 is a rough surface, and the roughness Ra of the inner wall of the second connection hole CH2 is in the range of 0.1-100.
- the inner wall of the second connection hole CH2 is a rough surface, which means that the inner wall of the second connection hole CH2 is a non-flat surface, and its roughness Ra value can be any one of 0.1, 0.2, 0.6, 0.8, 1.5, 1.8, 2.0, 50.0, and 100, and can be adjusted according to actual production conditions.
- the inner wall of the second connection hole CH2 includes a plurality of stepped structures extending axially along the second connection hole or a plurality of protrusions are provided on the inner wall of the second connection hole CH2 .
- ⁇ is the inclination angle of the side wall of the second connection hole CH2 relative to the substrate 10
- the first diameter H1 of the second connection hole CH2 is set to be smaller than the second diameter H2
- the cross-section of the second connection hole CH2 (along the axial direction of the second connection hole CH2) is trapezoidal, and a plurality of layers of stepped structures extending along the axial direction of the second connection hole CH2 are arranged on the side wall of the second connection hole CH2, as shown in Figure 7, which increases the roughness of the inner wall of the second connection hole CH2, further increases the adhesion strength between the conductive material 40 in the second connection hole CH2 and the substrate 10, and thereby improves the adhesion strength between the display panel and the flexible circuit board.
- the second sub-layer 102 includes a first material sub-layer 1021 and a second material sub-layer 1022 that are stacked
- the second connection hole CH2 includes a first sub-hole CH21 arranged on the first material sub-layer 1021, and a second sub-hole CH22 arranged on the second material sub-layer 1022, and the materials of the first material sub-layer 1021 and the second material sub-layer 1022 are different.
- the diameter of the first sub-hole CH21 and the diameter of the second sub-hole CH22 may be the same or different.
- the diameter of the first sub-hole CH21 is larger than the diameter of the second sub-hole CH22.
- the material of the first material sub-layer 1021 may be silicon nitride or silicon oxide, and the material of the second material sub-layer 1022 may be polyimide.
- the second connection hole CH2 is set to pass through two different material layers, so that the conductive material 40 injected into the second connection hole CH2 can generate different degrees of adhesion between the first material sublayer 1021 and the second material sublayer 1022, which can enhance the adhesion strength between the display panel and the flexible circuit board to a certain extent.
- the first material sub-layer 1021 is located on a side of the second material sub-layer 1022 close to the binding terminal layer 103, the side wall of the first sub-hole CH21 is at least one preset angle with the direction perpendicular to the substrate 10, and the diameter of the first sub-hole CH21 is greater than or equal to the diameter of the second sub-hole CH22.
- the side wall of the first sub-hole CH21 forms at least one preset angle with the direction perpendicular to the substrate 10, which means that the side wall of the first sub-hole CH21 is not perpendicular to the side wall, and the side wall of the first sub-hole CH21 may be arc-shaped, fold line-shaped, etc.
- the side wall of the first sub-hole CH21 has multiple preset angles with the direction perpendicular to the substrate 10. As shown in FIG.
- the side wall of the first sub-hole CH21 when the side wall of the first sub-hole CH21 is fold line-shaped (bent once), the side wall of the first sub-hole CH21 has two preset angles with the direction perpendicular to the substrate 10 (specifically, it may be 60°), and the specific degree is not limited.
- the diameter of the first sub-hole CH21 is greater than or equal to the diameter of the second sub-hole CH22, which means that the maximum diameter of the first sub-hole CH21 is greater than or equal to the maximum diameter of the second sub-hole CH22;
- the diameter is the diameter of the circumscribed circle of the opening shape of the first sub-hole CH21.
- the inner wall of the second sub-hole CH22 may be arranged in the same manner as that of the first sub-hole CH21 or may be arranged differently.
- the first sub-hole CH21 can be formed by wet etching, specifically by utilizing the isotropic etching principle, by adding a buffer to change the concentration of the etching solution or by increasing/decreasing the etching ambient temperature to control the etching rate, so that the inner wall of the first sub-hole CH21 can have at least one preset angle with the direction perpendicular to the substrate 10.
- the conductive material 40 in the first sub-hole CH21 can form a physical snap-fit state with the first sub-hole CH21, which can further increase the adhesion strength between the display panel and the flexible circuit board.
- the first sub-hole CH21 includes a third opening close to the binding terminal layer 103, and a fourth opening close to the second material sub-layer 1022, the diameter of the third opening is a third diameter H3, the diameter of the fourth opening is a fourth diameter H4, the diameter of the first sub-hole CH21 between the third opening and the fourth opening is a fifth diameter, and the fifth diameter is greater than the third diameter H3, the fifth diameter is greater than the fourth diameter H4, and the side wall of the first sub-hole CH21 is an arc-shaped side wall.
- the third diameter H3 and the fourth diameter H4 may be equal or different in size, and there is no specific limitation thereto.
- the fifth diameter is a diameter of the first sub-hole CH21 at any position between the third opening and the fourth opening.
- the diameter of the fourth opening is the same as the diameter of the opening of the second sub-hole CH22 on the side close to the first material sub-layer 1021, so that the first sub-hole CH21 and the second sub-hole CH22 can be smoothly connected, reducing the difficulty of filling the conductive material 40 into the second connection hole CH2.
- the diameter of the third opening is a third diameter H3
- the diameter of the fourth opening is a fourth diameter H4
- the diameter of the first sub-hole CH21 between the third opening and the fourth opening is a fifth diameter
- the fifth diameter is greater than the third diameter H3, and the fifth diameter is greater than the fourth diameter H4.
- the above-mentioned setting method makes the inner wall diameter of the first sub-hole CH21 show a trend of first increasing and then decreasing, so that the conductive material 40 in the second connecting hole CH2 can form a physical snap-on state, which can further increase the adhesion strength between the display panel and the flexible circuit board.
- the display panel includes a display area A2 and a binding area A1
- the binding terminal layer 103 includes a plurality of binding terminals 1031 and a shading portion 1032
- the plurality of binding terminals 1031 are located in the binding area A1
- the shading portion 1032 is located in the display area A2
- the driving device 201 includes a channel portion
- the shading portion 1032 at least covers the channel portion.
- the binding area A1 may be located at one side of the display area A2, and the binding area A1 may also partially overlap with the display area A2.
- the binding terminal layer 103 includes a binding terminal 1031 located in the binding area A1 , and a light shielding portion 1032 located in the display area A2 and arranged corresponding to a channel portion of the driving device 201 .
- the binding terminal 1031 and the light shielding portion 1032 may be manufactured using the same process, and the binding terminal 1031 and the light shielding portion 1032 may be made of the same material.
- the production cost of the display panel can be further reduced, production steps can be saved, production efficiency can be improved, the life of the driving device 201 can be extended, and the stability of the driving device 201 can be improved.
- the display panel further includes a flexible circuit board, the second connection hole has a conductive material therein, the flexible circuit board includes a connection terminal corresponding to the binding terminal, and the connection terminal is electrically connected to the binding terminal through the conductive material in the second connection hole.
- the present application sets a display panel including a substrate 10 and a thin film transistor layer 20 arranged on the substrate 10, sets the binding terminal layer 103 between the first sublayer 101 and the second sublayer 102, and sets a first connecting hole CH1 through it on the insulating layer 203 of the first sublayer 101 and the thin film transistor layer 20, the electrode wiring layer 202 is electrically connected to the binding terminal layer 103 through the first connecting hole CH1, and sets a second connecting hole CH2 through it on the second sublayer 102, so that part of the binding terminal layer 103 is exposed, and when back binding is performed with the flexible circuit board, the second connecting hole CH2 can be filled with silver paste and then electrically connected to the connecting terminal on the flexible circuit board, thereby avoiding the use of mechanical or laser stripping to peel off the sacrificial layer 60 on the surface of the electrode wiring layer 202 of the thin film transistor layer 20 during the manufacturing process, thereby reducing the risk of part of the film layer in the thin film transistor layer 20 being detached due to the stress or laser of the stripping during
- This embodiment provides a display device, which includes the display panel described in any one of the above embodiments.
- the display device can be a display screen of a smart phone, tablet computer, laptop computer, smart bracelet, smart watch, smart glasses, smart helmet, desktop computer, smart TV or digital camera, and can even be used on electronic devices with flexible display screens.
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Abstract
本申请公开了一种显示面板及显示装置,无需采用机械剥离或者激光剥离技术对显示面板进行处理,能够使得电极走线层与柔性电路板进行绑定连接,有效提升显示面板的窄边框效果和拼接显示面板的生产良率。
Description
本申请涉及显示技术领域,尤其涉及一种显示面板及显示装置。
有机发光二极管 (Organic Light‑Emitting Diode,OLED)显示设备因其轻薄、色彩鲜艳、可柔性弯曲等特点,现在已经成为高端手机、电视等产品的首选,同时在窄边框、拼接等领域,也有着越来越广泛的应用范围。
在窄边框面板、拼接面板等设计,通常需要采用显示面板背部走线方式实现窄边框效果,背部走线方式需将显示面板背部衬底层去除以暴露出电极,实现显示面板的电极和柔性电路板的电极搭接。
将OLED的薄膜晶体管层电极远离发光层一侧的衬底的牺牲层剥离(通常采用激光剥离技术或机械剥离)后和背部柔性电路板的电极绑定连接。在牺牲层整面剥离过程中,可能造成产品中相邻膜层之间发生膜层脱离或者阵列基板层和发光层结构受损等风险。
本申请实施例提供一种显示面板及显示装置,无需采用机械剥离或者激光剥离技术,能够有效提升显示面板的窄边框效果和拼接显示面板的生产良率。
为实现上述功能,本申请实施例提供的技术方案如下:
本申请实施例提供一种显示面板,包括:
衬底,包括层叠设置的第一子层和第二子层;
薄膜晶体管层,设置于所述第一子层远离所述第二子层的一侧面,所述薄膜晶体管层包括第一绝缘层、第二绝缘层、以及设置于所述第一绝缘层和所述第二绝缘层之间的电极走线层,所述第一绝缘层设置于所述第二绝缘层靠近所述衬底的一侧;
其中,所述第一子层和所述第二子层之间设置有一绑定端子层,所述第一绝缘层和所述第一子层上设置有贯穿的第一连接孔,所述第一连接孔设置于所述绑定端子层和所述电极走线层之间,且所述电极走线层通过所述第一连接孔与所述绑定端子层电连接;所述第二子层上设置有第二连接孔,所述第二连接孔暴露至少部分所述绑定端子层。
可选的,所述电极走线层包括多条子走线,所述绑定端子层包括多个间隔设置的绑定端子,一所述子走线连接一所述绑定端子,所述第二连接孔的数量与所述绑定端子的数量相同,一所述第二连接孔对应一所述绑定端子设置。
可选的,所述第二连接孔包括靠近所述绑定端子一侧的第一开口,以及远离所述绑定端子的第二开口,所述第一开口具有第一直径,所述第二开口具有第二直径,所述第一直径和所述第二直径的大小不同,所述第二连接孔的内壁与垂直所述衬底的方向具有第一夹角。
可选的,所述第二连接孔的内壁为粗糙表面,所述第二连接孔内壁的粗糙度Ra范围为0.1~100。
可选的,所述第二连接孔的内壁包括多层沿所述第二连接孔的轴向延伸的阶梯结构或所述第二连接孔的内壁上设置多个凸起。
可选的,所述第二子层包括层叠设置的第一材料子层和第二材料子层,所述第二连接孔包括设置于所述第一材料子层上的第一子孔,以及设置于所述第二材料子层上的第二子孔,所述第一材料子层和所述第二材料子层的材料不同。
可选的,所述第一材料子层位于所述第二材料子层靠近所述绑定端子层的一侧面,所述第一子孔的侧壁与垂直所述衬底的方向呈至少一预设夹角,且所述第一子孔的直径大于或等于所述第二子孔的直径。
可选的,所述第一子孔包括靠近所述绑定端子层的第三开口,以及靠近第二材料子层的第四开口,所述第三开口的直径为第三直径,所述第四开口的直径为第四直径,所述第三开口和所述第四开口之间所述第一子孔的直径为第五直径,且所述第五直径大于所述第三直径,所述第五直径大于所述第四直径,所述第一子孔的侧壁为弧形侧壁。
可选的,所述显示面板包括绑定区和显示区,所述绑定端子层包括多个绑定端子和遮光部,多个所述绑定端子位于所述绑定区,所述遮光部位于所述显示区,所述薄膜晶体管层包括多个驱动器件,所述驱动器件包括沟道部,所述遮光部至少覆盖所述沟道部。
可选的,所述显示面板还包括柔性电路板,所述第二连接孔内具有导电材料,所述柔性电路板包括与所述绑定端子相对应的连接端子,所述连接端子与所述绑定端子通过所述第二连接孔内的导电材料电连接。
本申请实施例提供一种显示装置,所述显示装置包括一显示面板,所述显示面板包括:
衬底,包括层叠设置的第一子层和第二子层;
薄膜晶体管层,设置于所述第一子层远离所述第二子层的一侧面,所述薄膜晶体管层包括第一绝缘层、第二绝缘层、以及设置于所述第一绝缘层和所述第二绝缘层之间的电极走线层,所述第一绝缘层设置于所述第二绝缘层靠近所述衬底的一侧;
其中,所述第一子层和所述第二子层之间设置有一绑定端子层,所述第一绝缘层和所述第一子层上设置有贯穿的第一连接孔,所述第一连接孔设置于所述绑定端子层和所述电极走线层之间,且所述电极走线层通过所述第一连接孔与所述绑定端子层电连接;所述第二子层上设置有第二连接孔,所述第二连接孔暴露至少部分所述绑定端子层。
可选的,所述电极走线层包括多条子走线,所述绑定端子层包括多个间隔设置的绑定端子,一所述子走线连接一所述绑定端子,所述第二连接孔的数量与所述绑定端子的数量相同,一所述第二连接孔对应一所述绑定端子设置。
可选的,所述第二连接孔包括靠近所述绑定端子一侧的第一开口,以及远离所述绑定端子的第二开口,所述第一开口具有第一直径,所述第二开口具有第二直径,所述第一直径和所述第二直径的大小不同,所述第二连接孔的内壁与垂直所述衬底的方向具有第一夹角。
可选的,所述第二连接孔的内壁为粗糙表面,所述第二连接孔内壁的粗糙度Ra范围为0.1~100。
可选的,所述第二连接孔的内壁包括多层沿所述第二连接孔的轴向延伸的阶梯结构或所述第二连接孔的内壁上设置多个凸起。
可选的,所述第二子层包括层叠设置的第一材料子层和第二材料子层,所述第二连接孔包括设置于所述第一材料子层上的第一子孔,以及设置于所述第二材料子层上的第二子孔,所述第一材料子层和所述第二材料子层的材料不同。
可选的,所述第一材料子层位于所述第二材料子层靠近所述绑定端子层的一侧面,所述第一子孔的侧壁与垂直所述衬底的方向具有第二夹角,且所述第一子孔的直径大于或等于所述第二子孔的直径。
可选的,所述第一子孔包括靠近所述绑定端子层的第三开口,以及靠近第二材料子层的第四开口,所述第三开口的直径为第三直径,所述第四开口的直径为第四直径,所述第三开口和所述第四开口之间所述第一子孔的直径为第五直径,且所述第五直径大于所述第三直径,所述第五直径大于所述第四直径,所述第一子孔的侧壁为弧形侧壁。
可选的,所述显示面板包括绑定区和显示区,所述绑定端子层包括多个绑定端子和遮光部,多个所述绑定端子位于所述绑定区,所述遮光部位于所述显示区,所述薄膜晶体管层包括多个驱动器件,所述驱动器件包括沟道部,所述遮光部至少覆盖所述沟道部。
可选的,所述显示面板还包括柔性电路板,所述第二连接孔内具有导电材料,所述柔性电路板包括与所述绑定端子相对应的连接端子,所述连接端子与所述绑定端子通过所述第二连接孔内的导电材料电连接。
本申请实施例提供一种显示面板及显示装置,通过设置显示面板包括衬底、设置于衬底上的薄膜晶体管层,将绑定端子层设置于第一子层和第二子层之间,设置第一子层和薄膜晶体管层的第一绝缘层上开设有贯穿的第一连接孔,电极走线层通过第一连接孔与绑定端子层电连接,在第二子层上设置贯穿的第二连接孔,使得部分所述绑定端子层暴露,在与柔性电路板进行背部绑定时,可以在第二连接孔内填充银浆后与柔性电路板上的连接端子电连接,避免了在制造过程中采用机械或激光剥离的手段将阵列基板层的电极表面的绝缘层剥离,降低了产品生产过程中因剥离的应力或激光导致薄膜晶体管层中部分膜层脱离,发光层寿命降低的风险。
下面结合附图,通过对本申请的具体实施方式详细描述,将使本申请的技术方案及其它有益效果显而易见。
图1是现有技术中的显示面板剥离牺牲层绑定的结构示意图;
图2是本申请实施例提供的一种显示面板的结构示意图;
图3是本申请实施例提供的一种显示面板的衬底的结构示意图;
图4是图3中显示面板的衬底上第二连接孔填充导电材料的结构示意图;
图5是本申请实施例提供的一种显示面板的衬底的结构示意图;
图6是图5中显示面板的衬底上第二连接孔填充导电材料的结构示意图;
图7是图5中显示面板的衬底上第二连接孔的结构实物图;
图8是本申请实施例提供的一种显示面板的衬底的结构示意图;
图9是本申请实施例提供的一种显示面板的衬底的结构示意图;
图10是图9中显示面板的衬底上第二连接孔填充导电材料的结构示意图;
图11是本申请实施例提供的一种显示面板的衬底的结构示意图;
图12是本申请实施例提供的一种显示面板的结构示意图。
附图标记:
衬底-10,第一子层-101,第二子层-102,薄膜晶体管层-20,第一绝缘层2031,第二绝缘层-2032,绑定端子层-103,绑定端子-1031,第一连接孔-CH1,电极走线层-202,第二连接孔-CH2,发光层-30,导电材料-40,驱动器件-201,有源层-2013,栅极-2012,源极-2011a,漏极-2011b,牺牲层-60,第一直径-H1,第二直径-H2,第一材料子层-1021,第二材料子层-1022,第一子孔-CH21,第二子孔-CH22,第三直径-H3,第四直径-H4,显示区-A2,绑定区-A1,遮光部-1032。
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
本申请实施例提供一种显示面板及显示装置。以下分别进行详细说明。需说明的是,以下实施例的描述顺序不作为对实施例优选顺序的限定。另外,在本申请的描述中,术语“包括”是指“包括但不限于”。用语第一、第二、第三等仅仅作为标示使用,并没有强加数字要求或建立顺序。本发明的各种实施例可以以一个范围的型式存在;应当理解,以一范围型式的描述仅仅是因为方便及简洁,不应理解为对本发明范围的硬性限制;因此,应当认为所述的范围描述已经具体公开所有可能的子范围以及该范围内的单一数值。
显示面板通常采用背部走线方式实现窄边框效果,如图1所示,背部走线方式需将显示面板背部牺牲层60去除以暴露出电极走线层,实现显示面板的电极和柔性电路板FPC的电极搭接。
将OLED的薄膜晶体管层20的电极走线层202远离发光层30一侧的衬底10的牺牲层60剥离(通常采用激光剥离技术或机械剥离)后和背部柔性电路板FPC的电极绑定连接。在牺牲层60整面剥离过程中,可能造成产品中相邻膜层之间发生膜层脱离或者阵列基板层和发光层30结构受损等风险,为了解决上述技术问题,本申请提供如下技术方案,具体参见下述实施例和附图2~12。
本申请实施例提供一种显示面板,如图2~图12所示,包括:
衬底10,包括层叠设置的第一子层101和第二子层102;
薄膜晶体管层20,设置于所述第一子层101远离所述第二子层102的一侧面,所述薄膜晶体管层20包括第一绝缘层2031、第二绝缘层2032、以及设置于所述第一绝缘层2031和所述第二绝缘层2032之间的电极走线层202,所述第一绝缘层2031设置于所述第二绝缘层2032靠近所述衬底10的一侧;
其中,所述第一子层101和所述第二子层102之间设置有一绑定端子层103,所述第一绝缘层2031和所述第一子层101上设置有贯穿的第一连接孔CH1,所述第一连接孔CH1设置于所述绑定端子层103和所述电极走线层202之间,且所述电极走线层202通过所述第一连接孔CH1与所述绑定端子层103电连接;所述第二子层102上设置有第二连接孔CH2,所述第二连接孔CH2暴露至少部分所述绑定端子层103。
需要说明的是,如图2所示,所述显示面板包括但不限于OLED显示面板,所述显示面板包括衬底10、设置于衬底10上的薄膜晶体管层20以及设置于所述薄膜晶体管层20上的发光层30;
具体地,所述发光层30包括多个子像素单元,所述发光层30包括阳极层、设置于所述阳极层上的像素定义层、设置于所述阳极层上的有机发光层、以及设置于所述有机发光层上阴极层,其中,所述阳极层包括多个间隔设置的阳极,所述像素定义层上设置有多个像素开口,所述像素开口用于暴露所述阳极,且所述像素开口内填充有机发光材料(即有机发光层),所述阴极层至少覆盖所述有机发光材料,一所述像素开口对应一所述子像素单元,所述阴极层至少覆盖所述有机发光材料,所述阳极层和所述阴极层之间通电使所述有机发光材料发光,所述阳极层与薄膜晶体管层20中的驱动器件201电连接。
具体地,如图2所示,所述薄膜晶体管层20包括多个驱动器件201,所述驱动器件201与所述子像素单元可以一一对应设置,所述驱动器件201与对应的所述子像素单元的阳极电连接;
具体地,所述驱动器件201包括绝缘叠设的有源层2013、栅极2012、源极2011a和漏极2011b,所述源极2011a和所述漏极2011b分别电连接所述有源层2013的沟道部,所述源极2011a与所述发光层30的阳极电连接。
具体地,如图2所示,所述薄膜晶体管层20还包括绝缘层203,所述绝缘层203包括第一绝缘层2031和第二绝缘层2032,所述第一绝缘层2031和所述第二绝缘层2032之间设置有电极走线层202,所述绝缘层203(包括第一绝缘层2031和第二绝缘层2032)的材料包括有机绝缘材料或无机绝缘材料,具体可以为氮化硅或氧化硅。
具体地,所述衬底10可为硬性衬底或者柔性衬底。衬底10的材质包括玻璃、蓝宝石、硅、二氧化硅、聚乙烯、聚丙烯、聚苯乙烯、聚乳酸、聚对苯二甲酸乙二醇酯、聚酰亚胺或聚氨酯中的一种。
具体地,所述衬底10包括第一子层101和第二子层102,所述第一子层101和所述第二子层102之间设置有绑定端子层103,所述绑定端子层103可以包括多个间隔设置的绑定端子1031。
具体地,所述第一子层101和所述第二子层102的材料可以相同也可以不同,具体不作限制;
具体地,所述第一子层101或所述第二子层102可以包括第一材料层和第二材料层,所述第一材料层可以为无机缓冲层,所述无机缓冲层的材料可以为氮化硅或氧化硅,所述第二材料层可以为聚酰亚胺层。
具体地,所述绑定端子层103的材料为导电材料,具体可以为铜、铝、钛等金属或其合金。
具体地,所述绑定端子层103的两侧为无机缓冲层,所述聚酰亚胺层位于第一材料层的外侧。
具体地,所述第一绝缘层2031和所述第一子层101上设置有贯穿的第一连接孔CH1,所述第一连接孔CH1设置于所述绑定端子层103和所述电极走线层202之间,且所述电极走线层202通过所述第一连接孔CH1与所述绑定端子层103电连接,所述第一连接孔CH1中可以填充与所述电极走线层202的材料相同的导电材料40,以使所述电极走线层202和所述绑定端子层103电连接,所述第一连接孔CH1可以通过湿法或干法刻蚀形成,对所述第一连接孔CH1的设置形状和开口面积不作限制,能够使得绑定端子层103和电极走线层202电连接的结构均在本申请的保护范围内。
具体地,所述第二子层102上设置有第二连接孔CH2,所述第二连接孔CH2暴露至少部分所述绑定端子层103,所述第二连接孔CH2的作用是暴露出部分绑定端子1031,使得暴露的绑定端子1031能够与柔性电路板的连接端子进行绑定。
具体地,一所述绑定端子1031可以对应一所述第二连接孔CH2,在垂直所述衬底10的方向上,所述绑定端子1031的投影至少覆盖所述第二连接孔CH2的投影。
具体地,在垂直所述衬底10的方向上,所述第二连接孔CH2的开口形状不作限制,可以为圆形也可以为方形。
具体地,所述第二连接孔CH2的内壁可以为平面也可以为曲面,具体不作限制。
可以理解的是,通过设置显示面板包括衬底10、设置于衬底10上的薄膜晶体管层20,将绑定端子层103设置于第一子层101和第二子层102之间,设置第一子层101和薄膜晶体管层20的绝缘层203上开设有贯穿的第一连接孔CH1,电极走线层202通过第一连接孔CH1与绑定端子层103电连接,在第二子层102上设置贯穿的第二连接孔CH2,使得部分所述绑定端子层103暴露,在与柔性电路板进行背部绑定时,可以在第二连接孔CH2内填充银浆后与柔性电路板上的连接端子电连接,避免了在制造过程中采用机械或激光剥离的手段将薄膜晶体管层20的电极走线层202表面的牺牲层60剥离,降低了产品生产过程中因剥离的应力或激光导致薄膜晶体管层20中部分膜层脱离,发光层30寿命降低的风险。
在一实施例中,如图2所示,所述电极走线层202包括多条子走线,所述绑定端子层103包括多个间隔设置的绑定端子1031,一所述子走线连接一所述绑定端子1031,所述第二连接孔CH2的数量与所述绑定端子1031的数量相同,一所述第二连接孔CH2对应一所述绑定端子1031设置。
具体地,在实际生产中,所述电极走线层202可以为连接驱动器件201的源极2011a、漏极2011b的数据线,也可以为连接驱动器件201的栅极2012的扫描线,本申请对此不作限制,具体可以根据实际生产中显示面板与柔性电路板的绑定情况进行调整。
具体地,多条所述子走线可以同层设置,也可以不同层设置,具体根据实际的薄膜晶体管的走线排布进行调整。
具体地,所述衬底10中可以绝缘叠设多层绑定端子层103,不同绑定端子层103对应的第二连接孔CH2的深度不同,且不同绑定端子层103对应的不同的第二连接孔CH2在垂直所述衬底10方向上的正投影不重合。
具体地,在一实例中,一条子走线对应一所述绑定端子1031,一所述绑定端子1031对应一所述第二连接孔CH2,即三者一一对应设置,在另一实例中,一条子走线可以通过多个第一连接孔CH1与一绑定端子1031连接,一所述绑定端子1031对应一所述第二连接孔CH2,以保证子走线能够与柔性电路板电信连接良好。
可以理解的是,通过设置不同电极走线对应连接不同的绑定端子1031,所述第二连接孔CH2的数量与所述绑定端子1031的数量相同,一所述第二连接孔CH2对应一所述绑定端子1031设置,能够进一步提升电极走线与柔性电路板的连接端子之间的导通率,防止显示面板的电极走线与柔性电路板的连接端子之间断路,导致显示不良的问题。
在一实施例中,如图3和图4所示,所述第二连接孔CH2包括靠近所述绑定端子1031一侧的第一开口,以及远离所述绑定端子1031的第二开口,所述第一开口具有第一直径H1,所述第二开口具有第二直径H2,所述第一直径H1和所述第二直径H2的大小不同,所述第二连接孔CH2的内壁与垂直所述衬底10的方向具有第一夹角。
具体地,本实施例以及下述实施例中的所述直径是指水平方向上,所述第二连接孔CH2的内壁之间的最长距离,并不仅限制所述第二连接孔CH2的开口为圆形或椭圆形。
具体地,如图3和图4所示,所述第一直径H1大于所述第二直径H2,所述第二连接孔CH2的截面呈倒置的梯形,采用本技术方案在向所述第二连接孔CH2中填充有导电材料40后,显示面板与柔性电路板之间的粘附强度得到显著提升。
具体地,如图5和图6所示,所述第一直径H1小于所述第二直径H2,所述第二连接孔CH2的截面呈梯形,采用本技术方案在向所述第二连接孔CH2中填充有导电材料40后,显示面板与柔性电路板之间的粘附强度能够得到提升。
可以理解的是,通过设置所述第二连接孔CH2的第一开口和第二开口具有不同的直径,使得第二连接孔CH2的内壁与其填充的导电材料40具有更大的接触面积,能够进一步提升显示面板与柔性电路板之间的粘附强度。
在一实施例中,所述第二连接孔CH2的内壁为粗糙表面,所述第二连接孔CH2内壁的粗糙度Ra范围为0.1~100。
具体地,所述第二连接孔CH2的内壁为粗糙表面,是指所述第二连接孔CH2的内壁为非平整表面,其粗糙度Ra值可以为0.1、0.2、0.6、0.8、1.5、1.8、2.0、50.0、100中的任一种,具体可以根据实际生产情况进行调整。
在一实施例中,如图5和图6所示,所述第二连接孔CH2的内壁包括多层沿所述第二连接孔轴向延伸的阶梯结构或所述第二连接孔CH2的内壁上设置多个凸起。
具体地,如图5、图6和图7所示,θ为第二连接孔CH2侧壁相对衬底10的倾斜角度,设置所述第二连接孔CH2的所述第一直径H1小于所述第二直径H2,所述第二连接孔CH2的截面(沿第二连接孔CH2轴向)呈梯形,在第二连接孔CH2的侧壁上设置多层沿所述第二连接孔轴向延伸的阶梯结构,如图7所示,起到增大第二连接孔CH2的内壁粗糙度的作用,进一步增加第二连接孔CH2内的导电材料40与衬底10的粘附强度,进而使得显示面板与柔性电路板之间的粘附强度能够得到提升。
可以理解的是,设置所述第二连接孔CH2内壁为粗糙表面,在向所述第二连接孔CH2中填充有导电材料40后,显示面板与柔性电路板之间的粘附强度能够得到显著提升。
在一实施例中,如图8所示,所述第二子层102包括层叠设置的第一材料子层1021和第二材料子层1022,所述第二连接孔CH2包括设置于所述第一材料子层1021上的第一子孔CH21,以及设置于所述第二材料子层1022上的第二子孔CH22,所述第一材料子层1021和所述第二材料子层1022的材料不同。
具体地,所述第一子孔CH21的直径与所述第二子孔CH22的直径可以相同也可以不同,优选所述第一子孔CH21的直径大于所述第二子孔CH22的直径。
具体地,所述第一材料子层1021的材料可以为氮化硅或氧化硅,所述第二材料子层1022的材料可以为聚酰亚胺。
可以理解的是,设置所述第二连接孔CH2穿过两层不同的材料层,使得灌注至第二连接孔CH2中的导电材料40能够与第一材料子层1021和第二材料子层1022之间产生不同大小的粘附力,能够在一定程度上增强显示面板与柔性电路板之间的粘附强度。
在一实施例中,如图9、图10和图11所示,所述第一材料子层1021位于所述第二材料子层1022靠近所述绑定端子层103的一侧面,所述第一子孔CH21的侧壁与垂直所述衬底10的方向呈至少一预设夹角,且所述第一子孔CH21的直径大于或等于所述第二子孔CH22的直径。
具体地,所述第一子孔CH21的侧壁与垂直所述衬底10的方向呈至少一预设夹角是指所述第一子孔CH21的侧壁为非垂直所述的侧壁,所述第一子孔CH21的侧壁可以为弧形,折线形等,如图9和图10所示,当所述第一子孔CH21的侧壁为弧形时,所述第一子孔CH21的侧壁与垂直所述衬底10的方向具有多个预设夹角,如图11所示,当所述第一子孔CH21的侧壁为折线形(弯折一次)时,所述第一子孔CH21的侧壁与垂直所述衬底10的方向具有两个预设夹角(具体可以为60°),具体的度数不作限制。
具体地,所述第一子孔CH21的直径大于或等于所述第二子孔CH22的直径是指,所述第一子孔CH21的最大直径大于或等于所述第二子孔CH22的最大直径;
具体地,当所述第一子孔CH21的开口形状为非圆形时,所述直径为所述第一子孔CH21的开口形状的外切圆直径。
具体地,所述第二子孔CH22的内壁设置方式可以与所述第一子孔CH21相同,也可以不同。
具体地,所述第一子孔CH21的形成方式可为湿法蚀刻,具体为利用各向同性蚀刻原理,通过添加缓冲液以改变刻蚀液的浓度或通过升高/降低刻蚀的环境温度,控制蚀刻速率,使得第一子孔CH21内壁能够与垂直所述衬底10的方向具有至少一预设夹角。
可以理解的是,通过设置所述第一子孔CH21的内壁与垂直所述衬底10的方向呈至少一预设夹角,且所述第一子孔CH21的直径大于或等于所述第二子孔CH22的直径,使得第一子孔CH21内的导电材料40能够与第一子孔CH21形成物理卡扣的状态,能够进一步增大显示面板与柔性电路板之间的粘附强度。
在一实施例中,如图9和图11所示,所述第一子孔CH21包括靠近所述绑定端子层103的第三开口,以及靠近第二材料子层1022的第四开口,所述第三开口的直径为第三直径H3,所述第四开口的直径为第四直径H4,所述第三开口和所述第四开口之间所述第一子孔CH21的直径为第五直径,且所述第五直径大于所述第三直径H3,所述第五直径大于所述第四直径H4,所述第一子孔CH21的侧壁为弧形侧壁。
具体地,所述第三直径H3和所述第四直径H4的大小可以相等,也可以不等,具体不作限制。
具体地,所述第五直径为第三开口和第四开口之间任一位置的所述第一子孔CH21的直径。
具体地,所述第四开口的直径与所述第二子孔CH22靠近所述第一材料子层1021的一侧的开口的直径相同,使得第一子孔CH21和第二子孔CH22能够圆滑的连接,降低向第二连接孔CH2内填充导电材料40的难度。
可以理解的是,通过设置所述第一子孔CH21包括靠近所述绑定端子层103的第三开口,以及靠近第二材料子层1022的第四开口,所述第三开口的直径为第三直径H3,所述第四开口的直径为第四直径H4,所述第三开口和所述第四开口之间所述第一子孔CH21的直径为第五直径,且所述第五直径大于所述第三直径H3,所述第五直径大于所述第四直径H4,上述设置方式使得第一子孔CH21的内壁直径呈现先增大后减小的趋势,使得第二连接孔CH2内的导电材料40能够形成物理卡扣的状态,能够进一步增大显示面板与柔性电路板之间的粘附强度。
在一实施例中,如图12所示,所述显示面板包括显示区A2和绑定区A1,所述绑定端子层103包括多个绑定端子1031和遮光部1032,多个所述绑定端子1031位于所述绑定区A1,所述遮光部1032位于所述显示区A2,所述驱动器件201包括沟道部,所述遮光部1032至少覆盖所述沟道部。
具体地,所述绑定区A1可以位于所述显示区A2的一侧,所述绑定区A1也可以与所述显示区A2有部分重合。
具体地,所述绑定端子层103包括位于绑定区A1内的绑定端子1031,以及位于所述显示区A2内对应所述驱动器件201的沟道部设置的遮光部1032。
具体地,所述绑定端子1031可以与所述遮光部1032采用同一制程制作,所述绑定端子1031和所述遮光部1032的材料可以相同。
可以理解的是,通过设置所述绑定端子1031与所述遮光部1032同层,能够进一步降低显示面板的生产成本,节约生产步骤,提升生产效率,延长所述驱动器件201的寿命,提升所述驱动器件201的稳定性。
所述显示面板还包括柔性电路板,所述第二连接孔内具有导电材料,所述柔性电路板包括与所述绑定端子相对应的连接端子,所述连接端子与所述绑定端子通过所述第二连接孔内的导电材料电连接。
综上,本申请通过设置显示面板包括衬底10、设置于衬底10上的薄膜晶体管层20,将绑定端子层103设置于第一子层101和第二子层102之间,设置第一子层101和薄膜晶体管层20的绝缘层203上开设有贯穿的第一连接孔CH1,电极走线层202通过第一连接孔CH1与绑定端子层103电连接,在第二子层102上设置贯穿的第二连接孔CH2,使得部分所述绑定端子层103暴露,在与柔性电路板进行背部绑定时,可以在第二连接孔CH2内填充银浆后与柔性电路板上的连接端子电连接,避免了在制造过程中采用机械或激光剥离的手段将薄膜晶体管层20的电极走线层202表面的牺牲层60剥离,降低了产品生产过程中因剥离的应力或激光导致薄膜晶体管层20中部分膜层脱离,发光层30寿命降低的风险。
本实施例提供一种显示装置,所述显示装置包括上述任一实施例中所述的显示面板。
可以理解的是,所述显示面板已经在上述实施例中进行了详细的说明,在此不在重复说明。
在具体应用时,所述显示装置可以为智能手机、平板电脑、笔记本电脑、智能手环、智能手表、智能眼镜、智能头盔、台式机电脑、智能电视或者数码相机等设备的显示屏,甚至可以应用在具有柔性显示屏的电子设备上。
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。
Claims (20)
- 一种显示面板,其中,包括:衬底,包括层叠设置的第一子层和第二子层;薄膜晶体管层,设置于所述第一子层远离所述第二子层的一侧面,所述薄膜晶体管层包括第一绝缘层、第二绝缘层、以及设置于所述第一绝缘层和所述第二绝缘层之间的电极走线层,所述第一绝缘层设置于所述第二绝缘层靠近所述衬底的一侧;其中,所述第一子层和所述第二子层之间设置有一绑定端子层,所述第一绝缘层和所述第一子层上设置有贯穿的第一连接孔,所述第一连接孔设置于所述绑定端子层和所述电极走线层之间,且所述电极走线层通过所述第一连接孔与所述绑定端子层电连接;所述第二子层上设置有第二连接孔,所述第二连接孔暴露至少部分所述绑定端子层。
- 如权利要求1所述的显示面板,其中,所述电极走线层包括多条子走线,所述绑定端子层包括多个间隔设置的绑定端子,一所述子走线连接一所述绑定端子,所述第二连接孔的数量与所述绑定端子的数量相同,一所述第二连接孔对应一所述绑定端子设置。
- 如权利要求1所述的显示面板,其中,所述第二连接孔包括靠近所述绑定端子一侧的第一开口,以及远离所述绑定端子的第二开口,所述第一开口具有第一直径,所述第二开口具有第二直径,所述第一直径和所述第二直径的大小不同,所述第二连接孔的内壁与垂直所述衬底的方向具有第一夹角。
- 如权利要求1所述的显示面板,其中,所述第二连接孔的内壁为粗糙表面,所述第二连接孔内壁的粗糙度Ra范围为0.1~100。
- 如权利要求1所述的显示面板,其中,所述第二连接孔的内壁包括多层沿所述第二连接孔的轴向延伸的阶梯结构或所述第二连接孔的内壁上设置多个凸起。
- 如权利要求1所述的显示面板,其中,所述第二子层包括层叠设置的第一材料子层和第二材料子层,所述第二连接孔包括设置于所述第一材料子层上的第一子孔,以及设置于所述第二材料子层上的第二子孔,所述第一材料子层和所述第二材料子层的材料不同。
- 如权利要求6所述的显示面板,其中,所述第一材料子层位于所述第二材料子层靠近所述绑定端子层的一侧面,所述第一子孔的侧壁与垂直所述衬底的方向具有第二夹角,且所述第一子孔的直径大于或等于所述第二子孔的直径。
- 如权利要求7所述的显示面板,其中,所述第一子孔包括靠近所述绑定端子层的第三开口,以及靠近第二材料子层的第四开口,所述第三开口的直径为第三直径,所述第四开口的直径为第四直径,所述第三开口和所述第四开口之间所述第一子孔的直径为第五直径,且所述第五直径大于所述第三直径,所述第五直径大于所述第四直径,所述第一子孔的侧壁为弧形侧壁。
- 如权利要求1所述的显示面板,其中,所述显示面板包括绑定区和显示区,所述绑定端子层包括多个绑定端子和遮光部,多个所述绑定端子位于所述绑定区,所述遮光部位于所述显示区,所述薄膜晶体管层包括多个驱动器件,所述驱动器件包括沟道部,所述遮光部至少覆盖所述沟道部。
- 如权利要求1所述的显示面板,其中,所述显示面板还包括柔性电路板,所述第二连接孔内具有导电材料,所述柔性电路板包括与所述绑定端子相对应的连接端子,所述连接端子与所述绑定端子通过所述第二连接孔内的导电材料电连接。
- 一种显示装置,其中,所述显示装置包括一显示面板,所述显示面板包括:衬底,包括层叠设置的第一子层和第二子层;薄膜晶体管层,设置于所述第一子层远离所述第二子层的一侧面,所述薄膜晶体管层包括第一绝缘层、第二绝缘层、以及设置于所述第一绝缘层和所述第二绝缘层之间的电极走线层,所述第一绝缘层设置于所述第二绝缘层靠近所述衬底的一侧;其中,所述第一子层和所述第二子层之间设置有一绑定端子层,所述第一绝缘层和所述第一子层上设置有贯穿的第一连接孔,所述第一连接孔设置于所述绑定端子层和所述电极走线层之间,且所述电极走线层通过所述第一连接孔与所述绑定端子层电连接;所述第二子层上设置有第二连接孔,所述第二连接孔暴露至少部分所述绑定端子层。
- 如权利要求11所述的显示装置,其中,所述电极走线层包括多条子走线,所述绑定端子层包括多个间隔设置的绑定端子,一所述子走线连接一所述绑定端子,所述第二连接孔的数量与所述绑定端子的数量相同,一所述第二连接孔对应一所述绑定端子设置。
- 如权利要求11所述的显示装置,其中,所述第二连接孔包括靠近所述绑定端子一侧的第一开口,以及远离所述绑定端子的第二开口,所述第一开口具有第一直径,所述第二开口具有第二直径,所述第一直径和所述第二直径的大小不同,所述第二连接孔的内壁与垂直所述衬底的方向具有第一夹角。
- 如权利要求11所述的显示装置,其中,所述第二连接孔的内壁为粗糙表面,所述第二连接孔内壁的粗糙度Ra范围为0.1~100。
- 如权利要求11所述的显示装置,其中,所述第二连接孔的内壁包括多层沿所述第二连接孔的轴向延伸的阶梯结构或所述第二连接孔的内壁上设置多个凸起。
- 如权利要求11所述的显示装置,其中,所述第二子层包括层叠设置的第一材料子层和第二材料子层,所述第二连接孔包括设置于所述第一材料子层上的第一子孔,以及设置于所述第二材料子层上的第二子孔,所述第一材料子层和所述第二材料子层的材料不同。
- 如权利要求16所述的显示装置,其中,所述第一材料子层位于所述第二材料子层靠近所述绑定端子层的一侧面,所述第一子孔的侧壁与垂直所述衬底的方向具有第二夹角,且所述第一子孔的直径大于或等于所述第二子孔的直径。
- 如权利要求17所述的显示装置,其中,所述第一子孔包括靠近所述绑定端子层的第三开口,以及靠近第二材料子层的第四开口,所述第三开口的直径为第三直径,所述第四开口的直径为第四直径,所述第三开口和所述第四开口之间所述第一子孔的直径为第五直径,且所述第五直径大于所述第三直径,所述第五直径大于所述第四直径,所述第一子孔的侧壁为弧形侧壁。
- 如权利要求11所述的显示装置,其中,所述显示面板包括绑定区和显示区,所述绑定端子层包括多个绑定端子和遮光部,多个所述绑定端子位于所述绑定区,所述遮光部位于所述显示区,所述薄膜晶体管层包括多个驱动器件,所述驱动器件包括沟道部,所述遮光部至少覆盖所述沟道部。
- 如权利要求11所述的显示装置,其中,所述显示面板还包括柔性电路板,所述第二连接孔内具有导电材料,所述柔性电路板包括与所述绑定端子相对应的连接端子,所述连接端子与所述绑定端子通过所述第二连接孔内的导电材料电连接。
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CN111584562A (zh) * | 2020-05-08 | 2020-08-25 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制备方法 |
CN111799240A (zh) * | 2020-07-22 | 2020-10-20 | 京东方科技集团股份有限公司 | 一种显示基板及其制作方法、显示装置及其制作方法 |
CN114171563A (zh) * | 2021-11-30 | 2022-03-11 | 武汉华星光电半导体显示技术有限公司 | 显示面板和显示装置 |
CN114188381A (zh) * | 2021-12-03 | 2022-03-15 | 武汉华星光电半导体显示技术有限公司 | 显示面板及显示装置 |
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US20140326967A1 (en) * | 2013-05-03 | 2014-11-06 | Superc-Touch Corporation | Oled touch display panel structure |
CN111584562A (zh) * | 2020-05-08 | 2020-08-25 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制备方法 |
CN111799240A (zh) * | 2020-07-22 | 2020-10-20 | 京东方科技集团股份有限公司 | 一种显示基板及其制作方法、显示装置及其制作方法 |
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