WO2023044985A1 - 显示面板及电子设备 - Google Patents

显示面板及电子设备 Download PDF

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Publication number
WO2023044985A1
WO2023044985A1 PCT/CN2021/123324 CN2021123324W WO2023044985A1 WO 2023044985 A1 WO2023044985 A1 WO 2023044985A1 CN 2021123324 W CN2021123324 W CN 2021123324W WO 2023044985 A1 WO2023044985 A1 WO 2023044985A1
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WO
WIPO (PCT)
Prior art keywords
power supply
auxiliary electrode
auxiliary
wiring
substrate
Prior art date
Application number
PCT/CN2021/123324
Other languages
English (en)
French (fr)
Inventor
李柱辉
柳铭岗
Original Assignee
惠州华星光电显示有限公司
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠州华星光电显示有限公司, 深圳市华星光电半导体显示技术有限公司 filed Critical 惠州华星光电显示有限公司
Priority to US17/618,425 priority Critical patent/US20240014362A1/en
Publication of WO2023044985A1 publication Critical patent/WO2023044985A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and electronic equipment.
  • the display panel provides a power signal required for normal operation to the pixels in the plane through the power line, so as to realize the screen display function.
  • Embodiments of the present application provide a display panel and electronic equipment to reduce IR Drop on a power line and improve brightness uniformity of the display panel.
  • An embodiment of the present application provides a display panel, which includes:
  • a plurality of power supply lines are arranged on the substrate, the power supply lines extend along the first direction, and are arranged between adjacent light-emitting units, and the power supply lines are connected to the light-emitting units;
  • Auxiliary electrodes arranged on the side of the power supply line close to or away from the substrate;
  • the power supply wiring includes a plurality of wiring sections, each of the wiring sections corresponds to one of the light emitting units, and each of the wiring sections is connected to the auxiliary electrode.
  • the display panel further includes an insulating layer, the insulating layer is arranged between the power supply wiring and the auxiliary electrode, and a through hole is opened in the insulating layer , the trace segment is connected to the auxiliary electrode in the through hole.
  • the opening area of the through hole gradually increases along the first direction.
  • the auxiliary electrode is disposed on the entire surface of the substrate.
  • a plurality of openings are opened in the auxiliary electrode, the extending direction of the openings is perpendicular to the first direction, and the distance between two adjacent openings is along gradually increases along the first direction.
  • the display panel further includes a plurality of auxiliary power supply lines disposed on the substrate, and the plurality of auxiliary power supply lines intersect with the plurality of power supply lines A mesh structure is formed, and the trace segment is connected to the auxiliary electrode at a region where the auxiliary power trace and the power trace intersect.
  • the display panel further includes a driver chip, the driver chip is connected to one side of the substrate, and the power traces and the auxiliary electrodes are connected to the driver chip.
  • the multiple power traces include multiple first power traces and multiple second power traces disposed on the substrate, and the first power traces The line is located on the side of the second power supply line close to the substrate, the first power supply line and the second power supply line both extend along the first direction, and are arranged between adjacent light-emitting units ;
  • the driving chip includes a first driving chip and a second driving chip, both of which are connected to one side of the substrate, and the auxiliary electrodes include a first auxiliary electrode and a second auxiliary electrode.
  • the first auxiliary electrodes are located between the substrate and the first power supply wiring
  • the second auxiliary electrodes are located on the side of the second power supply wiring away from the substrate, the first Both the power supply wiring and the first auxiliary electrode are connected to the first driving chip
  • the second power supply wiring and the second auxiliary electrode are both connected to the second driving chip;
  • the first power supply trace includes a plurality of first trace segments
  • the second power trace includes a plurality of second trace segments, each of the first trace segments and each of the second trace segments Corresponding to one light emitting unit, each of the first wiring segments is connected to the first auxiliary electrode, and each of the second wiring segments is connected to the second auxiliary electrode.
  • the display panel further includes a first insulating layer and a second insulating layer, and the first insulating layer is located between the first auxiliary electrode and the first power supply line. Between, the second insulating layer is located between the second power supply wiring and the second auxiliary electrode, and the light emitting unit is arranged between the second power supply wiring and the second insulating layer;
  • a first through hole is opened in the first insulating layer, and the first wiring segment is connected to the first auxiliary electrode in the first through hole; a second through hole is opened in the second insulating layer , the second wiring segment is connected to the second auxiliary electrode in the second through hole.
  • the first power supply wiring is a positive polarity power supply wiring
  • the second power supply wiring is a negative polarity power supply wiring
  • the display panel further includes a plurality of first auxiliary power supply lines and a plurality of second auxiliary power supply lines arranged on the substrate, the plurality of first auxiliary power supply lines and the plurality of first auxiliary power supply lines Lines intersect to form a first network structure, and multiple second auxiliary power supply lines intersect with multiple second power supply lines to form a second network structure.
  • An embodiment of the present application also provides an electronic device, the electronic device includes a casing and a display panel disposed in the casing, the display panel includes:
  • a plurality of power supply lines are arranged on the substrate, the power supply lines extend along the first direction, and are arranged between adjacent light-emitting units, and the power supply lines are connected to the light-emitting units;
  • Auxiliary electrodes arranged on the side of the power supply line close to or away from the substrate;
  • the power supply wiring includes a plurality of wiring sections, each of the wiring sections corresponds to one of the light emitting units, and each of the wiring sections is connected to the auxiliary electrode.
  • the display panel further includes an insulating layer, the insulating layer is arranged between the power supply wiring and the auxiliary electrode, and a through hole is opened in the insulating layer , the trace segment is connected to the auxiliary electrode in the through hole.
  • the opening area of the through hole gradually increases along the first direction.
  • the auxiliary electrode is disposed on the entire surface of the substrate.
  • a plurality of openings are opened in the auxiliary electrode, the extending direction of the openings is perpendicular to the first direction, and the distance between two adjacent openings is along gradually increases along the first direction.
  • the display panel further includes a plurality of auxiliary power supply lines disposed on the substrate, and the plurality of auxiliary power supply lines intersect with the plurality of power supply lines A mesh structure is formed, and the trace segment is connected to the auxiliary electrode at a region where the auxiliary power trace and the power trace intersect.
  • the display panel further includes a driver chip, the driver chip is connected to one side of the substrate, and the power traces and the auxiliary electrodes are connected to the driver chip.
  • the multiple power traces include multiple first power traces and multiple second power traces disposed on the substrate, and the first power traces The line is located on the side of the second power supply line close to the substrate, the first power supply line and the second power supply line both extend along the first direction, and are arranged between adjacent light-emitting units ;
  • the driving chip includes a first driving chip and a second driving chip, both of which are connected to one side of the substrate, and the auxiliary electrodes include a first auxiliary electrode and a second auxiliary electrode.
  • the first auxiliary electrodes are located between the substrate and the first power supply wiring
  • the second auxiliary electrodes are located on the side of the second power supply wiring away from the substrate, the first Both the power supply wiring and the first auxiliary electrode are connected to the first driving chip
  • the second power supply wiring and the second auxiliary electrode are both connected to the second driving chip;
  • the first power supply trace includes a plurality of first trace segments
  • the second power trace includes a plurality of second trace segments, each of the first trace segments and each of the second trace segments Corresponding to one light emitting unit, each of the first wiring segments is connected to the first auxiliary electrode, and each of the second wiring segments is connected to the second auxiliary electrode.
  • the display panel further includes a first insulating layer and a second insulating layer, and the first insulating layer is located between the first auxiliary electrode and the first power supply line. Between, the second insulating layer is located between the second power supply wiring and the second auxiliary electrode, and the light emitting unit is arranged between the second power supply wiring and the second insulating layer;
  • a first through hole is opened in the first insulating layer, and the first wiring segment is connected to the first auxiliary electrode in the first through hole; a second through hole is opened in the second insulating layer , the second wiring segment is connected to the second auxiliary electrode in the second through hole.
  • the first power supply wiring is a positive polarity power supply wiring
  • the second power supply wiring is a negative polarity power supply wiring
  • the display panel further includes a plurality of first auxiliary power supply lines and a plurality of second auxiliary power supply lines arranged on the substrate, the plurality of first auxiliary power supply lines and the plurality of first auxiliary power supply lines Lines intersect to form a first network structure, and multiple second auxiliary power supply lines intersect with multiple second power supply lines to form a second network structure.
  • the display panel provided by the present application includes a substrate, a plurality of light-emitting units arranged on the substrate, a plurality of power supply lines and auxiliary electrodes, the power supply lines extend along the first direction, and are set Between adjacent light-emitting units, the power supply wiring is connected to the light-emitting unit.
  • the power supply wiring includes a plurality of wiring sections, each wiring section corresponds to a light-emitting unit, and the auxiliary electrode is arranged on the side of the power supply wiring close to or away from the substrate. Each trace segment is connected to the auxiliary electrode.
  • the auxiliary electrodes are arranged in the display panel, and the auxiliary electrodes are connected to the line segments corresponding to each light-emitting unit in the power line, and the impedance of the power line is reduced by using the auxiliary electrode as the parallel resistance of the power line. , reducing the voltage drop of the power wiring during the signal transmission process, thereby improving the brightness uniformity of the display panel and improving the display quality of the display panel.
  • FIG. 1 is a schematic plan view of a display panel provided in a first embodiment of the present application.
  • FIG. 2 is a schematic cross-sectional structure diagram of the display panel provided by the first embodiment of the present application.
  • FIG. 3 is a schematic plan view of the auxiliary electrode in the display panel provided by the second embodiment of the present application.
  • FIG. 4 is a schematic plan view of the structure of the display panel provided by the third embodiment of the present application.
  • FIG. 5 is a schematic diagram of a connection structure between a first power supply line and a first auxiliary electrode in a display panel provided by a fourth embodiment of the present application.
  • FIG. 6 is a schematic diagram of the connection structure between the second power supply line and the second auxiliary electrode in the display panel provided by the fourth embodiment of the present application.
  • FIG. 7 is a schematic cross-sectional structure diagram of a display panel provided by a fourth embodiment of the present application.
  • FIG. 8A to FIG. 8F are schematic flow charts of the manufacturing method of the display panel provided by the fourth embodiment of the present application.
  • Embodiments of the present application provide a display panel and an electronic device. Each will be described in detail below. It should be noted that the description sequence of the following embodiments is not intended to limit the preferred sequence of the embodiments.
  • the present application provides a display panel, which includes a substrate, a plurality of light emitting units, a plurality of power supply lines and auxiliary electrodes arranged on the substrate.
  • the power supply wiring extends along the first direction and is arranged between adjacent light-emitting units, the power supply wiring is connected to the light-emitting unit; the auxiliary electrode is arranged near or far from the power supply wiring One side of the substrate; wherein, the power wiring includes a plurality of wiring segments, each of which corresponds to a light-emitting unit, and each of the wiring segments is connected to the auxiliary electrode.
  • the present application arranges the auxiliary electrodes in the display panel and connects the auxiliary electrodes to the wiring segments corresponding to each light-emitting unit in the power wiring, and uses the auxiliary electrodes as the parallel resistance of the power wiring to reduce the power supply wiring.
  • the impedance of the line reduces the voltage drop of the power line during signal transmission, thereby improving the brightness uniformity of the display panel and improving the display quality of the display panel.
  • the first embodiment of the present application provides a display panel 100 .
  • the display panel 100 includes a substrate 10 , a plurality of light emitting units 11 , a plurality of power lines 12 and auxiliary electrodes 13 disposed on the substrate 10 .
  • the power traces 12 extend along the first direction X.
  • the power wires 12 are disposed between adjacent light emitting units 11 .
  • the power wire 12 is connected to the light emitting unit 11 .
  • the auxiliary electrode 13 is disposed on a side of the power trace 12 away from the substrate 10 .
  • the power trace 12 includes a plurality of trace segments 121 . Each routing segment 121 corresponds to a light emitting unit 11 .
  • Each trace segment 121 is connected to the auxiliary electrode 13 .
  • the auxiliary electrode 13 can also be arranged on the side of the power wiring 12 close to the substrate 10 , and this embodiment only takes the auxiliary electrode 13 arranged on the side of the power wiring 12 away from the substrate 10 as an example. for illustration, but not limitation.
  • the substrate 10 may be a rigid substrate, such as a glass substrate; or, the substrate 10 may also be a flexible substrate, such as a polyimide substrate.
  • the light emitting units 11 are arranged in an array.
  • the light emitting units 11 can also be arranged irregularly, and the arrangement structure of the light emitting units 11 can be set according to the actual situation, which is not limited in this application.
  • the light emitting unit 11 may be an organic light emitting diode, a miniature light emitting diode or a miniature light emitting diode. It should be noted that, the specific structure of the light emitting unit 11 in this application can refer to the prior art, and will not be repeated here.
  • the power supply wiring 12 may be a positive polarity power supply wiring (VDD signal wiring), or may be a negative polarity power supply wiring (VSS signal wiring).
  • Each power trace 12 includes a plurality of trace segments 121 .
  • a plurality of routing segments 121 are arranged along the first direction X. Multiple routing segments 121 are arranged at intervals or connected to each other.
  • a wire segment 121 corresponds to a light emitting unit 11 .
  • the auxiliary electrode 13 is connected to the corresponding wiring segment 121 of each light emitting unit 11 .
  • the display panel 100 further includes an insulating layer 14 .
  • the insulating layer 14 is disposed between the power trace 12 and the auxiliary electrode 13 .
  • the material of the insulating layer 14 may be an organic material, such as an organic resin.
  • a through hole 141 is opened in the insulating layer 14 .
  • the trace segment 121 is connected to the auxiliary electrode 13 in the through hole 141 .
  • the auxiliary electrode 13 is disposed on the entire surface of the substrate 10 .
  • the orthographic projection of the auxiliary electrode 13 on the plane of the substrate 10 completely covers the orthographic projection of the power trace 12 on the plane of the substrate 10 .
  • the above configuration does not require patterning of the auxiliary electrode 13, which can simplify the difficulty of process operation;
  • the auxiliary electrode 13 has a whole-surface structure, the cross-sectional area of the auxiliary electrode 13 on the plane parallel to the substrate 10 Maximizing it can reduce the parallel resistance formed by the auxiliary electrode 13 and the wire segment 121 , thereby further reducing the IR drop on the power wire 12 and further improving the brightness uniformity of the display panel 100 .
  • the display panel 100 also includes a driving chip 15 .
  • the driving chip 15 is connected to one side of the substrate 10 . Both the power wire 12 and the auxiliary electrode 13 are connected to the driving chip 15 . When the end of the power line 12 and the auxiliary electrode 13 close to the driving chip 15 is connected to the power supply voltage from the driving chip 15 , the power signal will be transmitted in the power line 12 and the auxiliary electrode 13 at the same time.
  • the power supply voltage in the auxiliary electrode 13 will compensate the power supply voltage at each line segment 121, that is, the auxiliary electrode 13 will compensate the power supply voltage input by the light emitting unit 11 corresponding to each line segment 121, The power supply voltage of each pixel is compensated, so as to compensate for the IR drop of the power supply wire 12 during signal transmission, so as to improve the brightness uniformity of the display panel 100 .
  • the display panel 100 also includes a power bus 16 and connecting wires 17 arranged on the substrate 10 .
  • the power bus 16 is connected between the driving chip 15 and the power wiring 12 , and is used to transmit the power signal in the driving chip 15 to the power wiring 12 and the auxiliary electrodes 13 .
  • the power bus 16 extends along the second direction Y.
  • the second direction Y is perpendicular to the first direction X.
  • the connection wire 17 is connected between the power bus 16 and the auxiliary electrode 13 , and is used for transmitting the power signal in the power bus 16 to the auxiliary electrode 13 .
  • the connecting traces 17 extend along the first direction X.
  • the orthographic projection of the connection trace 17 on the plane of the substrate 10 is located between the orthographic projections of the adjacent power traces 12 on the plane of the substrate 10 .
  • the openings 131 of the through holes 141 have the same area. Since the wiring segment 121 in the power supply wiring 12 is connected to the auxiliary electrode 13 in the through hole 141, the above arrangement makes each wiring segment 121 have the same contact area with the auxiliary electrode 13, thereby making the overall IR of the display panel 100 The Drop is uniformly reduced, so that the overall brightness of the display panel 100 can be improved.
  • the opening area of the through hole 141 gradually increases along the first direction X, and this setting makes the contact area between the trace segment 121 and the auxiliary electrode 13 gradually increase along the first direction X, thereby matching the first direction X.
  • the IR Drop in one direction X gradually decreases, so that the difference between the IR Drop on the side close to the driver chip 15 and the side away from the driver chip 15 can be further reduced.
  • the display panel 100 may be an organic light emitting diode display panel, a micro light emitting diode display panel or a miniature light emitting diode display panel, and this application does not limit the specific type of the display panel 100 .
  • the second embodiment of the present application provides a display panel 100 , the difference between the display panel 100 provided by the second embodiment and the first embodiment is that a plurality of openings 131 are opened in the auxiliary electrode 13 , and the openings The extending direction of 131 is perpendicular to the first direction X, and the distance between two adjacent openings 131 increases along the first direction X gradually. In the first direction X, the opening 131 is located between two or more adjacent through holes 141 .
  • the opening 131 completely penetrates the auxiliary electrode 13 .
  • the opening 131 may also partially penetrate the auxiliary electrode 13 , which will not be repeated here.
  • the auxiliary electrode 13 is hollowed out, so that the cross-sectional area of the auxiliary electrode 13 gradually increases along the first direction X, so that the parallel resistance formed between the auxiliary electrode 13 and the power supply line 12 is along the first direction X.
  • One direction X gradually decreases, so that the IR drop on the side of the power line 12 close to the driver chip 15 is smaller than the IR drop on the side away from the driver chip 15 Drop lowers the value to be able to lower the IR on the power trace 12 The drop difference can further improve the brightness uniformity of the display panel 100 .
  • auxiliary electrode 13 in the display panel 100 is shown, and other structures in the display panel 100 can refer to the description of the first embodiment above, which will not be repeated here.
  • the third embodiment of the present application provides a display panel 100 .
  • the difference between the display panel 100 provided by the third embodiment of the present application and the first embodiment is that the display panel 100 also includes a plurality of auxiliary power supply lines 18 arranged on the substrate 10, and the plurality of auxiliary power supply lines 18 are connected with the plurality of auxiliary power supply lines 18.
  • the intersection of two power supply lines 12 forms a network structure 20, and the line segment 121 is connected to the auxiliary electrode 13 in the area where the auxiliary power line 18 and the power line 12 intersect, and the through hole 141 is arranged on the auxiliary power line 18 and the power line 12. intersecting areas.
  • the fourth embodiment of the present application provides a display panel 100 .
  • the display panel 100 includes a substrate 10 , a plurality of light emitting units 11 , a plurality of power lines 12 and auxiliary electrodes 13 disposed on the substrate 10 .
  • the power traces 12 extend along the first direction X.
  • the power wires 12 are disposed between adjacent light emitting units 11 .
  • the power wire 12 is connected to the light emitting unit 11 .
  • the auxiliary electrode 13 is disposed on a side of the power trace 12 close to or away from the substrate 10 .
  • the power trace 12 includes a plurality of trace segments 121 . Each routing segment 121 corresponds to a light emitting unit 11 .
  • Each trace segment 121 is connected to the auxiliary electrode 13 .
  • the display panel 100 may be an organic light emitting diode display panel, a micro light emitting diode display panel or a miniature light emitting diode display panel. Not limited to this.
  • the substrate 10 may be a hard substrate, such as a glass substrate; or, the substrate 10 may also be a flexible substrate, such as a polyimide substrate.
  • the light emitting units 11 are arranged in an array.
  • the light emitting units 11 can also be arranged irregularly, and the arrangement structure of the light emitting units 11 can be set according to the actual situation, which is not limited in this application.
  • the light emitting unit 11 may be an organic light emitting diode, a miniature light emitting diode or a miniature light emitting diode. It should be noted that, the specific structure of the light emitting unit 11 in this application can refer to the prior art, and will not be repeated here.
  • the plurality of power traces 12 includes a plurality of first power traces 12 a and a plurality of second power traces 12 b disposed on the substrate 10 .
  • the first power trace 12 a is located on a side of the second power trace 12 b close to the substrate 10 .
  • Both the first power supply trace 12a and the second power supply trace 12b extend along the first direction X.
  • Both the first power supply wiring 12 a and the second power supply wiring 12 b are arranged between adjacent light emitting units 11 . In the first direction X, the plurality of light emitting units 11 are respectively connected to a first power supply line 12a and a second power supply line 12b.
  • the first power supply wiring 12a is a positive polarity power supply wiring (VDD signal wiring).
  • the second power supply wiring 12b is a negative polarity power supply wiring (VSS signal wiring).
  • the first power supply wiring 12a may also be a VSS signal wiring, and the second power supply wiring 12b is a VDD signal wiring, which is not limited in this application.
  • the auxiliary electrodes 13 include a first auxiliary electrode 13a and a second auxiliary electrode 13b.
  • the first auxiliary electrode 13a is located between the substrate 10 and the first power line 12a.
  • the second auxiliary electrode 13 b is located on a side of the second power supply line 12 b away from the substrate 10 .
  • Each first power trace 12a includes a plurality of first trace segments 121a.
  • the multiple first routing segments 121a are arranged at intervals or connected to each other.
  • the multiple first routing segments 121a are arranged along the first direction X.
  • Each first routing segment 121 a corresponds to a light emitting unit 11 .
  • the first auxiliary electrode 13 a is connected to the first wiring segment 121 a corresponding to each light emitting unit 11 .
  • the display panel 100 also includes a first insulating layer 14a.
  • the first insulating layer 14a is located between the first auxiliary electrode 13a and the first power line 12a.
  • a first through hole 141a is opened in the first insulating layer 14a.
  • the first wiring segment 121a is connected to the first auxiliary electrode 13a in the first through hole 141a.
  • Each second power trace 12b includes a plurality of second trace segments 121b.
  • the multiple second routing segments 121b are arranged at intervals or connected to each other.
  • the plurality of second routing segments 121b are arranged along the first direction X.
  • Each second routing segment 121b corresponds to a light emitting unit 11 .
  • the second auxiliary electrode 13b is connected to the second wiring segment 121b corresponding to each light emitting unit 11 .
  • the display panel 100 also includes a second insulating layer 14b.
  • the second insulating layer 14b is located between the second auxiliary electrode 13b and the second power line 12b.
  • a second through hole 141b is opened in the second insulating layer 14b.
  • the second wiring segment 121b is connected to the second auxiliary electrode 13b in the second through hole 141b.
  • the openings 131 of the first through holes 141a in the first insulating layer 14a have the same area.
  • the openings 131 of the second through holes 141b in the second insulating layer 14b have the same area.
  • the above setting makes each first wiring segment 121a and the first auxiliary electrode 13a, and each second wiring segment 121b and the second auxiliary electrode 13b have the same contact area, thereby making the overall IR of the display panel 100 The Drop is uniformly reduced, so that the overall brightness of the display panel 100 can be improved.
  • both the first auxiliary electrode 13 a and the second auxiliary electrode 13 b have a solid surface structure.
  • the orthographic projection of the first auxiliary electrode 13a on the plane of the substrate 10 completely covers the orthographic projection of the first power line 12a on the plane of the substrate 10
  • the orthographic projection of the second auxiliary electrode 13b on the plane of the substrate 10 completely covers the first power line 12a.
  • the above arrangement does not require patterning of the first auxiliary electrode 13a and the second auxiliary electrode 13b, which can simplify the difficulty of process operation; , the cross-sectional areas of the first auxiliary electrode 13a and the second auxiliary electrode 13b on the plane parallel to the substrate 10 are maximized, which can reduce the parallel resistance formed by the first auxiliary electrode 13a and the first wiring segment 121a, And the parallel resistance formed by the second auxiliary electrode 13b and the second wire segment 121b can further reduce the IR drop on the first power wire 12a and the second power wire 12b.
  • the display panel 100 further includes a driving chip 15 .
  • the driving chip 15 includes a first driving chip 151 and a second driving chip 152 . Both the first driving chip 151 and the second driving chip 152 are connected to one side of the substrate 10 .
  • the first power line 12a and the first auxiliary electrode 13a are both connected to the first driving chip 151, when the end of the first power line 12a and the first auxiliary electrode 13a close to the first driving chip 151 is connected to the first driving chip 151 After the VDD voltage of the chip 151 , the VDD signal will be transmitted in the first power line 12a and the first auxiliary electrode 13a at the same time.
  • the VDD voltage in the first auxiliary electrode 13a will compensate the VDD voltage at each first wiring segment 121a, that is, the first auxiliary electrode 13a will compensate for each first auxiliary electrode 13a
  • the VDD voltage input by the light emitting unit 11 corresponding to the wiring segment 121a is compensated, thereby compensating for the IR drop of the first power supply wiring 12a during the VDD signal transmission process, so as to improve the brightness uniformity of the display panel 100 .
  • Both the second power supply wiring 12b and the second auxiliary electrode 13b are connected to the second driving chip 152.
  • the VSS signal will be transmitted in the second power supply line 12b and the second auxiliary electrode 13b at the same time.
  • the VSS voltage in the second auxiliary electrode 13b will compensate the VSS voltage at each second wiring segment 121b, that is, the second auxiliary electrode 13b will compensate for each second
  • the VSS voltage input by the light-emitting unit 11 corresponding to the wiring segment 121b is compensated, thereby compensating for the IR drop of the second power supply wiring 12b during the VSS signal transmission process, so as to improve the brightness uniformity of the display panel 100 .
  • the display panel 100 further includes a first power bus 161 and a second power bus 162 disposed on the substrate 10 .
  • the first power bus 161 is connected between the first driver chip 151 and the first power wire 12a for transmitting the VDD signal in the first driver chip 151 to the first power wire 12a and the first auxiliary electrode 13a.
  • the first power bus 161 extends along the second direction Y.
  • the second direction Y is perpendicular to the first direction X.
  • a first connection wire 171 is connected between the first power bus 161 and the first auxiliary electrode 13a.
  • the first connecting wire 171 is used to transmit the VDD signal in the first power bus 161 to the first auxiliary electrode 13a.
  • the first connection trace 171 extends along the first direction X.
  • the orthographic projection of the first connection trace 171 on the plane of the substrate 10 is located between the orthographic projections of the adjacent first power traces 12 a on the plane of the substrate 10 .
  • the second power bus 162 is connected between the second driver chip 152 and the second power wire 12b for transmitting the VSS signal in the second driver chip 152 to the second power wire 12b and the second auxiliary electrode 13b.
  • the second power bus 162 extends along the second direction Y.
  • a second connection wire 172 is connected between the second power bus 162 and the second auxiliary electrode 13b.
  • the second connecting wire 172 is used to transmit the VSS signal in the second power bus 162 to the second auxiliary electrode 13b.
  • the second connection trace 172 extends along the first direction X.
  • the orthographic projection of the second connection trace 172 on the plane of the substrate 10 is located between the orthographic projections of the adjacent second power traces 12 b on the plane of the substrate 10 .
  • the display panel 100 further includes a plurality of first auxiliary power lines 181 and a plurality of second auxiliary power lines 182 disposed on the substrate 10 .
  • a plurality of first auxiliary power lines 181 intersect with a plurality of first power lines 12 a to form a first mesh structure 21 .
  • the first wiring segment 121a is connected to the first auxiliary electrode 13a at the intersection area of the first auxiliary power supply wiring 181 and the first power supply wiring 12a.
  • the first through hole 141a is disposed in the intersection area of the first auxiliary power line 181 and the first power line 12a.
  • the plurality of second auxiliary power supply lines 182 intersect with the plurality of second power supply lines 12b to form a second mesh structure 22 .
  • the second wire segment 121b is connected to the second auxiliary electrode 13b at the intersection area of the second auxiliary power wire 182 and the second power wire 12b.
  • the second through hole 141b is disposed in the intersection area of the second auxiliary power supply trace 182 and the second power supply trace 12b.
  • the present application also provides a method for manufacturing a display panel 100 according to the fourth embodiment, which includes the following steps:
  • B1 Provide a substrate 10, and form a first auxiliary electrode 13a on the substrate 10, as shown in FIG. 8A.
  • the substrate 10 is a glass substrate.
  • the first auxiliary electrode 13a may be a transparent electrode.
  • the material of the first auxiliary electrode 13a may be metal, such as one or more selected from copper, aluminum, silver, molybdenum and titanium.
  • the first insulating layer 14a is a planarization layer.
  • the material of the first insulating layer 14a may be an organic material, such as an organic resin.
  • step B4 it also includes the step of: transferring the light-emitting unit 11 to the substrate 10, and connecting the VDD input end of the light-emitting unit 11 to the first power supply line 12a, and connecting the VSS input end of the light-emitting unit 11 to the second power supply
  • the wiring 12b is connected (not shown in the figure).
  • B5 Form a second insulating layer 14b on the second power line 12b, and open a second through hole 141b in the second insulating layer 14b, as shown in FIG. 8E .
  • the second insulating layer 14b is a planarization layer.
  • the material of the second insulating layer 14b may be an organic material, such as an organic resin.
  • the second auxiliary electrode 13b may be a transparent electrode.
  • the material of the second auxiliary electrode 13b may be metal, such as one or more selected from copper, aluminum, silver, molybdenum and titanium.
  • step B4 and step B5 a step of forming a thin film transistor is also included, and the relevant technology and structure can refer to the current technology, and will not be repeated here.
  • the above manufacturing method only illustrates the structure of one pixel region in the display panel 100 , but it should not be construed as a limitation to the present application.
  • this embodiment can improve the performance of the display panel without adding additional processes. IR Drop, thereby improving the display quality of the display panel 100 .
  • the embodiment of the present application also provides an electronic device, and the electronic device may be a display device such as a mobile phone, a tablet, a notebook computer, and a television.
  • the electronic device includes a housing and a display panel disposed in the housing.
  • the display panel may be the display panel 100 described in any one of the foregoing embodiments. For the specific structure of the display panel 100 , reference may be made to the description of the foregoing embodiments, and details are not repeated here.

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Abstract

一种显示面板及电子设备。显示面板（100）包括基板（10）和设置在基板上（10）的多个发光单元（11）、多条电源走线（12）以及辅助电极（13）；电源走线（12）沿第一方向（X）延伸，且设置于相邻发光单元（11）之间，电源走线（12）连接于发光单元（11）；辅助电极（13）设置在电源走线（12）靠近或远离基板（10）的一侧；电源走线（12）包括多个走线段（121），每一走线段（121）对应于一发光单元（11），每一走线（121）段均连接于辅助电极（13）。

Description

显示面板及电子设备 技术领域
本申请涉及显示技术领域，具体涉及一种显示面板及电子设备。
 背景技术
显示面板通过电源线向面内的像素提供正常工作所需的电源信号，以实现画面显示功能。
 技术问题
然而，由于电源线自身电阻的影响，自靠近驱动芯片的一端向远离驱动芯片的一端，随着电源线上阻抗的增加，在电源信号的传输过程中，电源线上会产生明显的欧姆电压降（IR Drop），导致显示面板产生亮度不均现象，降低了显示面板的显示品质。
 技术解决方案
本申请实施例提供一种显示面板及电子设备，以降低电源线上的IR Drop，提高显示面板的亮度均匀性。
本申请实施例提供一种显示面板，其包括：
基板；
多个发光单元，设置在所述基板上；
多条电源走线，设置在所述基板上，所述电源走线沿第一方向延伸，且设置于相邻所述发光单元之间，所述电源走线连接于所述发光单元；以及
辅助电极，设置在所述电源走线靠近或远离所述基板的一侧；
其中，所述电源走线包括多个走线段，每一所述走线段对应于一所述发光单元，每一所述走线段均连接于所述辅助电极。
可选的，在本申请的一些实施例中，所述显示面板还包括绝缘层，所述绝缘层设置在所述电源走线与所述辅助电极之间，所述绝缘层中开设有通孔，所述走线段与所述辅助电极在所述通孔内连接。
可选的，在本申请的一些实施例中，所述通孔的开孔面积沿着所述第一方向逐渐增大。
可选的，在本申请的一些实施例中，所述辅助电极整面设置于所述基板上。
可选的，在本申请的一些实施例中，所述辅助电极中开设有多个开口，所述开口的延伸方向与所述第一方向垂直，相邻两个所述开口之间的距离沿着所述第一方向逐渐增大。
可选的，在本申请的一些实施例中，所述显示面板还包括设置在所述基板上的多条辅助电源走线，多条所述辅助电源走线与多条所述电源走线相交形成网状结构，所述走线段与所述辅助电极在所述辅助电源走线和所述电源走线相交的区域相连。
可选的，在本申请的一些实施例中，所述显示面板还包括驱动芯片，所述驱动芯片连接于所述基板的一侧，所述电源走线和所述辅助电极均连接于所述驱动芯片。
可选的，在本申请的一些实施例中，多条所述电源走线包括设置在所述基板上的多条第一电源走线和多条第二电源走线，所述第一电源走线位于第二电源走线靠近所述基板的一侧，所述第一电源走线和所述第二电源走线均沿所述第一方向延伸，且设置于相邻所述发光单元之间；
所述驱动芯片包括第一驱动芯片和第二驱动芯片，所述第一驱动芯片和所述第二驱动芯片均连接于所述基板的一侧，所述辅助电极包括第一辅助电极和第二辅助电极，所述第一辅助电极位于所述基板和所述第一电源走线之间，所述第二辅助电极位于所述第二电源走线远离所述基板的一侧，所述第一电源走线和所述第一辅助电极均连接于所述第一驱动芯片，所述第二电源走线和所述第二辅助电极均连接于所述第二驱动芯片；
其中，所述第一电源走线包括多个第一走线段，所述第二电源走线包括多个第二走线段，每一所述第一走线段和每一所述第二走线段均对应于一所述发光单元，每一所述第一走线段均连接于所述第一辅助电极，每一所述第二走线段均连接于所述第二辅助电极。
可选的，在本申请的一些实施例中，所述显示面板还包括第一绝缘层和第二绝缘层，所述第一绝缘层位于所述第一辅助电极与所述第一电源走线之间，所述第二绝缘层位于所述第二电源走线和所述第二辅助电极之间，所述发光单元设置在所述第二电源走线与所述第二绝缘层之间；
所述第一绝缘层中开设有第一通孔，所述第一走线段与所述第一辅助电极在所述第一通孔内连接；所述第二绝缘层中开设有第二通孔，所述第二走线段与所述第二辅助电极在所述第二通孔内连接。
可选的，在本申请的一些实施例中，所述第一电源走线为正极性电源走线，所述第二电源走线为负极性电源走线；和/或
所述显示面板还包括设置在所述基板上的多条第一辅助电源走线和多条第二辅助电源走线，多条所述第一辅助电源走线与多条所述第一电源走线相交形成第一网状结构，多条所述第二辅助电源走线与多条所述第二电源走线相交形成第二网状结构。
本申请实施例还提供一种电子设备，所述电子设备包括壳体和设置在所述壳体中的显示面板，所述显示面板包括：
基板；
多个发光单元，设置在所述基板上；
多条电源走线，设置在所述基板上，所述电源走线沿第一方向延伸，且设置于相邻所述发光单元之间，所述电源走线连接于所述发光单元；以及
辅助电极，设置在所述电源走线靠近或远离所述基板的一侧；
其中，所述电源走线包括多个走线段，每一所述走线段对应于一所述发光单元，每一所述走线段均连接于所述辅助电极。
可选的，在本申请的一些实施例中，所述显示面板还包括绝缘层，所述绝缘层设置在所述电源走线与所述辅助电极之间，所述绝缘层中开设有通孔，所述走线段与所述辅助电极在所述通孔内连接。
可选的，在本申请的一些实施例中，所述通孔的开孔面积沿着所述第一方向逐渐增大。
可选的，在本申请的一些实施例中，所述辅助电极整面设置于所述基板上。
可选的，在本申请的一些实施例中，所述辅助电极中开设有多个开口，所述开口的延伸方向与所述第一方向垂直，相邻两个所述开口之间的距离沿着所述第一方向逐渐增大。
可选的，在本申请的一些实施例中，所述显示面板还包括设置在所述基板上的多条辅助电源走线，多条所述辅助电源走线与多条所述电源走线相交形成网状结构，所述走线段与所述辅助电极在所述辅助电源走线和所述电源走线相交的区域相连。
可选的，在本申请的一些实施例中，所述显示面板还包括驱动芯片，所述驱动芯片连接于所述基板的一侧，所述电源走线和所述辅助电极均连接于所述驱动芯片。
可选的，在本申请的一些实施例中，多条所述电源走线包括设置在所述基板上的多条第一电源走线和多条第二电源走线，所述第一电源走线位于第二电源走线靠近所述基板的一侧，所述第一电源走线和所述第二电源走线均沿所述第一方向延伸，且设置于相邻所述发光单元之间；
所述驱动芯片包括第一驱动芯片和第二驱动芯片，所述第一驱动芯片和所述第二驱动芯片均连接于所述基板的一侧，所述辅助电极包括第一辅助电极和第二辅助电极，所述第一辅助电极位于所述基板和所述第一电源走线之间，所述第二辅助电极位于所述第二电源走线远离所述基板的一侧，所述第一电源走线和所述第一辅助电极均连接于所述第一驱动芯片，所述第二电源走线和所述第二辅助电极均连接于所述第二驱动芯片；
其中，所述第一电源走线包括多个第一走线段，所述第二电源走线包括多个第二走线段，每一所述第一走线段和每一所述第二走线段均对应于一所述发光单元，每一所述第一走线段均连接于所述第一辅助电极，每一所述第二走线段均连接于所述第二辅助电极。
可选的，在本申请的一些实施例中，所述显示面板还包括第一绝缘层和第二绝缘层，所述第一绝缘层位于所述第一辅助电极与所述第一电源走线之间，所述第二绝缘层位于所述第二电源走线和所述第二辅助电极之间，所述发光单元设置在所述第二电源走线与所述第二绝缘层之间；
所述第一绝缘层中开设有第一通孔，所述第一走线段与所述第一辅助电极在所述第一通孔内连接；所述第二绝缘层中开设有第二通孔，所述第二走线段与所述第二辅助电极在所述第二通孔内连接。
可选的，在本申请的一些实施例中，所述第一电源走线为正极性电源走线，所述第二电源走线为负极性电源走线；和/或
所述显示面板还包括设置在所述基板上的多条第一辅助电源走线和多条第二辅助电源走线，多条所述第一辅助电源走线与多条所述第一电源走线相交形成第一网状结构，多条所述第二辅助电源走线与多条所述第二电源走线相交形成第二网状结构。
 有益效果
相较于现有技术中的显示面板，本申请提供的显示面板包括基板和设置在基板上的多个发光单元、多条电源走线以及辅助电极，电源走线沿第一方向延伸，且设置于相邻发光单元之间，电源走线连接于发光单元，电源走线包括多个走线段，每一走线段对应于一发光单元，辅助电极设置在电源走线靠近或远离基板的一侧，每一走线段均连接于辅助电极。本申请通过在显示面板中设置辅助电极，并使辅助电极与电源走线中对应于每一发光单元的走线段连接，通过以辅助电极作为电源走线的并联电阻，降低了电源走线的阻抗，减小了电源走线在信号传输过程中的电压降，从而提高了显示面板的亮度均匀性，提升了显示面板的显示品质。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请第一实施例提供的显示面板的平面结构示意图。
图2是本申请第一实施例提供的显示面板的截面结构示意图。
图3是本申请第二实施例提供的显示面板中的辅助电极的平面结构示意图。
图4是本申请第三实施例提供的显示面板的平面结构示意图。
图5是本申请第四实施例提供的显示面板中的第一电源走线与第一辅助电极的连接结构示意图。
图6是本申请第四实施例提供的显示面板中的第二电源走线与第二辅助电极的连接结构示意图。
图7是本申请第四实施例提供的显示面板的截面结构示意图。
图8A至图8F是本申请第四实施例提供的显示面板的制备方法的流程结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。此外，应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。在本申请中，在未作相反说明的情况下，使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下，具体为附图中的图面方向；而“内”和“外”则是针对装置的轮廓而言的。
本申请实施例提供一种显示面板及电子设备。以下分别进行详细说明。需说明的是，以下实施例的描述顺序不作为对实施例优选顺序的限定。
本申请提供一种显示面板，其包括基板和设置在所述基板上的多个发光单元、多条电源走线以及辅助电极。所述电源走线沿第一方向延伸，且设置于相邻所述发光单元之间，所述电源走线连接于所述发光单元；所述辅助电极设置在所述电源走线靠近或远离所述基板的一侧；其中，所述电源走线包括多个走线段，每一所述走线段对应于一所述发光单元，每一所述走线段均连接于所述辅助电极。
由此，本申请通过在显示面板中设置辅助电极，并使辅助电极与电源走线中对应于每一发光单元的走线段连接，通过以辅助电极作为电源走线的并联电阻，降低了电源走线的阻抗，减小了电源走线在信号传输过程中的电压降，从而提高了显示面板的亮度均匀性，提升了显示面板的显示品质。
下面通过具体实施例对本申请提供的显示面板进行详细的阐述。
请参照图1和图2，本申请第一实施例提供一种显示面板100。显示面板100包括基板10和设置在基板10上的多个发光单元11、多条电源走线12以及辅助电极13。电源走线12沿第一方向X延伸。电源走线12设置于相邻发光单元11之间。电源走线12连接于发光单元11。辅助电极13设置在电源走线12远离基板10的一侧。电源走线12包括多个走线段121。每一走线段121对应于一发光单元11。每一走线段121均连接于辅助电极13。
需要说明的是，在本申请中，辅助电极13还可以设置在电源走线12靠近基板10的一侧，本实施例仅以辅助电极13设置在电源走线12远离基板10的一侧为例进行说明，但并不限于此。
基板10可以为硬质基板，如可以为玻璃基板；或者，基板10还可以为柔性基板，如可以为聚酰亚胺基板。
发光单元11呈阵列排布。在一些实施例中，当显示面板100为异形显示时，发光单元11还可以呈不规则排布，发光单元11的排布结构可以根据实际情况进行设定，本申请对此不作限定。其中，发光单元11可以为有机发光二极管、微型发光二极管或者迷你型发光二极管。需要说明的是，本申请中发光单元11的具体结构可以参照现有技术，在此不再赘述。
在第一方向X上，多个发光单元11连接于一条电源走线12。其中，电源走线12可以为正极性电源走线（VDD信号走线），也可以为负极性电源走线（VSS信号走线）。每一电源走线12均包括多个走线段121。多个走线段121沿第一方向X排列。多个走线段121间隔设置或者相互连接。一走线段121对应于一发光单元11。辅助电极13与每一发光单元11对应的走线段121相连。
结合图1和图2，显示面板100还包括绝缘层14。绝缘层14设置在电源走线12与辅助电极13之间。其中，绝缘层14的材料可以为有机材料，如可以为有机树脂。绝缘层14中开设有通孔141。走线段121与辅助电极13在通孔141内连接。
在本实施例中，辅助电极13整面设置于基板10上。具体来说，辅助电极13于基板10所在平面的正投影完全覆盖电源走线12于基板10所在平面的正投影。一方面，上述设置无需对辅助电极13进行图案化处理，可以简化工艺操作难度；另一方面，当辅助电极13为整面结构时，辅助电极13在平行于基板10所在平面上的横截面积达到最大化，能够减小辅助电极13和走线段121形成的并联电阻值，从而能够进一步降低电源走线12上的IR Drop，进一步提高显示面板100的亮度均匀性。
显示面板100还包括驱动芯片15。驱动芯片15连接于基板10的一侧。电源走线12和辅助电极13均连接于驱动芯片15。当电源走线12和辅助电极13靠近驱动芯片15的一端接入来自驱动芯片15的电源电压之后，电源信号会同时在电源走线12和辅助电极13中传输。虽然，在第一方向X上，随着电源走线12自身阻抗的增加，电源电压在传输过程中会受到损耗而产生IR Drop，但由于电源走线12中的走线段121与辅助电极13连通，因此，辅助电极13中的电源电压会对每一走线段121处的电源电压进行补偿，也即，辅助电极13会对每一走线段121对应的发光单元11所输入的电源电压进行补偿，使得每一像素的电源电压得到补偿，从而能够弥补电源走线12在信号传输过程中的IR Drop，以提高显示面板100的亮度均匀性。
具体的，显示面板100还包括设置在基板10上的电源总线16和连接走线17。电源总线16连接于驱动芯片15与电源走线12之间，用于将驱动芯片15中的电源信号传输至电源走线12和辅助电极13中。电源总线16沿第二方向Y延伸。第二方向Y与第一方向X垂直。连接走线17连接于电源总线16和辅助电极13之间，用于将电源总线16中的电源信号传输至辅助电极13中。连接走线17沿第一方向X延伸。连接走线17于基板10所在平面的正投影位于相邻电源走线12于基板10所在平面的正投影之间。
在本实施例中，通孔141的开口131面积相同。由于电源走线12中的走线段121与辅助电极13在通孔141内连接，因此，上述设置使得每一走线段121与辅助电极13均有相同的接触面积，进而使得显示面板100整体的IR Drop均匀降低，从而能够提升显示面板100的整体亮度。在一些实施例中，通孔141的开孔面积沿着第一方向X逐渐增大，该设置使得走线段121与辅助电极13沿第一方向X上的接触面积逐渐增大，进而能够匹配第一方向X上IR Drop逐渐降低的情况，从而可以进一步降低靠近驱动芯片15一侧和远离驱动芯片15一侧的IR Drop之间的差异。
需要说明的是，显示面板100可以为有机发光二极管显示面板、微型发光二极管显示面板或迷你型发光二极管显示面板，本申请对显示面板100的具体类型不作限定。
请参照图3，本申请第二实施例提供一种显示面板100，第二实施例提供的显示面板100与第一实施例的不同之处在于：辅助电极13中开设有多个开口131，开口131的延伸方向与第一方向X垂直，相邻两个开口131之间的距离沿着第一方向X逐渐增大。在第一方向X上，开口131位于相邻两个或多个通孔141之间。
需要说明的是，在本实施例中，开口131完全贯穿辅助电极13。在一些实施例中，开口131也可以部分贯穿辅助电极13，在此不再赘述。
本实施例通过将辅助电极13进行镂空设计，使得辅助电极13的横截面积沿着第一方向X逐渐增大，进而使得辅助电极13与电源走线12之间形成的并联电阻值沿着第一方向X逐渐减小，由此使得电源走线12靠近驱动芯片15一侧的IR Drop降低值小于远离驱动芯片15一侧的IR Drop降低值，从而能够降低电源走线12上的IR Drop差异，进而可以进一步提高显示面板100的亮度均匀性。
需要说明的是，本实施例中仅示意出了显示面板100中辅助电极13的结构，显示面板100中的其他结构可以参照前述第一实施例的描述，在此不再赘述。
请参照图4，本申请第三实施例提供一种显示面板100。本申请第三实施例提供的显示面板100与第一实施例的不同之处在于：显示面板100还包括设置在基板10上的多条辅助电源走线18，多条辅助电源走线18与多条电源走线12相交形成网状结构20，走线段121与辅助电极13在辅助电源走线18和电源走线12相交的区域相连，通孔141设置在辅助电源走线18和电源走线12相交的区域。
请参照图5至图7，本申请第四实施例提供一种显示面板100。显示面板100包括基板10和设置在基板10上的多个发光单元11、多条电源走线12以及辅助电极13。电源走线12沿第一方向X延伸。电源走线12设置于相邻发光单元11之间。电源走线12连接于发光单元11。辅助电极13设置在电源走线12靠近或远离基板10的一侧。电源走线12包括多个走线段121。每一走线段121对应于一发光单元11。每一走线段121均连接于辅助电极13。
需要说明的是，显示面板100可以为有机发光二极管显示面板、微型发光二极管显示面板或迷你型发光二极管显示面板，本实施例仅以显示面板100为微型发光二极管显示面板为例进行说明，但并不限于此。
具体的，基板10可以为硬质基板，如可以为玻璃基板；或者，基板10还可以为柔性基板，如可以为聚酰亚胺基板。
发光单元11呈阵列排布。在一些实施例中，当显示面板100为异形显示时，发光单元11还可以呈不规则排布，发光单元11的排布结构可以根据实际情况进行设定，本申请对此不作限定。其中，发光单元11可以为有机发光二极管、微型发光二极管或者迷你型发光二极管。需要说明的是，本申请中发光单元11的具体结构可以参照现有技术，在此不再赘述。
多条电源走线12包括设置在基板10上的多条第一电源走线12a和多条第二电源走线12b。第一电源走线12a位于第二电源走线12b靠近基板10的一侧。第一电源走线12a和第二电源走线12b均沿第一方向X延伸。第一电源走线12a和第二电源走线12b均设置于相邻发光单元11之间。在第一方向X上，多个发光单元11分别连接于一条第一电源走线12a和一条第二电源走线12b。
在本实施例中，第一电源走线12a为正极性电源走线（VDD信号走线）。第二电源走线12b为负极性电源走线（VSS信号走线）。在一些实施例中，第一电源走线12a也可以为VSS信号走线，第二电源走线12b为VDD信号走线，本申请对此不作限定。
辅助电极13包括第一辅助电极13a和第二辅助电极13b。第一辅助电极13a位于基板10和第一电源走线12a之间。第二辅助电极13b位于第二电源走线12b远离基板10的一侧。
每一第一电源走线12a包括多个第一走线段121a。多个第一走线段121a间隔设置或者相互连接。多个第一走线段121a沿第一方向X排列。每一第一走线段121a对应于一发光单元11。第一辅助电极13a与每一发光单元11对应的第一走线段121a相连。显示面板100还包括第一绝缘层14a。第一绝缘层14a位于第一辅助电极13a和第一电源走线12a之间。第一绝缘层14a中开设有第一通孔141a。第一走线段121a与第一辅助电极13a在第一通孔141a内连接。
每一第二电源走线12b包括多个第二走线段121b。多个第二走线段121b间隔设置或者相互连接。多个第二走线段121b沿第一方向X排列。每一第二走线段121b对应于一发光单元11。第二辅助电极13b与每一发光单元11对应的第二走线段121b相连。显示面板100还包括第二绝缘层14b。第二绝缘层14b位于第二辅助电极13b和第二电源走线12b之间。第二绝缘层14b中开设有第二通孔141b。第二走线段121b与第二辅助电极13b在第二通孔141b内连接。
需要说明的是，在本实施例中，第一绝缘层14a中第一通孔141a的开口131面积相同。第二绝缘层14b中第二通孔141b的开口131面积相同。上述设置使得每一第一走线段121a与第一辅助电极13a、以及每一第二走线段121b与第二辅助电极13b均有相同的接触面积，进而使得显示面板100整体的IR Drop均匀降低，从而能够提升显示面板100的整体亮度。
如图5和图6所示，在本实施例中，第一辅助电极13a和第二辅助电极13b均为整面结构。具体来说，第一辅助电极13a于基板10所在平面的正投影完全覆盖第一电源走线12a于基板10所在平面的正投影，第二辅助电极13b于基板10所在平面的正投影完全覆盖第二电源走线12b于基板10所在平面的正投影。
一方面，上述设置无需对第一辅助电极13a和第二辅助电极13b进行图案化处理，可以简化工艺操作难度；另一方面，当第一辅助电极13a和第二辅助电极13b均为整面结构时，第一辅助电极13a和第二辅助电极13b在平行于基板10所在平面上的横截面积均达到最大化，能够减小第一辅助电极13a和第一走线段121a形成的并联电阻值、以及第二辅助电极13b和第二走线段121b形成的并联电阻值，从而能够进一步降低第一电源走线12a及第二电源走线12b上的IR Drop。
在本实施例中，显示面板100还包括驱动芯片15。驱动芯片15包括第一驱动芯片151和第二驱动芯片152。第一驱动芯片151和第二驱动芯片152均连接于基板10的一侧。
其中，第一电源走线12a和第一辅助电极13a均连接于第一驱动芯片151，当第一电源走线12a和第一辅助电极13a靠近第一驱动芯片151的一端接入来自第一驱动芯片151的VDD电压之后，VDD信号会同时在第一电源走线12a和第一辅助电极13a中传输。虽然，在第一方向X上，随着第一电源走线12a自身阻抗的增加，VDD电压在传输过程中会受到损耗而产生IR Drop，但由于第一电源走线12a中的第一走线段121a与第一辅助电极13a连通，因此，第一辅助电极13a中的VDD电压会对每一第一走线段121a处的VDD电压进行补偿，也即，第一辅助电极13a会对每一第一走线段121a对应的发光单元11所输入的VDD电压进行补偿，进而能够弥补第一电源走线12a在VDD信号传输过程中的IR Drop，以提高显示面板100的亮度均匀性。
第二电源走线12b和第二辅助电极13b均连接于第二驱动芯片152，当第二电源走线12b和第二辅助电极13b靠近第二驱动芯片152的一端接入来自第二驱动芯片152的VSS电压之后，VSS信号会同时在第二电源走线12b和第二辅助电极13b中传输。虽然，在第一方向X上，随着第二电源走线12b自身阻抗的增加，VSS电压在传输过程中会受到损耗而产生IR Drop，但由于第二电源走线12b中的第二走线段121b与第二辅助电极13b连通，因此，第二辅助电极13b中的VSS电压会对每一第二走线段121b处的VSS电压进行补偿，也即，第二辅助电极13b会对每一第二走线段121b对应的发光单元11所输入的VSS电压进行补偿，进而能够弥补第二电源走线12b在VSS信号传输过程中的IR Drop，以提高显示面板100的亮度均匀性。
具体的，显示面板100还包括设置在基板10上的第一电源总线161和第二电源总线162。第一电源总线161连接于第一驱动芯片151与第一电源走线12a之间，用于将第一驱动芯片151中的VDD信号传输至第一电源走线12a和第一辅助电极13a中。第一电源总线161沿第二方向Y延伸。第二方向Y与第一方向X垂直。第一电源总线161和第一辅助电极13a之间连接有第一连接走线171。第一连接走线171用于将第一电源总线161中的VDD信号传输至第一辅助电极13a中。第一连接走线171沿第一方向X延伸。第一连接走线171于基板10所在平面的正投影位于相邻第一电源走线12a于基板10所在平面的正投影之间。
第二电源总线162连接于第二驱动芯片152与第二电源走线12b之间，用于将第二驱动芯片152中的VSS信号传输至第二电源走线12b和第二辅助电极13b中。第二电源总线162沿第二方向Y延伸。第二电源总线162和第二辅助电极13b之间连接有第二连接走线172。第二连接走线172用于将第二电源总线162中的VSS信号传输至第二辅助电极13b中。第二连接走线172沿第一方向X延伸。第二连接走线172于基板10所在平面的正投影位于相邻第二电源走线12b于基板10所在平面的正投影之间。
在本实施例，显示面板100还包括设置在基板10上的多条第一辅助电源走线181和多条第二辅助电源走线182。多条第一辅助电源走线181与多条第一电源走线12a相交形成第一网状结构21。第一走线段121a与第一辅助电极13a在第一辅助电源走线181和第一电源走线12a相交的区域相连。第一通孔141a设置在第一辅助电源走线181和第一电源走线12a相交的区域。多条第二辅助电源走线182与多条第二电源走线12b相交形成第二网状结构22。第二走线段121b与第二辅助电极13b在第二辅助电源走线182和第二电源走线12b相交的区域相连。第二通孔141b设置在第二辅助电源走线182和第二电源走线12b相交的区域。
请参照图8A至图8F，本申请还提供一种如第四实施例所述的显示面板100的制备方法，其包括以下步骤：
B1：提供一基板10，并在基板10上形成第一辅助电极13a，如图8A所示。
其中，基板10为玻璃基板。第一辅助电极13a可以为透明电极。第一辅助电极13a的材料可以为金属，如可以选自铜、铝、银、钼和钛中的一种或多种。
B2：在第一辅助电极13a上形成第一绝缘层14a，并在第一绝缘层14a中开设第一通孔141a，如图8B所示。
其中，第一绝缘层14a为平坦化层。第一绝缘层14a的材料可以为有机材料，如可以为有机树脂。
B3：在第一绝缘层14a上形成第一电源走线12a，如图8C所示。
B4：在第一电源走线12a上形成第二电源走线12b，如图8D所示。
在步骤B4之后，还包括步骤：将发光单元11转移至基板10上，并使发光单元11的VDD接入端与第一电源走线12a连接，发光单元11的VSS接入端与第二电源走线12b连接（图中未示出）。
B5：在第二电源走线12b上形成第二绝缘层14b，并在第二绝缘层14b中开设第二通孔141b，如图8E所示。
其中，第二绝缘层14b为平坦化层。第二绝缘层14b的材料可以为有机材料，如可以为有机树脂。
B6：在第二绝缘层14b上形成第二辅助电极13b，如图8F所示。
其中，第二辅助电极13b可以为透明电极。第二辅助电极13b的材料可以为金属，如可以选自铜、铝、银、钼和钛中的一种或多种。
由此，便完成了本实施例的显示面板100的制备方法。
需要说明的是，在步骤B4和步骤B5的制备过程中，还包括形成薄膜晶体管的步骤，相关技术及结构均可以参照现在技术，在此不再赘述。另外，为方便描述本实施例，上述制备方法中仅示意出了显示面板100中一个像素区的结构，但不能理解为对本申请的限制。
由于本实施例中第一辅助电极13a和第二辅助电极13b的制备工艺均可以采用现有显示面板100的制程工艺，因此，本实施例在不增加额外制程的基础上，能够改善显示面板的IR Drop，从而提升显示面板100的显示品质。
本申请实施例还提供一种电子设备，所述电子设备可以为手机、平板、笔记本电脑以及电视等显示设备。所述电子设备包括壳体和设置在所述壳体中的显示面板。所述显示面板可以为前述任一实施例所述的显示面板100。显示面板100的具体结构可以参照前述实施例的描述，在此不再赘述。
以上对本申请实施例所提供的一种显示面板及电子设备进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种显示面板，其包括：
    基板；
    多个发光单元，设置在所述基板上；
    多条电源走线，设置在所述基板上，所述电源走线沿第一方向延伸，且设置于相邻所述发光单元之间，所述电源走线连接于所述发光单元；以及
    辅助电极，设置在所述电源走线靠近或远离所述基板的一侧；
    其中，所述电源走线包括多个走线段，每一所述走线段对应于一所述发光单元，每一所述走线段均连接于所述辅助电极。
  2. 根据权利要求1所述的显示面板，其中，所述显示面板还包括绝缘层，所述绝缘层设置在所述电源走线与所述辅助电极之间，所述绝缘层中开设有通孔，所述走线段与所述辅助电极在所述通孔内连接。
  3. 根据权利要求2所述的显示面板，其中，所述通孔的开孔面积沿着所述第一方向逐渐增大。
  4. 根据权利要求1所述的显示面板，其中，所述辅助电极整面设置于所述基板上。
  5. 根据权利要求1所述的显示面板，其中，所述辅助电极中开设有多个开口，所述开口的延伸方向与所述第一方向垂直，相邻两个所述开口之间的距离沿着所述第一方向逐渐增大。
  6. 根据权利要求1所述的显示面板，其中，所述显示面板还包括设置在所述基板上的多条辅助电源走线，多条所述辅助电源走线与多条所述电源走线相交形成网状结构，所述走线段与所述辅助电极在所述辅助电源走线和所述电源走线相交的区域相连。
  7. 根据权利要求1所述的显示面板，其中，所述显示面板还包括驱动芯片，所述驱动芯片连接于所述基板的一侧，所述电源走线和所述辅助电极均连接于所述驱动芯片。
  8. 根据权利要求7所述的显示面板，其中，多条所述电源走线包括设置在所述基板上的多条第一电源走线和多条第二电源走线，所述第一电源走线位于第二电源走线靠近所述基板的一侧，所述第一电源走线和所述第二电源走线均沿所述第一方向延伸，且设置于相邻所述发光单元之间；
    所述驱动芯片包括第一驱动芯片和第二驱动芯片，所述第一驱动芯片和所述第二驱动芯片均连接于所述基板的一侧，所述辅助电极包括第一辅助电极和第二辅助电极，所述第一辅助电极位于所述基板和所述第一电源走线之间，所述第二辅助电极位于所述第二电源走线远离所述基板的一侧，所述第一电源走线和所述第一辅助电极均连接于所述第一驱动芯片，所述第二电源走线和所述第二辅助电极均连接于所述第二驱动芯片；
    其中，所述第一电源走线包括多个第一走线段，所述第二电源走线包括多个第二走线段，每一所述第一走线段和每一所述第二走线段均对应于一所述发光单元，每一所述第一走线段均连接于所述第一辅助电极，每一所述第二走线段均连接于所述第二辅助电极。
  9. 根据权利要求8所述的显示面板，其中，所述显示面板还包括第一绝缘层和第二绝缘层，所述第一绝缘层位于所述第一辅助电极与所述第一电源走线之间，所述第二绝缘层位于所述第二电源走线和所述第二辅助电极之间；
    所述第一绝缘层中开设有第一通孔，所述第一走线段与所述第一辅助电极在所述第一通孔内连接；所述第二绝缘层中开设有第二通孔，所述第二走线段与所述第二辅助电极在所述第二通孔内连接。
  10. 根据权利要求8所述的显示面板，其中，所述第一电源走线为正极性电源走线，所述第二电源走线为负极性电源走线；和/或
    所述显示面板还包括设置在所述基板上的多条第一辅助电源走线和多条第二辅助电源走线，多条所述第一辅助电源走线与多条所述第一电源走线相交形成第一网状结构，多条所述第二辅助电源走线与多条所述第二电源走线相交形成第二网状结构。
  11. 一种电子设备，其中，所述电子设备包括壳体和设置在所述壳体中的显示面板，所述显示面板包括：
    基板；
    多个发光单元，设置在所述基板上；
    多条电源走线，设置在所述基板上，所述电源走线沿第一方向延伸，且设置于相邻所述发光单元之间，所述电源走线连接于所述发光单元；以及
    辅助电极，设置在所述电源走线靠近或远离所述基板的一侧；
    其中，所述电源走线包括多个走线段，每一所述走线段对应于一所述发光单元，每一所述走线段均连接于所述辅助电极。
  12. 根据权利要求11所述的电子设备，其中，所述显示面板还包括绝缘层，所述绝缘层设置在所述电源走线与所述辅助电极之间，所述绝缘层中开设有通孔，所述走线段与所述辅助电极在所述通孔内连接。
  13. 根据权利要求12所述的电子设备，其中，所述通孔的开孔面积沿着所述第一方向逐渐增大。
  14. 根据权利要求11所述的电子设备，其中，所述辅助电极整面设置于所述基板上。
  15. 根据权利要求11所述的电子设备，其中，所述辅助电极中开设有多个开口，所述开口的延伸方向与所述第一方向垂直，相邻两个所述开口之间的距离沿着所述第一方向逐渐增大。
  16. 根据权利要求11所述的电子设备，其中，所述显示面板还包括设置在所述基板上的多条辅助电源走线，多条所述辅助电源走线与多条所述电源走线相交形成网状结构，所述走线段与所述辅助电极在所述辅助电源走线和所述电源走线相交的区域相连。
  17. 根据权利要求11所述的电子设备，其中，所述显示面板还包括驱动芯片，所述驱动芯片连接于所述基板的一侧，所述电源走线和所述辅助电极均连接于所述驱动芯片。
  18. 根据权利要求17所述的电子设备，其中，多条所述电源走线包括设置在所述基板上的多条第一电源走线和多条第二电源走线，所述第一电源走线位于第二电源走线靠近所述基板的一侧，所述第一电源走线和所述第二电源走线均沿所述第一方向延伸，且设置于相邻所述发光单元之间；
    所述驱动芯片包括第一驱动芯片和第二驱动芯片，所述第一驱动芯片和所述第二驱动芯片均连接于所述基板的一侧，所述辅助电极包括第一辅助电极和第二辅助电极，所述第一辅助电极位于所述基板和所述第一电源走线之间，所述第二辅助电极位于所述第二电源走线远离所述基板的一侧，所述第一电源走线和所述第一辅助电极均连接于所述第一驱动芯片，所述第二电源走线和所述第二辅助电极均连接于所述第二驱动芯片；
    其中，所述第一电源走线包括多个第一走线段，所述第二电源走线包括多个第二走线段，每一所述第一走线段和每一所述第二走线段均对应于一所述发光单元，每一所述第一走线段均连接于所述第一辅助电极，每一所述第二走线段均连接于所述第二辅助电极。
  19. 根据权利要求18所述的电子设备，其中，所述显示面板还包括第一绝缘层和第二绝缘层，所述第一绝缘层位于所述第一辅助电极与所述第一电源走线之间，所述第二绝缘层位于所述第二电源走线和所述第二辅助电极之间；
    所述第一绝缘层中开设有第一通孔，所述第一走线段与所述第一辅助电极在所述第一通孔内连接；所述第二绝缘层中开设有第二通孔，所述第二走线段与所述第二辅助电极在所述第二通孔内连接。
  20. 根据权利要求18所述的电子设备，其中，所述第一电源走线为正极性电源走线，所述第二电源走线为负极性电源走线；和/或
    所述显示面板还包括设置在所述基板上的多条第一辅助电源走线和多条第二辅助电源走线，多条所述第一辅助电源走线与多条所述第一电源走线相交形成第一网状结构，多条所述第二辅助电源走线与多条所述第二电源走线相交形成第二网状结构。
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