WO2024077875A1 - 3d nand结构片的选择性蚀刻液 - Google Patents

3d nand结构片的选择性蚀刻液 Download PDF

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WO2024077875A1
WO2024077875A1 PCT/CN2023/083387 CN2023083387W WO2024077875A1 WO 2024077875 A1 WO2024077875 A1 WO 2024077875A1 CN 2023083387 W CN2023083387 W CN 2023083387W WO 2024077875 A1 WO2024077875 A1 WO 2024077875A1
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etching solution
silicon oxide
silicon
etching
silicon nitride
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French (fr)
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李少平
贺兆波
冯帆
叶瑞
张庭
班昌胜
冯凯
王书萍
彭飞
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湖北兴福电子材料股份有限公司
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    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/53—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone involving the removal of at least part of the materials of the treated article, e.g. etching, drying of hardened concrete
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/04—Etching, surface-brightening or pickling compositions containing an inorganic acid
    • C09K13/06—Etching, surface-brightening or pickling compositions containing an inorganic acid with organic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention belongs to the field of electronic chemicals, and in particular relates to a selective etching solution for silicon oxide and silicon nitride.
  • 3D NAND is an important process technology in flash memory chips. It uses vertical stacking technology to build more storage units in a smaller space, thereby obtaining more storage data units, which is three times that of similar NAND technologies and is also the mainstream trend of current development.
  • the etching solution is required to have a high selectivity for silicon oxide, so that it can slightly etch the silicon oxide while etching the silicon nitride.
  • the silicate content in the solution increases, when a certain silicon content is reached, silicon will form back adhesion on the silicon oxide layer, and at the same time increase the particle size on the surface of the silicon wafer, resulting in unqualified electrical performance of the finished product and a decrease in chip yield.
  • the technical problem solved by the present invention is to provide a selective etching solution for silicon oxide and silicon nitride, which can inhibit and stabilize the etching of silicon oxide as the silicon content increases, reduce the back adhesion of the silicon oxide surface, maintain the etching rate of silicon nitride, and adapt to the etching of NAND structure.
  • the present invention relates to a selective etching solution for silicon oxide and silicon nitride, wherein the etching solution comprises 1.5-2.0% by mass of a silane additive 1, 2.0-2.5% by mass of a silane additive 2, 83-86% by mass of phosphoric acid, and the remainder being water.
  • the selective etching solution of the present invention comprises a silane coupling agent 1 which is one of 3-glycidyloxypropyltrimethoxysilane, diethoxy(3-glycidyloxypropyl)methylsilane and triethoxy(3-epoxypropyloxypropyl)silane.
  • silane coupling agent 1 The main function of silane coupling agent 1 is to adjust the selectivity ratio of silicon nitride and silicon oxide. Its mechanism of action is that the silane coupling agent is hydrolyzed in phosphoric acid. Due to the chemical bonds of the silicon-oxygen-silicon structure, it can adhere to the surface of silicon oxide. At the same time, due to the larger end group, it can bring a larger steric hindrance effect, which hinders the etching of the silicon oxide surface by phosphoric acid and water. The synergistic effect of these two effects inhibits the etching of silicon oxide.
  • the selective etching solution of the present invention comprises a silane coupling agent 2 which is 2-cyanoethyltriethoxysilane, isocyanate One of propyltriethoxysilane and ureapropyltriethoxysilane.
  • silane coupling agent 2 The main function of silane coupling agent 2 is to prevent silicic acid from adhering to the surface of silicon oxide. Since the hydrolysis of carbon-nitrogen bonds forms chemical bonds such as hydroxyl and carboxyl groups that are highly water-soluble, silane coupling agent 2 can combine with silicic acid to prevent it from adhering to the surface of silicon oxide. Since silane coupling agent 1 can effectively adhere to the surface of silicon oxide, after combining with silicic acid, it is easier to adhere to the surface of silicon oxide. Then, silane coupling agent 2 can act with silane coupling agent 1 to reduce its ability to adhere to the surface of silicon oxide. When the silicon content in the solution is high, the etching of silicon oxide can also achieve the effect of forward etching.
  • the content of phosphoric acid and water has a great influence on the initial etching rate of silicon oxide and silicon nitride, that is, the higher the phosphoric acid content, the lower the water content, the faster the silicon oxide etching rate, and the lower the phosphoric acid content, the more water content, the faster the silicon nitride etching rate.
  • too high a phosphoric acid concentration is likely to cause the silane coupling agent to dehydrate and carbonize, thereby becoming ineffective, and the etching rate of silicon oxide will increase rapidly, while too low a phosphoric acid concentration cannot meet the requirement of stable water content for high-temperature etching.
  • the mass content ratio of phosphoric acid to water in the etching solution of the present invention is 6-8, preferably 7-7.5.
  • the 3D NAND structure sheet is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride film is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the present invention provides a method for preparing a selective etching solution for a 3D NAND structure wafer, wherein silane coupling agents A and B are evenly mixed at room temperature, and the mixture is added together into a phosphoric acid solution to obtain an etching solution.
  • the temperature of the phosphoric acid solution is preheated to 80-100°C; after the silane coupling agents A and B are evenly mixed and added to the 80-100°C phosphoric acid solution, the temperature is again raised to 110-120°C, kept warm for 0.5-1h, and cooled to room temperature to obtain an etching solution.
  • the gel block phenomenon is easy to be realized. If the silane coupling agents A and B are mixed evenly in proportion and added to the phosphoric acid aqueous solution at room temperature, and then slowly heated to 80-100°C, more preferably 80°C, 90°C, 100°C, the formed gel block may not completely disappear but be mixed in the formed mixed solution. After further increasing to 110-120°C, it can be ensured that the formed etching solution is completely dissolved, and further heated to 110°C or 120°C.
  • the mass content of the silane coupling agent A is 1.5-2.0%;
  • the mass content of B of the silane coupling agent is 2.0-2.5%;
  • the mass content of phosphoric acid is 83-86%; the rest is water; the mass content ratio of phosphoric acid to water in the etching solution is 6-8, preferably 7-7.5;
  • the silane additive 1 is one of 3-glycidyloxypropyltrimethoxysilane, diethoxy(3-glycidyloxypropyl)methylsilane and triethoxy(3-epoxypropyloxypropyl)silane;
  • the silane additive 2 is 2-cyanoethyl triethoxysilane, isocyanate propyl triethoxysilane, urea propyl triethoxysilane, A type of silane.
  • the 3D NAND structure sheet is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride film is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the present invention provides a method for etching a 3D NAND structure wafer using a selective etching solution for a 3D NAND structure wafer, characterized in that a stacked structure of a silicon oxide film and a silicon nitride film is etched in a selective etching solution at a working temperature of 156-164°C, more preferably 160 ⁇ 0.5°C.
  • the etching rate of silicon nitride and silicon oxide increase as the temperature increases, but the etching rate of silicon oxide increases more than that of silicon nitride, and the etching selectivity decreases.
  • the selectivity increases as the temperature decreases, but silicon oxide is prone to sticking back.
  • Selective etching solution includes the following raw materials:
  • the mass content of the silane coupling agent A is 1.5-2.0%;
  • the mass content of B of the silane coupling agent is 2.0-2.5%;
  • the mass content of phosphoric acid is 83-86%; the rest is water; the mass content ratio of phosphoric acid to water in the etching solution is 6-8, preferably 7-7.5;
  • the silane additive 1 is one of 3-glycidyloxypropyltrimethoxysilane, diethoxy(3-glycidyloxypropyl)methylsilane and triethoxy(3-epoxypropyloxypropyl)silane;
  • the silane additive 2 is one of 2-cyanoethyltriethoxysilane, isocyanatepropyltriethoxysilane and ureapropyltriethoxysilane;
  • the 3D NAND structure sheet is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride film is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the 3D NAND structure sheet is a stacked structure of silicon oxide film and silicon nitride film, and the film thickness of the silicon nitride film is The thickness of the silicon oxide film is The number of layers of the stacked structure is 150-250.
  • the silicon content during the etching process is 0-500ppm
  • the silicon nitride etching rate is greater than The silicon oxide etch rate is less than The selectivity ratio of silicon nitride/silicon oxide etching rate is greater than 2500;
  • the silicon nitride etching rate is greater than Silicon oxide etching rate is greater than
  • the present invention slices silicon oxide and silicon nitride and then performs etching experiments.
  • the present invention selected the sliced 3D NAND structure wafer for etching experiment.
  • the reagents and raw materials used in the present invention can be purchased on the market.
  • the present invention provides an etching solution that is selective for silicon nitride and silicon oxide, and has a longer etching life while inhibiting silicon oxide etching.
  • the initial etching rate of the etching solution of the present invention on silicon nitride is greater than The etching selectivity ratio is greater than 2500.
  • the etching solution of the present invention broadens the etching life and silicon content window of the solution through the hydrolyzed groups with good water solubility, and mainly achieves the effect of positive etching of silicon oxide by preventing the back adhesion of silicate.
  • the etching rate of silicon nitride is greater than Silicon oxide etching rate is greater than
  • the etching solution of the present invention can be used to etch a 192-layer 3D NAND structure wafer with a clear and complete tooth structure and no adhesion between layers. At a silicon content of 300 ppm, there is no re-adhesion of the silicon oxide layer.
  • Figure 1 is a SEM image of the 3D NAND structure wafer after etching in Example 3 with a silicon content of 0 ppm.
  • Figure 2 is a SEM image of the 3D NAND structure wafer after etching in Example 3 with a silicon content of 100 ppm.
  • Figure 3 is a SEM image of the 3D NAND structure wafer after etching in Example 3 with a silicon content of 200 ppm.
  • Figure 4 is a SEM image of the 3D NAND structure wafer after etching in Example 3 with a silicon content of 300ppm.
  • Figure 5 is a SEM image of the 3D NAND structure wafer after etching in comparative example 1 with a silicon content of 300ppm.
  • silane coupling agents 1 and 2 At room temperature, mix silane coupling agents 1 and 2 in proportion and add them to a phosphorus solution with a concentration of about 86.5% at 80°C.
  • a phosphorus solution with a concentration of about 86.5% at 80°C.
  • the silane coupling agent After the silane coupling agent is completely dissolved in the phosphoric acid, heat it to 120°C and keep it for 1 hour, and finally cool it to room temperature.
  • Etching wafer silicon oxide film and silicon nitride film; the deposition thickness of the two film materials on the silicon semiconductor wafer is and During the test, the slices were cut into 1.5cm*3cm strips.
  • Etching time 3600s for silicon oxide film etching and 300s for silicon nitride film etching.
  • Etching rate calculation method Use ellipsometry to detect the thickness of silicon oxide and silicon nitride films before and after etching. The difference between the initial thickness and the thickness after etching divided by the etching time is the etching rate.
  • the etching selectivity is the ratio of the silicon nitride etching rate (SiN E/R) to the silicon oxide etching rate (SiO E/R).
  • the silicon content in the etching solution gradually increases, and the etching of silicon oxide and silicon nitride is inhibited.
  • the initial silicon content of the etching solution is 0ppm, and silicon nitride is dissolved therein to prepare etching solutions with silicon contents of 100ppm, 200ppm, and 300ppm, and the etching rates and selectivity of silicon oxide and silicon nitride are tested respectively to characterize the life of the etching solution.
  • Etching experiment 3D NAND structure wafers were etched using etching solutions with silicon content of 0ppm, 100ppm, 200ppm, and 300ppm respectively.
  • the etching conditions were the same as the rate test, and the etching time was 20min.
  • Detection method Take high-resolution SEM images of the cross-section of the 3D NAND structure to analyze the etching effect and re-adhesion.
  • Examples 1-11 and Comparative Examples 1-7 are shown in Table 1, wherein the contents of phosphoric acid and silane coupling agent are expressed in mass percentage, and the balance is water.
  • Example 11 due to the low boiling point, unstable boiling conditions, long heating time, and evaporation of part of the water, the experimental conditions could not be stable, and the initial selection ratio of Example 10 could not meet the corresponding requirements.
  • the ratio of Example 1 is more preferred.
  • the overall experiment is mainly carried out around the ratio of Example 1.
  • the silane coupling agent 1 in Comparative Examples 1-3 has a higher initial selectivity, but as the silicon content continues to increase, its silicon oxide etching rate decreases rapidly, and when the silicon content reaches 300ppm, a sticking phenomenon occurs; the silane coupling agent 2 in Comparative Examples 4-6 does not have a good initial selectivity, but maintains positive etching while the silicon content continues to increase; Examples 1-9 combine the advantages of the two silanes, and the silicon oxide etching rate is maintained at 0-300ppm in the silicon content. The etching rate of silicon nitride is maintained at In Examples 10 and 11, the mass fraction ratio of phosphoric acid to water is adjusted.
  • Example 11 When the mass fraction ratio of phosphoric acid to water is less than 7, Example 11 has unstable boiling of the solution during etching, which is not conducive to actual manufacturing. When the mass fraction ratio of phosphoric acid to water is greater than 8, the etching rate of silicon oxide in Example 10 is too fast, and the selectivity cannot meet the requirements of this patent.
  • the ratio is preferably 7-7.5, which can stabilize the etching results.
  • Example 3 From the SEM image of the structure wafer, it can be seen that in Example 3, at a silicon content of 300ppm, the 192-layer 3D NAND structure wafer after etching still shows a clear tooth structure without adhesion, and there is no back-adhesion phenomenon in the silicon oxide layer, which is significantly improved compared to the pure phosphoric acid etching result.
  • other embodiments can achieve similar etching effects on the structure wafer under the condition of 0-300ppm.
  • the drawings of Examples 1, 2, 3-9 are similar to the drawings of Example 3.
  • the drawings of Comparative Examples 1-3 at 300ppm are similar to the drawings of Comparative Example 1.

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Abstract

本发明提供了一种3D NAND结构片的选择性蚀刻液。该蚀刻液包括磷酸、硅烷添加剂1、硅烷添加剂2、其他为水。本发明的蚀刻液对氧化硅膜与氮化硅膜具有蚀刻选择性，能够选择性地去除氮化硅膜，提升蚀刻液寿命且能适应叠层结构的蚀刻。

Description

3D NAND结构片的选择性蚀刻液 技术领域
本发明属于电子化学品领域，具体涉及一种氧化硅和氮化硅的选择性蚀刻液。
技术背景
3D NAND是闪存芯片中重要的工艺技术，通过垂直叠层的技术在更小的空间内搭建更多的存储单元，使得获得更多的存储数据单元，是同类NAND技术中的3倍，也是目前发展的主流趋势。
但是，在蚀刻液对192层的3D NAND结构蚀刻过程中，由于是氧化硅和氮化硅交替叠层的结构，所以在蚀刻氮化硅的同时，会对氧化硅造成一定程度上的蚀刻。所以要求蚀刻液对氧化硅具有较高的选择性，则在蚀刻氮化硅的同时，对氧化硅具有轻微蚀刻。在蚀刻过程中，随着溶液中的硅酸含量增加，当到达一定硅含量后，会在氧化硅层上形成硅的回粘，同时增加了硅片表面的颗粒度，造成成品的电性能不合格，芯片良率的下降。
为了解决上述问题，需要在磷酸中添加复合添加剂，可以随着硅含量的提升，抑制并稳定氧化硅的蚀刻，减少氧化硅表面的回粘，同时维持氮化硅的蚀刻速率。
发明内容
本发明解决的技术问题是提供了一种氧化硅和氮化硅的选择性蚀刻液，可以随着硅含量的提升，抑制并稳定氧化硅的蚀刻，减少氧化硅表面的回粘，同时维持氮化硅的蚀刻速率，并且适应NAND结构的蚀刻。
一方面，本发明涉及一种一种氧化硅和氮化硅的选择性蚀刻液，所述蚀刻液的组成为1.5-2.0％质量含量的硅烷添加剂1，2.0-2.5％质量含量的硅烷添加剂2，83-86％质量含量的磷酸，其余为水。
本发明所涉及的选择性蚀刻液，其硅烷偶联剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种。
硅烷偶联剂1主要作用是调控氮化硅和氧化硅的选择比，其作用机理是硅烷偶联剂在磷酸中水解，由于硅氧硅结构的化学键可以附着在的氧化硅的表面，同时由于较大端基可以带来较大的空间位阻效应，阻碍了磷酸和水对氧化硅表面的蚀刻，这样两种效应的协同抑制了氧化硅的蚀刻。
本发明所涉及的选择性蚀刻液，其硅烷偶联剂2为2-氰乙基三乙氧基硅烷、异氰酸 丙基三乙氧基硅烷、脲丙基三乙氧基硅烷中的一种。
硅烷偶联剂2的主要作用是防止硅酸回粘到氧化硅的表面，由于碳氮键的水解形成较强水溶性的羟基与羧基等化学键，所以硅烷偶联剂2可以结合硅酸防止其回粘到氧化硅的表面；由于硅烷偶联剂1可以有效附着在氧化硅的表面，硅酸与之结合后，更易粘附在氧化硅表面，进而硅烷偶联剂2可以和硅烷偶联剂1作用，减少其附着在氧化硅表面的能力，当溶液中的硅含量较高时，使氧化硅的蚀刻也能达到正向蚀刻的效果。
本发明的蚀刻液中，磷酸和水的含量对氧化硅及氮化硅的初始蚀刻速率影响较大，即磷酸含量越高，水含量越少，氧化硅蚀刻速率越快，而磷酸含量越低，水含量越多，氮化硅蚀刻速率越快。但过高的磷酸浓度易导致硅烷偶联剂脱水碳化从而失效，并且氧化硅的蚀刻速率会快速提高，而过低的磷酸浓度无法满足高温蚀刻水含量稳定的需求。
则本发明所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5。
所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
另一方面，本发明提供一种3D NAND结构片的选择性蚀刻液的配置方法，在室温下将硅烷偶联剂A和B混合均匀，一同加入到磷酸溶液中，得到蚀刻液。
磷酸溶液的温度预先升温至80-100℃；将硅烷偶联剂A和B混合均匀后一同加入到80-100℃磷酸溶液后，再次升温至110-120℃，保温0.5-1h，冷却至室温得到蚀刻液。
所述配置过程中，如果是常温条件下进行配置，则容易实现凝胶的块状现象，而如果将硅烷偶联剂A和B按比例混合均匀后加入到常温磷酸水溶液中，在缓慢升温至80-100℃，进一步优选为80℃、90℃、100℃，则形成的凝胶块状可能并不能完全实现消失而混合在形成的混合液中。进一步提升至110-120℃后，能够保证形成的蚀刻液完全溶解，进一步升温至110℃、或120℃。
所述的硅烷偶联剂A的质量含量为1.5-2.0％；
硅烷偶联剂的B质量含量为2.0-2.5％；
磷酸的质量含量为83-86％；其余为水；所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5；
所述的硅烷添加剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种；
所述的硅烷添加剂2为2-氰乙基三乙氧基硅烷、异氰酸丙基三乙氧基硅烷、脲丙基三乙氧基 硅烷中的一种。
所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
又一方面，本发明提供一种3D NAND结构片的选择性蚀刻液蚀刻3D NAND结构片的方法，其特征在于，将氧化硅膜和氮化硅膜的层叠结构在选择性蚀刻液中，在工作温度为156-164℃下进行蚀刻，进一步优选为160±0.5℃。本发明的蚀刻液，温度升高氮化硅及氧化硅蚀刻速率均增大，但氧化硅蚀刻速率提升比例较氮化硅更大，蚀刻选择比减小。温度降低选择比增大，但容易出现氧化硅回粘。
选择性蚀刻液包括如下原料：
所述的硅烷偶联剂A的质量含量为1.5-2.0％；
硅烷偶联剂的B质量含量为2.0-2.5％；
磷酸的质量含量为83-86％；其余为水；所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5；
所述的硅烷添加剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种；
所述的硅烷添加剂2为2-氰乙基三乙氧基硅烷、异氰酸丙基三乙氧基硅烷、脲丙基三乙氧基硅烷中的一种；
所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
所述蚀刻过程中硅含量为0-500ppm，
所述蚀刻液的蚀刻液在外加硅含量在0ppm时，氮化硅蚀刻速率大于氧化硅蚀刻速率小于氮化硅/氧化硅蚀刻速率的选择比大于2500；
所述蚀刻液的蚀刻液在外加硅含量在300ppm时，氮化硅蚀刻速率大于氧化硅蚀刻速率大于
本发明为了验证选择性蚀刻液的蚀刻效果，是通过将氧化硅和氮化硅切片后再进行蚀刻实验的。
本发明为了验证选择性蚀刻液的对叠层结构的蚀刻效果，选用的是切片后的3D NAND结构片进行蚀刻实验。
本发明所用的试剂和原料均可以在市面上购得。
在符合本领域常识的基础上，上述各优选条件的组合，即可得本发明蚀刻效果较佳的实例。
本发明的优点在于：相较于现有技术，本发明提供了一种对氮化硅和氧化硅具有选择性的蚀刻液，在抑制氧化硅蚀刻地同时具有较高的蚀刻寿命。
(1)本发明蚀刻液对氮化硅的初始蚀刻速率大于蚀刻选择比大于2500。
(2)本发明蚀刻液通过水溶性较好的水解基团拓宽了溶液的蚀刻寿命和硅含量窗口，主要通过防止硅酸的回粘达到氧化硅的正向蚀刻的效果，在300ppm硅含量下氮化硅蚀刻速率大于氧化硅蚀刻速率大于
(3)本发明的蚀刻液可用于蚀刻192层3D NAND结构片，齿状结构清晰完整，层间无粘连，300ppm硅含量下氧化硅层无回粘出现。
附图说明
图1为实施例3在硅含量0ppm的情况下3D NAND结构片被蚀刻后的SEM图像。
图2为实施例3在硅含量100ppm的情况下3D NAND结构片被蚀刻后的SEM图像。
图3为实施例3在硅含量200ppm的情况下3D NAND结构片被蚀刻后的SEM图像。
图4为实施例3在硅含量300ppm的情况下3D NAND结构片被蚀刻后的SEM图像。
图5为对比例1在硅含量300ppm的情况下3D NAND结构片被蚀刻后的SEM图像。
具体实施方法
下面将结合本发明的具体实施例，对本发明实施例中的技术方案进行清楚、完整的描述，所述的实施例仅仅是本发明的一部分实施例，而不是全部实施例。基于本发明中实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本发明的保护范围。
1、蚀刻液的配制
在室温下先将硅烷偶联剂1和2按比例混合均匀，一同加入到80℃浓度约为86.5％的磷 酸水溶液中，待硅烷偶联剂完全溶于磷酸后升温至120℃保温1h，最后冷却至室温即可。
2、蚀刻实验
2.1蚀刻速率的检测方法
蚀刻圆晶：氧化硅膜和氮化硅膜；两种膜材料在硅半导体晶片上的沉积厚度分别为和在测试时均切片为1.5cm*3cm的长条状。
蚀刻温度：160±0.5℃。
蚀刻时间：氧化硅膜蚀刻3600s，氮化硅膜蚀刻300s。
蚀刻速率计算方法：使用椭圆偏振光谱仪检测蚀刻前后氧化硅及氮化硅膜厚度，初始厚度与时刻后厚度之差除以蚀刻时间即蚀刻速率。蚀刻选择比为氮化硅蚀刻速率(SiN E/R)与氧化硅蚀刻速率(SiO E/R)的比值。
2.2蚀刻寿命的检测方法
随着氮化硅层的蚀刻，蚀刻液中硅含量逐渐升高，氧化硅和氮化硅的蚀刻受到抑制。蚀刻液初始硅含量为0ppm，向其中溶解氮化硅以配置硅含量为100ppm、200ppm、300ppm的蚀刻液，并分别测试氧化硅和氮化硅蚀刻速率及选择比，以此表征蚀刻液寿命。
2.3叠层结构蚀刻测试
蚀刻实验：分别使用0ppm、100ppm、200ppm、300ppm硅含量的蚀刻液刻蚀3D NAND结构片，蚀刻条件与速率检测相同，蚀刻时间为20min。
检测方法：拍摄3D NAND结构片截面的高分辨率SEM图片，以此分析蚀刻效果及回粘情况。
实施例1-11和对比例1-7见表1，其中磷酸和硅烷偶联剂含量以质量百分比表示，余量为水。
表1实施例及对比例各组分含量

初始硅含量为0ppm下，实施例1-11及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表2。
表2 0ppm硅含量下蚀刻速率及选择比

在实施例11的实验中，由于沸点较低，沸腾状况不稳定，且加热时间较长，同时蒸发掉一部分水，实验条件无法达到稳定，实施例10的初始选择比无法达到相应的要求，更优选为实施例1的比例，则整体的实验主要围绕实施例1的比例进行。
硅含量为100ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表3。
表3 100ppm硅含量下蚀刻速率及选择比

硅含量为200ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表4。
表4 200ppm硅含量下蚀刻速率及选择比

注：负数表示氧化硅膜在高硅含量下增厚的速率。
硅含量为300ppm下，实施例1-9及对比例1-7中的蚀刻液对氧化硅和氮化硅膜的蚀刻速率及选择比见表4。
表5 300ppm硅含量下蚀刻速率及选择比
由以上实验数据可以看出，对比例1-3中的硅烷偶联剂1具有较高的初始选择比，但是随着硅含量的不断增加，其氧化硅蚀刻速率快速下降，且硅含量达到300ppm时，出现了回粘现象；对比例4-6中硅烷偶联剂2没有较好的初始选择比，但是在硅含量不断增加的同时保持着正向蚀刻；实施例1-9通过结合两种硅烷的优势，在硅含量0-300ppm中，氧化硅的蚀刻速率维持在之间，氮化硅的蚀刻速率维持在之间，未出现回粘现象。实施例10、11为调整了磷酸和水的质量分数比的情况，当磷酸和水的质量含量比小于7时，实施例11出现了蚀刻过程中溶液沸腾情况不稳定的现象，不利于实际制成，当磷酸和水的质量含量比大于8时，如实施例10中氧化硅的蚀刻速率过快，选择比无法达到本专利要求，则比例优选为7-7.5时，可以稳定蚀刻结果。
由结构片的SEM图像可知，实施例3在300ppm的硅含量下，蚀刻后的192层3D NAND结构片仍表现为齿状结构清晰无粘连，且氧化硅层无回粘现象出现，相较于纯磷酸蚀刻结果有明显改善。另外，其他实施例均可在0-300ppm的情况下对结构片达到相似的蚀刻效果。实施例1、2、3-9的附图类似于实施例3的附图。对比例1-3在300ppm的附图类似于对比例1的附图。
以上对本发明的一种氧化硅和氮化硅的选择性蚀刻液做了详尽的描述，以上所述仅为本发明的具体实施例，并不用于限定本发明的保护范围，在本发明的基础上，可以对之做一些修改或改进，这对本领域技术人员而言是显而易见的。因此，在不偏离本发明精神的基础上所做的这些修改或改进，均属于本发明要求保护的范围。

Claims (13)

  1. 一种3D NAND结构片的选择性蚀刻液，其特征在于，所述选择性蚀刻液包括如下的原料，按质量份数计：
    1.5-2.0％的硅烷添加剂1；
    2.0-2.5％的硅烷添加剂2；
    83-86％的磷酸，其余为水。
  2. 根据权利要求1所述的3D NAND结构片的选择性蚀刻液，其特征在于：所述的硅烷添加剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种。
  3. 根据权利要求1所述的3D NAND结构片的选择性蚀刻液，其特征在于：所述的硅烷添加剂2为2-氰乙基三乙氧基硅烷、异氰酸丙基三乙氧基硅烷、脲丙基三乙氧基硅烷中的一种。
  4. 根据权力要求1所述的3D NAND结构片的选择性蚀刻液，其特征在于：所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5。
  5. 根据权利要求1所述的3D NAND结构片的选择性蚀刻液，其特征在于：所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
  6. 一种3D NAND结构片的选择性蚀刻液的配置方法，其特征在于，在室温下将硅烷偶联剂A和B混合均匀，一同加入到磷酸溶液中，得到蚀刻液。
  7. 根据权利要求5所述的方法，其特征在于，磷酸溶液的温度预先升温至80-100℃；将硅烷偶联剂A和B混合均匀后一同加入到80-100℃磷酸溶液后，再次升温至110-120℃，保温0.5-1h，冷却至室温得到蚀刻液。
  8. 根据权利要求7所述的方法，其特征在于，所述的硅烷偶联剂A的质量含量为1.5-2.0％；硅烷偶联剂的B质量含量为2.0-2.5％；
    磷酸的质量含量为83-86％；其余为水；所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5；
    所述的硅烷添加剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种；
    所述的硅烷添加剂2为2-氰乙基三乙氧基硅烷、异氰酸丙基三乙氧基硅烷、脲丙基三乙氧基硅烷中的一种。
  9. 根据权利要求8所述的方法，其特征在于，所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为 所述的层叠结构的层数为150-250层。
  10. 一种3D NAND结构片的选择性蚀刻液蚀刻3D NAND结构片的方法，其特征在于，将氧化硅膜和氮化硅膜的层叠结构在选择性蚀刻液中，在工作温度为156-164℃下进行蚀刻。
  11. 根据权利要求10所述的方法，其特征在于，选择性蚀刻液包括如下原料：
    所述的硅烷偶联剂A的质量含量为1.5-2.0％；
    硅烷偶联剂的B质量含量为2.0-2.5％；
    磷酸的质量含量为83-86％；其余为水；所述蚀刻液中磷酸和水的质量含量比为6-8，优选为7-7.5；
    所述的硅烷添加剂1为3-缩水甘油基氧基丙基三甲氧基硅烷、二乙氧基(3-缩水甘油基氧基丙基)甲基硅烷、三乙氧基(3-环氧丙基氧丙基)硅烷中的一种；
    所述的硅烷添加剂2为2-氰乙基三乙氧基硅烷、异氰酸丙基三乙氧基硅烷、脲丙基三乙氧基硅烷中的一种；
    所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为所述的层叠结构的层数为150-250层。
  12. 根据权利要求11所述的方法，其特征在于，所述的3D NAND结构片为氧化硅膜和氮化硅膜的层叠结构，所述的氮化硅的膜层厚度为所述的氧化硅的膜层厚度为 所述的层叠结构的层数为150-250层。
  13. 根据权利要求12所述的方法，其特征在于，所述蚀刻过程中硅含量为0-500ppm，
    所述蚀刻液的蚀刻液在外加硅含量在0ppm时，氮化硅蚀刻速率大于氧化硅蚀刻速率小于氮化硅/氧化硅蚀刻速率的选择比大于2500；
    所述蚀刻液的蚀刻液在外加硅含量在300ppm时，氮化硅蚀刻速率大于氧化硅蚀刻速率大于
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