WO2024042612A1 - 電力変換装置 - Google Patents

電力変換装置 Download PDF

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Publication number
WO2024042612A1
WO2024042612A1 PCT/JP2022/031724 JP2022031724W WO2024042612A1 WO 2024042612 A1 WO2024042612 A1 WO 2024042612A1 JP 2022031724 W JP2022031724 W JP 2022031724W WO 2024042612 A1 WO2024042612 A1 WO 2024042612A1
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WIPO (PCT)
Prior art keywords
phase
voltage
negative
arm
value
Prior art date
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Ceased
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PCT/JP2022/031724
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English (en)
French (fr)
Japanese (ja)
Inventor
幸太 ▲浜▼中
美和子 田中
香帆 椋木
俊行 藤井
良之 河野
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2022575828A priority Critical patent/JP7249471B1/ja
Priority to EP22956440.6A priority patent/EP4580032A4/en
Priority to PCT/JP2022/031724 priority patent/WO2024042612A1/ja
Priority to US18/992,947 priority patent/US20260019006A1/en
Publication of WO2024042612A1 publication Critical patent/WO2024042612A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/2173—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a biphase or polyphase circuit arrangement
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for AC mains or AC distribution networks
    • H02J3/26—Arrangements for eliminating or reducing asymmetry in polyphase networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/23—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only arranged for operation in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4833—Capacitor voltage balancing

Definitions

  • the present disclosure relates to a power conversion device.
  • a modular multilevel converter in which multiple unit converters (hereinafter referred to as "converter cells”) are connected in cascade, is a well-known large-capacity power converter installed in the power system. It is being The MMC has a configuration in which a plurality of converter cells are connected in cascade and further a reactor is connected in series for each of three phases. The three-phase configuration is connected to the AC power system via a reactor or transformer.
  • Each converter cell includes a plurality of semiconductor switching elements and a storage element (typically, a capacitor). Each converter cell outputs a voltage across a capacitor and a zero voltage by turning on and off a semiconductor switching element.
  • the MMC Since the MMC has a capacitor in each converter cell, the voltages of the capacitors between phases may become unbalanced due to voltage variations between the capacitors. If the capacitor voltages between the phases become unbalanced, there is a concern that the control characteristics of the MMC will deteriorate due to the generation of unintended circulating current. Therefore, phase balance control of the capacitor voltage to suppress this unbalance is important (see, for example, International Publication No. 2014/162620 (Patent Document 1)).
  • an AC power system to which power converters are interconnected may have three phases unbalanced even in steady state due to differences in impedance characteristics of power transmission lines or load conditions of each phase. If the three-phase unbalanced state continues, it will have an adverse effect on the load equipment connected to the AC power system.
  • the unbalanced component (negative sequence voltage) of the AC power system is extracted, and the power converter is controlled to flow a current to compensate for the extracted unbalanced component (negative sequence voltage), thereby reducing the system voltage.
  • the voltage unbalance compensator disclosed in Japanese Patent Application Laid-Open No. 06-113466 uses three-phase phase voltage or three-phase line voltage of an AC power system. A negative phase voltage is detected from the output voltage, a compensating current command value is calculated, and a compensating current is injected into the system through PWM (Pulse Width Modulation) control based on the output of a current regulator to compensate for voltage unbalance.
  • PWM Pulse Width Modulation
  • the inventors of the present application extracted an unbalanced component (negative sequence voltage) of an AC power system using an MMC type power conversion device, and caused a current to flow through the AC power system to compensate for the extracted negative sequence voltage.
  • the inventors of the present application found that as the magnitude of the compensation current increases due to an increase in the negative phase voltage of the power system, the balance between the phases of the capacitor voltage of the MMC collapses more significantly. Particularly in the event of a system fault where the negative sequence voltage becomes large, the unbalance of the capacitor voltage between phases becomes noticeable.
  • Such problems regarding MMC are not known and are revealed for the first time by this disclosure.
  • the present disclosure aims to solve the above-mentioned problems, and its purpose is to provide an MMC type power conversion device that stabilizes grid voltage by negative phase voltage compensation while preventing capacitor voltage from becoming unbalanced between phases.
  • the goal is to provide the following.
  • a power conversion device connected to an AC power system includes a power converter including a plurality of arms, and a control device that controls the power converter.
  • Each arm includes multiple transducer cells connected in cascade.
  • Each converter cell includes a pair of input/output terminals, a plurality of semiconductor switching elements, and a power storage element connected to the pair of input/output terminals via the plurality of semiconductor switching elements.
  • the control device includes a first generation section, a second generation section, a gate signal generation section, and a negative phase voltage compensation section.
  • the first generation unit generates a first voltage command value based on the positive sequence current command value and the input negative sequence current command value in order to control the alternating current output from the power converter.
  • the second generation unit generates a second voltage command value for suppressing voltage imbalance of the power storage elements among the plurality of arms.
  • the gate signal generation section generates a gate signal for controlling on/off of a plurality of semiconductor switching elements of each converter cell based on the first voltage command value and the second voltage command value.
  • the negative-sequence voltage compensator generates the negative-sequence current command value so as to compensate for the negative-sequence component included in the AC voltage of the AC power system when performing the negative-sequence voltage compensation, and generates the negative-sequence current command value to the first generating unit. Output to.
  • the negative phase voltage compensator compares an evaluation value related to the degree of unbalance of the AC voltage of the AC power system with a threshold value, and when a state in which the unbalance is determined to be small continues for a certain period of time or more, Execute the negative phase voltage compensation described above.
  • the negative sequence voltage compensator maintains a state where the unbalance is determined to be small for a certain period of time by comparing the evaluation value related to the degree of unbalance of the AC voltage of the AC power system with the threshold value. Since negative phase voltage compensation is performed when the above continues, the system voltage can be stabilized by negative phase voltage compensation while preventing the capacitor voltage from becoming unbalanced between phases.
  • FIG. 1 is a schematic configuration diagram of a power conversion device 1 according to a first embodiment.
  • FIG. 2 is a circuit diagram showing the configuration of a half-bridge type converter cell 6 (110).
  • FIG. 2 is a circuit diagram showing the configuration of a full-bridge converter cell 6 (110).
  • 2 is a block diagram showing a schematic configuration of a control device 3 in FIG. 1.
  • FIG. 5 is a block diagram showing a configuration example of a negative phase voltage compensator 21 in FIG. 4.
  • FIG. 5 is a block diagram showing a configuration example of a phase balance control section 22 in FIG. 4.
  • FIG. 5 is a block diagram showing a configuration example of a circulating current control section 24 in FIG. 4.
  • FIG. 5 is a block diagram showing a configuration example of an output current control section 23 in FIG. 4.
  • FIG. 5 is a block diagram showing a configuration example of an output current control section 23 in FIG. 4.
  • FIG. 3 is a block diagram illustrating a configuration example of a negative phase voltage compensator 21A in the power conversion device of Embodiment 2.
  • FIG. 3 is a diagram showing the configuration of a power conversion device 100 according to Embodiment 3.
  • FIG. 3 is a diagram for explaining a current flowing through a power converter 101.
  • FIG. 2 is a block diagram showing a schematic configuration of a control device 107 in FIG. 1.
  • FIG. 13 is a block diagram showing a configuration example of the total voltage control section 200 in FIG. 12.
  • FIG. 13 is a block diagram showing a configuration example of a current control section 300 in FIG. 12.
  • FIG. 13 is a block diagram showing a configuration example of a phase balance control section 500 in FIG. 12.
  • FIG. 13 is a block diagram showing a configuration example of a positive/negative balance control section 600 in FIG. 12.
  • FIG. 12 is a block diagram illustrating a configuration example of a positive/negative balance control section 600 in FIG. 12.
  • FIG. 1 is a schematic configuration diagram of a power conversion device 1 according to the first embodiment.
  • the power converter 1 includes a three-phase MMC type power converter 2 of a delta connection cascade type and a control device 3 thereof.
  • the power converter 2 includes a transformer 4 and three-phase AC lines UL, VL, and WL.
  • the primary windings of the transformer 4 are connected to U-phase, V-phase, and W-phase power transmission lines of an AC power system 12, respectively.
  • the secondary windings of the transformer 4 are connected to first terminals of AC lines UL, VL, and WL, respectively.
  • the power converter 2 functions as a reactive power compensator that injects or absorbs reactive power into the AC power system 12 via the transformer 4. Specifically, when the three-phase AC voltage (hereinafter also referred to as "grid voltage") of the AC power system 12 becomes low, the power converter 2 disables the AC power system 12 to increase the grid voltage. Inject power. On the other hand, when the system voltage becomes high, the power converter 2 absorbs reactive power from the AC power system 12 so as to lower the system voltage. That is, the power converter 2 can compensate for reactive power by injecting or absorbing a current orthogonal to the grid voltage into the AC power grid 12.
  • grid voltage three-phase AC voltage
  • Power converter 2 further includes arms A1 to A3.
  • Arm A1 is connected between a second terminal of U-phase AC line UL and a second terminal of V-phase AC line VL.
  • Arm A2 is connected between a second terminal of V-phase AC line VL and a second terminal of W-phase AC line WL.
  • Arm A3 is connected between the second terminal of W-phase AC line WL and the second terminal of U-phase AC line UL. That is, the arms A1 to A3 are connected in a delta connection.
  • arms A1 to A3 may be connected in a star connection.
  • arm A1 is connected between the second terminal of U-phase AC line UL and a common neutral point.
  • Arm A2 is connected between the second terminal of the V-phase AC line VL and the above-mentioned common neutral point.
  • Arm A3 is connected between the second terminal of W-phase AC line WL and the above-mentioned common neutral point.
  • Each of the arms A1 to A3 has a reactor 5 and N converter cells 6 (N is an integer of 2 or more). Therefore, the power converter 2 has a total of 3N converter cells 6.
  • N is an integer of 2 or more. Therefore, the power converter 2 has a total of 3N converter cells 6.
  • N converter cells 6 are connected in series with each other.
  • the reactor 5 is connected in series with N converter cells 6 in each arm (A1 to A3) in order to suppress the circulating current flowing in the delta connection.
  • Each of the plurality of converter cells 6 performs bidirectional power conversion according to a control signal from the control device 3.
  • a configuration example of the converter cell 6 will be described later with reference to FIGS. 2 and 3.
  • the power conversion device 1 further includes an arm current detection section 13 arranged in each arm (A1 to A3), and an AC current detection section 14 and an AC voltage detection section 15 arranged in the AC power system 12.
  • the arm current detection unit 13 detects a current Iuv flowing through the arm A1, a current Ivw flowing through the arm A2, and a current Iwu flowing through the arm A3.
  • the alternating current detection unit 14 detects the U-phase alternating current Iu, the V-phase alternating current Iv, and the W-phase alternating current Iw of the alternating current power system 12.
  • the AC voltage detection unit 15 detects the U-phase AC voltage Vu, V-phase AC voltage Vv, and W-phase AC voltage Vw of the AC power system 12. Signals representing these detected currents and voltages are input to the control device 3.
  • FIG. 2 shows an example of a half-bridge type configuration
  • FIG. 3 shows an example of a full-bridge type configuration.
  • the configuration of the converter cell 6 may be other than those shown in FIGS. 2 and 3.
  • FIG. 2 is a circuit diagram showing the configuration of a half-bridge type converter cell 6.
  • the converter cell 6 in FIG. 2 includes a series body formed by connecting two semiconductor switching elements 8p and 8n in series, rectifying elements 9p and 9n (typically diodes), and a power storage element 7 (typically capacitor), a voltage detection section 11, input/output terminals P1 and P2, and a voltage detection section 11.
  • the rectifying elements 9p and 9n are connected in antiparallel to the semiconductor switching elements 8p and 8n (that is, in parallel and in a reverse bias direction).
  • the series body of semiconductor switching elements 8p and 8n and power storage element 7 are connected in parallel.
  • Voltage detection unit 11 detects voltage Vcap (also referred to as capacitor voltage Vcap) between both ends of power storage element 7 .
  • a half-bridge circuit 10H is configured by a series body of semiconductor switching elements 8p and 8n and rectifying elements 9p and 9n. Both terminals of the semiconductor switching element 8n are connected to input/output terminals P1 and P2, respectively. Therefore, power storage element 7 is connected to input/output terminals P1 and P2 via half bridge circuit 10H.
  • Converter cell 6 outputs voltage Vcap or zero voltage of power storage element 7 between input/output terminals P1 and P2 by switching operations of semiconductor switching elements 8p and 8n.
  • semiconductor switching element 8p When semiconductor switching element 8p is turned on and semiconductor switching element 8n is turned off, voltage Vcap of power storage element 7 is output from converter cell 6.
  • the converter cell 6 When the semiconductor switching element 8p is turned off and the semiconductor switching element 8n is turned on, the converter cell 6 outputs zero voltage.
  • both terminals of the semiconductor switching element 8p may be connected to the input/output terminals P1 and P2, respectively. Also in this case, converter cell 6 outputs voltage Vcap of power storage element 7 and zero voltage from input/output terminals P1 and P2 by the on/off operation of semiconductor switching elements 8p and 8n.
  • FIG. 3 is a circuit diagram showing the configuration of the full-bridge converter cell 6.
  • the converter cell 6 in FIG. 3 includes a first series body formed by connecting two semiconductor switching elements 8p1 and 8n1 in series, and a second series body formed by connecting two semiconductor switching elements 8p2 and 8n2 in series. , rectifying elements 9p1, 9n1, 9p2, 9n2, a power storage element 7, a voltage detection section 11, and input/output terminals P1, P2.
  • the first series body, the second series body, and the power storage element 7 are connected in parallel.
  • the rectifying elements 9p1 and 9n1 are connected in antiparallel to the semiconductor switching elements 8p1 and 8n1, respectively.
  • the rectifying elements 9p2 and 9n2 are connected in antiparallel to the semiconductor switching elements 8p2 and 8n2, respectively.
  • a full bridge circuit 10F is configured by semiconductor switching elements 8p1, 8n1, 8p2, 8n2 and rectifying elements 9p1, 9n1, 9p2, 9n2.
  • Voltage detection section 11 detects voltage Vcap between both ends of power storage element 7 .
  • a midpoint between the semiconductor switching element 8p1 and the semiconductor switching element 8n1 is connected to the input/output terminal P1.
  • the midpoint of semiconductor switching element 8p2 and semiconductor switching element 8n2 is connected to input/output terminal P2. Therefore, power storage element 7 is connected to input/output terminals P1 and P2 via full bridge circuit 10F.
  • Converter cell 6 outputs voltage Vcap, -Vcap, or zero voltage of power storage element 7 between input/output terminals P1 and P2 by switching operations of semiconductor switching elements 8p1, 8n1, 8p2, and 8n2.
  • semiconductor switching elements 8p, 8n, 8p1, 8n1, 8p2, 8n2 are self-extinguishing semiconductors such as IGBT (Insulated Gate Bipolar Transistor) and GCT (Gate Commutated Turn-off) thyristor. It is composed of switching elements.
  • semiconductor switching element 8 when semiconductor switching elements are collectively referred to or when any one of them is indicated, it will be referred to as semiconductor switching element 8.
  • rectifying element 9 when referring to the rectifying elements collectively or indicating any one of them, the rectifying element 9 is used.
  • the converter cells 6 are connected in cascade. Therefore, in each of FIGS. 2 and 3, the input/output terminal P1 is connected to the input/output terminal P2 of one of the adjacent converter cells 6 or the second terminal of the corresponding one AC line.
  • the input/output terminal P2 is connected to the input/output terminal P1 of the other adjacent converter cell 6 or the second terminal of the corresponding other AC line.
  • FIG. 4 is a block diagram showing a schematic configuration of the control device 3 of FIG. 1.
  • the control device 3 includes a PLL (phase locked loop) section 20, a negative phase voltage compensation section 21, a phase balance control section 22, an output current control section 23, a circulating current control section 24, and a voltage command value calculation section 25. and a gate signal generation section 26. An overview of these components will be explained below.
  • PLL phase locked loop
  • the PLL unit 20 outputs system voltages Vu, Vv.
  • a phase ⁇ synchronized with the grid voltage is extracted from the detected value of Vw.
  • the negative phase voltage compensator 21 adjusts the system voltages Vu, Vv.
  • the detected value of Vw and the reference phase ⁇ output from the PLL section are input.
  • the negative-phase voltage compensator 21 extracts the negative-phase component (i.e., negative-phase voltage) of the grid voltage based on these inputs when performing negative-phase voltage compensation, and extracts the negative-phase component (i.e., negative-phase voltage) of the grid voltage to compensate for the negative-phase voltage.
  • the phase balance control unit 22 receives input of the detected values of the capacitor voltages Vcap of all the converter cells 6. Based on these inputs, the phase balance control unit 22 generates arm current command values Iuv*, Ivw*, Iwu* for balancing the capacitor voltage Vcap of the converter cell 6 between each phase. Furthermore, the phase balance control unit 22 generates negative phase current command values Idnavr*, Iqnavr* by extracting negative phase current components included in arm current command values Iuv*, Ivw*, Iwu*. A more detailed configuration of the phase balance control section 22 will be described later with reference to FIG.
  • the circulating current control unit 24 Based on the arm current command values Iuv*, Ivw*, Iwu* input from the phase balance control unit 22, the circulating current control unit 24 adjusts the circulating current components to zero phase for correcting the arm currents Iuv, Ivw, Iwu. It is generated as a voltage command value Vz* (also referred to as a second voltage command value).
  • Vz* also referred to as a second voltage command value
  • the output current control unit 23 (also referred to as a first generation unit) controls alternating currents Iu, Iv, and Iw output from the power converter 2.
  • the output current control unit 23 outputs the positive phase current command values Idref, Iqref, the negative phase current command values Idnavr*, Iqnavr* output from the negative phase voltage compensation unit 21, and the negative phase current command values output from the phase balance control unit 22. It receives input of current command values Idn*, Iqn* and detected values of currents Iu, Iv, and Iw of the AC system.
  • the output current control unit 23 generates voltage command values Vd*, Vq* (also referred to as first voltage command values) for controlling the output current of the power converter 2 based on these inputs.
  • Vd*, Vq* also referred to as first voltage command values
  • the voltage command value calculation unit 25 receives the voltage command values Vd*, Vq* on the dq axes output by the output current control unit 23, and performs two-phase/three-phase change on the voltage command values Vd*, Vq*. By this, the AC voltage command values Vu*, Vv* . of each phase (U phase, V phase, W phase) are changed. Find Vw*.
  • the voltage command value calculation unit 25 calculates each phase voltage command value Vu*, Vv*. By adding the zero-phase voltage command value Vz* output from the circulating current control unit 24 to Vw*, the output voltage command values Vuo, Vvo, and Vwo of each phase are calculated.
  • the gate signal generation unit 26 turns on and off each semiconductor switching element 8 of each converter cell 6 of each arm by PWM (Pulse Width Modulation) control according to the output voltage command values Vuo, Vvo, and Vwo from the voltage command value calculation unit 25.
  • a gate signal Ga for control is generated.
  • the gate signal Ga from the gate signal generation section 26 is input to each semiconductor switching element 8 of each converter cell 6.
  • the negative phase voltage compensation section 21, the phase balance control section 22, the output current control section 23, the circulating current control section 24, the voltage command value calculation section 25, and the gate signal generation section 26 are implemented by at least one CPU (Central Processing Unit). ) and at least one computer comprising at least one memory.
  • at least a part of the control device 3 may be configured using a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) and a dedicated circuit such as an ASIC (Application Specific Integrated Circuit).
  • PLD Programmable Logic Device
  • FPGA Field Programmable Gate Array
  • ASIC Application Specific Integrated Circuit
  • FIG. 5 is a block diagram showing a configuration example of the negative phase voltage compensator 21 of FIG. 4.
  • the negative phase voltage compensation unit 21 includes a positive phase coordinate conversion unit 30, a negative phase coordinate conversion unit 31, filters 32 to 35, comparators 36 and 37, an AND circuit 38, and an on-delay (ON). Delay) circuit 39, subtracters 40 and 41, multipliers 42 and 43, controllers 44 and 45, and a coordinate conversion section 46. The operation of each component of the negative phase voltage compensator 21 will be described below with reference to FIG.
  • the positive phase coordinate conversion unit 30 of the negative phase voltage compensation unit 21 receives input of the detected values of the system voltages Vu, Vv, and Vw.
  • the positive phase coordinate conversion unit 30 performs three-phase/two-phase conversion (UVW/ ⁇ conversion) of the detected values of the system voltages Vu, Vv, and Vw from UVW coordinates to ⁇ coordinates using equation (1A).
  • the positive phase coordinate conversion unit 30 substitutes the system voltages V ⁇ and V ⁇ of the ⁇ coordinate obtained by the three-phase/two-phase conversion into equation (1B), and converts the ⁇ coordinate from the ⁇ coordinate using the reference phase ⁇ extracted by the PLL unit 20.
  • Rotational coordinate transformation ( ⁇ /dq transformation) is performed to dq coordinates. Thereby, positive phase voltages Vdp and Vqp are obtained.
  • the direction of the voltage vector is the q-axis
  • the active power component is represented by the q-axis component
  • the reactive power component is represented by the d-axis component.
  • the negative phase coordinate conversion unit 31 receives input of detected values of the system voltages Vu, Vv, and Vw.
  • the negative phase coordinate conversion unit 31 performs three-phase/two-phase conversion (UVW/ ⁇ conversion) of the detected values of the system voltages Vu, Vv, and Vw from UVW coordinates to ⁇ coordinates using equation (1A).
  • the inverse phase coordinate conversion unit 31 substitutes the system voltages V ⁇ and V ⁇ of the ⁇ coordinate obtained by the three-phase/two-phase conversion into equation (2), and converts the ⁇ coordinate into the dq coordinate by the inverse phase ⁇ of the reference phase. Perform rotational coordinate transformation ( ⁇ /dq transformation). Thereby, negative phase voltages Vdn and Vqn are obtained.
  • the positive phase voltages Vdp, Vqp and negative phase voltages Vdn, Vqn obtained by the above calculations have a frequency component of 2f (f is the system frequency). Therefore, the 2f component is removed by the filters 32 to 35.
  • the comparator 36 uses the positive-sequence voltages Vdp and Vqp from which the 2f frequency component has been removed by the filters 32 and 33 to calculate the magnitude
  • the comparator 36 compares the obtained positive sequence voltage magnitude
  • the comparator 36 outputs 0 when the magnitude of the positive sequence voltage
  • the first threshold value Vth1 is, for example, a value of 0.9 pu or more.
  • the comparator 37 uses the negative phase voltages Vdn and Vqn from which the 2f frequency component has been removed by the filters 34 and 35 to calculate the magnitude
  • the comparator 37 compares the obtained magnitude of the negative phase voltage
  • the comparator 37 outputs 0 when the magnitude of the negative phase voltage
  • the second threshold value Vth2 is, for example, a value of 0.05 pu or less.
  • the negative phase voltage compensation on/off switching flag NegAvrOn 1 is entered in .
  • the time set in the on-delay circuit 39 is set to a value of 0.1 [s] or more, for example, in order to avoid activation of negative phase voltage compensation when the system instantaneously becomes unbalanced. Ru.
  • the subtracter 40 of the negative phase voltage compensator 21 calculates the difference between the negative phase voltage command value Vdn* (typically equal to 0) and the negative phase voltage Vdn.
  • a PI controller that adds the execution results of the proportional calculation (P) and the integral calculation (I) may be used, or other controllers may be used.
  • the subtracter 41 calculates the difference between the negative phase voltage command value Vqn* (typically equal to 0) and the negative phase voltage Vqn.
  • the controller 45 may be a PI controller or another controller.
  • the negative phase voltage compensator 21 performs negative phase voltage control on the negative phase dq axes. Therefore, the coordinate transformation unit (negative phase dq/positive phase dq) 46 performs rotation using twice the reference phase ⁇ (i.e., 2 ⁇ ) extracted by the PLL unit 20, as expressed by equation (5).
  • the coordinate transformation unit 46 By coordinate transformation, the coordinates of the negative phase voltage compensation currents Idn1 and Iqn1 are transformed from the negative phase dq axes to the positive phase dq axes.
  • the coordinate conversion unit 46 generates and outputs a negative phase reactive current command value Idnavr* and a negative phase active current command value Iqnavr*.
  • FIG. 6 is a block diagram showing a configuration example of the phase balance control section 22 of FIG. 4.
  • the phase balance control section 22 includes an arm current command value generation section 50 and a negative phase current command value generation section 64.
  • Arm current command value generation section 50 generates arm current command values Iuv*, Ivw*, Iwu* for balancing capacitor voltage Vcap between phases based on capacitor voltage Vcap of all converter cells 6.
  • the negative phase current command value generation unit 64 generates negative phase current command values Idn*, Iqn* by extracting negative phase current components included in the arm current command values Iuv*, Ivw*, Iwu*.
  • the arm current command value generation section 50 includes a voltage calculation section 51, subtractors 52-57, controllers 58-60, and multipliers 61-63.
  • the negative phase current command value generation section 64 includes an adder 65, a constant multiplier 66, subtracters 67 to 69, a coordinate conversion section 70, filters 71 and 72, and subtracters 73 and 74. The operations of these components will be explained below.
  • the voltage calculation unit 51 calculates the total voltage representative value Vdc_p based on the detection value by the voltage detection unit 11 arranged in each converter cell 6.
  • the total voltage representative value Vdc_p is a representative value of capacitor voltages Vcap of all converter cells 6 that constitute the power converter 2.
  • the total voltage representative value Vdc_p may be, for example, an average value or a median value of all capacitor voltages Vcap, and is not particularly limited as long as it reflects the magnitude of the capacitor voltages Vcap of all converter cells 6.
  • the representative value will also be referred to as a value equivalent to the average value.
  • the voltage calculation unit 51 further calculates a UV phase voltage representative value Vdc_uv, a VW phase voltage representative value Vdc_vw, and a WU phase voltage representative value Vdc_wu.
  • the UV phase voltage representative value Vdc_uv is a representative value of the capacitor voltage Vcap of the converter cell 6 that constitutes the arm A1.
  • the VW phase voltage representative value Vdc_vw is a representative value of the capacitor voltage Vcap of the converter cell 6 that constitutes the arm A2.
  • the WU phase voltage representative value Vdc_wu is a representative value of the capacitor voltage Vcap of the converter cell 6 that constitutes the arm A3.
  • These representative values may also be, for example, the average value or the median value of the capacitor voltages Vcap of the applicable converter cells 6, or may be the magnitude of the capacitor voltages Vcap of all the applicable converter cells 6. There is no particular limitation as long as it reflects the nature of the situation.
  • the subtracter 52 calculates the deviation ⁇ Vuv between the total voltage representative value Vdc_p and the UV phase voltage representative value Vdc_uv.
  • the subtracter 53 calculates the deviation ⁇ Vvw between the total voltage representative value Vdc_p and the VW phase voltage representative value Vdc_vw.
  • the subtracter 54 obtains a deviation ⁇ Vwu between the total voltage representative value Vdc_p and the WU phase voltage representative value Vdc_wu.
  • the subtractor 55 subtracts the deviation ⁇ Vdc between the DC voltage command value Vdc* and the total voltage representative value Vdc_p from the deviation ⁇ Vuv.
  • a subtracter 56 subtracts the deviation ⁇ Vdc from the deviation ⁇ Vvw.
  • the subtractor 57 subtracts the deviation ⁇ Vdc from the deviation ⁇ Vwu.
  • the controller 58 executes a feedback control calculation to make the deviation ⁇ Vuv ⁇ Vdc calculated by the subtracter 55 zero.
  • the controller 58 may be a PI controller or some other controller.
  • the controller 59 executes a feedback control operation to make the deviation ⁇ Vvw ⁇ Vdc calculated by the subtractor 56 zero.
  • the controller 60 executes a feedback control operation to make the deviation ⁇ Vwu ⁇ Vdc calculated by the subtractor 57 zero.
  • the controllers 59 and 60 may also be PI controllers or other controllers.
  • Multiplier 61 multiplies the output of controller 58 and arm voltage Vuv to obtain UV phase arm current command value Iuv*.
  • Multiplier 62 multiplies the output of controller 59 and arm voltage Vvw to obtain a VW phase arm current command value Ivw*.
  • Multiplier 63 multiplies the output of controller 60 and arm voltage Vwu to obtain WU phase arm current command value Iwu*.
  • the arm current command value generation section 50 outputs the arm current command values Iuv*, Ivw*, and Iwu* generated as described above to the circulating current control section 24.
  • Adder 65 adds each phase arm current command value Iuv*, Inw*, Iwu*.
  • Constant multiplier 66 multiplies the addition result of adder 65 by 1/3 to obtain zero-phase current command value Iz*.
  • the subtracter 67 obtains a deviation ⁇ Iuv* by subtracting the zero-phase current command value Iz* from the UV phase arm current command value Iuv*.
  • a subtracter 68 subtracts the zero-phase current command value Iz* from the VW phase arm current command value Ivw* to obtain a deviation ⁇ Ivw*.
  • a subtracter 69 subtracts the zero-phase current command value Iz* from the WU phase arm current command value Iwu* to obtain a deviation ⁇ Iwu*.
  • the coordinate conversion unit 70 performs three-phase/two-phase conversion on the extracted positive phase components and negative phase components (that is, the deviations ⁇ Iuv*, ⁇ Inw*, ⁇ Iwu*) in the positive phase coordinate system. That is, the coordinate transformation unit 70 performs three-phase/two-phase transformation on the deviations ⁇ Iuv*, ⁇ Inw*, ⁇ Iwu* from UVW coordinates to ⁇ coordinates, and further converts the ⁇ coordinates into positive phase dq coordinates using the reference phase ⁇ . Convert the rotational coordinates to .
  • the filters 71 and 72 extract positive phase components from the output of the coordinate transformation section 70.
  • the filters 71 and 72 are configured to remove the negative phase component from the input value to the filter and extract the positive phase component.
  • the positive phase component becomes a DC component
  • the negative phase component becomes a frequency component (2f) twice the fundamental wave frequency. Therefore, for the filters 71 and 72, first-order delay, 2f moving average, 2f notch filters, etc. are used.
  • the subtracter 73 subtracts the output of the filter 71 from the output of the coordinate conversion unit 70 to generate the negative phase active current command value Iqn*.
  • the subtracter 74 subtracts the output of the filter 72 from the output of the coordinate conversion section 70 to generate an inverted phase reactive current command value Idn*.
  • the negative phase current command value generation section 64 outputs the negative phase current command values Iqn*, Idn* generated as described above to the output current control section 23.
  • FIG. 7 is a block diagram showing a configuration example of the circulating current control section 24 of FIG. 4. As shown in FIG. As shown in FIG. 7, the circulating current control unit 24 includes adders 80 and 81, constant multipliers 82 and 83, a subtracter 84, and a controller 85. The operations of these components will be explained below.
  • the adder 80 adds the arm current command values Iuv*, Ivw*, and Iwu*, which are the outputs of the phase balance control section 22.
  • Constant multiplier 82 calculates circulating current command value Iz* by multiplying the output of adder 80 by one-third.
  • the adder 81 adds the arm current values Iuv, Ivw, and Iwu detected by the arm current detection section 13.
  • Constant multiplier 83 calculates circulating current Iz by multiplying the output of adder 81 by one-third.
  • the subtractor 84 calculates a deviation ⁇ Iz between the circulating current command value Iz* and the circulating current Iz.
  • the controller 85 executes a control calculation to make the deviation ⁇ Iz zero, that is, to make the circulating current Iz follow the circulating current command value Iz*, and generates the zero-phase voltage command value vz*.
  • the controller 85 may be a PI controller or another controller.
  • FIG. 8 is a block diagram showing a configuration example of the output current control section 23 of FIG. 4. As shown in FIG. As shown in FIG. 8, the output current control unit 23 includes adders 88 and 89, subtracters 90 and 91, and controllers 92 and 93. The operations of these components will be explained below.
  • the adder 88 outputs the positive phase reactive current command value Idref, the negative phase reactive current command value Idn* for phase balance outputted by the phase balance control section 22, and the negative phase reactive current command value Idn* outputted by the negative phase voltage compensation section 21 for negative phase voltage compensation.
  • the reactive current command value Id* is generated by adding the reverse phase reactive current command value Idnavr*.
  • the subtracter 90 calculates the deviation between the generated reactive current command value Id* and the reactive current Id based on the detected currents Iu, Iv, and Iw of the AC system.
  • the controller 92 sets the output voltage command value Vd* for reactive current control by executing a control calculation to make this deviation zero, that is, to make the reactive current Id follow the reactive current command value Id*. generate.
  • the controller 92 may be a PI controller or another controller.
  • the adder 89 outputs the positive phase active current command value Iqref, the negative phase active current command value Iqn* for phase balance outputted by the phase balance control section 22, and the negative phase active current command value Iqn* outputted by the negative phase voltage compensation section 21.
  • the active current command value Iq* is generated by adding the negative phase active current command value Iqnavr* for voltage compensation.
  • the subtractor 91 calculates the deviation between the generated effective current command value Iq* and the effective current Iq based on the detected currents Iu, Iv, and Iw of the AC system.
  • the controller 93 sets the output voltage command value Vq* for active current control by executing a control calculation to make this deviation zero, that is, to make the active current Iq follow the active current command value Iq*. Output.
  • the controller 93 may be a PI controller or another controller.
  • the output current control unit 23 (first generation unit) generates output voltage command values Vd*, Vq* (first voltage command value) according to the active power and reactive power output to the AC power system 12. ) is generated.
  • the negative phase voltage compensator 21 of the three-phase MMC delta connection cascade converter is connected to the degree of unbalance of the AC voltages Vv, Vu, Vw of the AC power system 21.
  • negative phase voltage compensation is executed.
  • the negative-sequence voltage compensator 21 calculates the magnitude of the positive-sequence voltage and the magnitude of the negative-sequence voltage based on the AC voltage of the AC power system 12.
  • the negative phase voltage compensator 21 detects the negative phase voltage. Perform voltage compensation. This makes it possible to enable negative sequence voltage compensation during normal operation and to disable negative sequence voltage compensation in the event of a grid failure, thereby stabilizing the grid voltage while preventing unbalanced capacitor voltages between phases. can.
  • Embodiment 2 In the power conversion device of the second embodiment, a part of the configuration of the negative phase voltage compensator 21A is different from that of the negative phase voltage compensator 21 of FIG. 5 of the first embodiment.
  • whether or not the state of the AC power system 12 is normal is determined based on the magnitude of the positive phase component and the magnitude of the negative phase component included in the system voltage.
  • whether or not the AC power system 12 is normal is determined using the deviations ⁇ Vuv, ⁇ Vvw, and ⁇ Vwu regarding the capacitor voltage Vcap calculated by the phase balance control unit 22.
  • the deviation ⁇ Vuv is the deviation between the total voltage representative value Vdc_p and the UV phase voltage representative value Vdc_uv.
  • the deviation ⁇ Vvw is the deviation between the total voltage representative value Vdc_p and the VW phase voltage representative value Vdc_vw.
  • the deviation ⁇ Vwu is the deviation between the total voltage representative value Vdc_p and the WU phase voltage representative value Vdc_wu.
  • Embodiment 2 The rest of the configuration of the power conversion device of Embodiment 2 is the same as that of Embodiment 1, so the parts that are different from Embodiment 1 will be described below.
  • FIG. 9 is a block diagram illustrating a configuration example of the negative phase voltage compensator 21A in the power converter according to the second embodiment.
  • the negative phase voltage compensation unit 21A includes a maximum value calculator 95, a comparator 96, an on delay circuit 39, a negative phase coordinate conversion unit 31, and subtractors 40, 41. , multipliers 42 and 43, controllers 44 and 45, and a coordinate transformation section 46.
  • the components other than the maximum value calculation unit 95 and the comparator 96 are the same as in the case of FIG. .
  • the maximum value calculation unit 95 extracts the maximum value
  • the comparator 96 compares the maximum value
  • the on/off switching flag NegAvrOn of the negative phase voltage control is set by the multipliers 42 and 43 to calculate the negative phase voltage command value (Vdn*, Vqn*) and the negative phase voltage (Vdn, Vqn). is multiplied by the difference between As a result, the negative phase voltage control becomes effective only when the balance between the phases of the capacitor voltage Vcap is healthy.
  • the on-delay circuit 39 sets the negative phase voltage compensation on/off switching flag NegAvrOn to 1 when the state in which the output of the comparator 96 changes from 0 to 1 continues until the set time has elapsed.
  • a value of 0.1 [s] or more is selected as the above-mentioned setting time of the on-delay circuit 39, for example.
  • the on-delay circuit 39 immediately switches the negative phase voltage control on and off. By switching the flag NegAvrOn to 0, negative phase voltage compensation is disabled.
  • the negative sequence voltage control becomes effective by setting the negative sequence voltage control on/off switching flag NegAvrOn to 1. Become. Conversely, when the unbalanced component of the system voltage is relatively large, such as during a system fault, the negative phase voltage compensation is disabled by immediately setting the switching flag NegAvrOn to 0.
  • the negative phase voltage compensator 21A uses the total voltage representative value Vdc_p of the capacitor voltage Vcap of the converter cell 6 and each phase voltage as evaluation values. The maximum absolute value of the deviation from the representative values (Vdc_uv, Vdc_vw, Vdc_wu) is calculated. Then, the negative phase voltage compensator 21A performs negative phase voltage compensation when the evaluation value remains lower than the third threshold value Vth3 for a certain period of time or more. On the other hand, the negative phase voltage compensator 21A immediately stops negative phase voltage compensation when the above evaluation value is equal to or higher than the third threshold value Vth3. Thereby, it is possible to prevent the capacitor voltage Vcap of the power converter 2 from becoming unbalanced between phases, and to stabilize the system voltage.
  • Embodiment 3 when the three-phase arm of the power converter 2 is connected in parallel with the three phases of the AC power system, that is, when the power converter 2 is used as a reactive power compensator, , explained the control of the power conversion device.
  • Embodiment 3 when a power system is configured by connecting the power converter 2 between an AC power system and a DC line, that is, the power converter 2 is configured to connect AC power and DC power in both directions. Control of the power conversion device when used as a converter will be explained.
  • FIG. 10 is a diagram showing the configuration of power conversion device 100 according to the third embodiment. As shown in FIG. 10, power converter 100 is connected between three-phase AC power system 12 and DC lines 106P and 106N. Power converter 100 includes a power converter 101 and a control device 107 thereof.
  • the power converter 101 connects the AC terminals Nu, Nv, Nw and the positive pole side DC line 106P and the AC terminals Nu, Nv, Nv and the negative pole side in each of the U phase, V phase, and W phase.
  • Arms 109pu, 109pv, 109pw, 109nu, 109nv, and 109nw are provided between the DC line 106N and the DC line 106N, respectively.
  • AC terminals Nu, Nv, and Nw are connected to an AC power system 12 via an interconnection transformer 4. Instead of the interconnection transformer 4, a interconnection reactor may be used.
  • arms 109pu, 109pv, 109pw, 109nu, 109nv, and 109nw will be referred to collectively as arm 109 or any one of them will be referred to as arm 109.
  • arm 109p the arm connected between the AC end and the DC line 106P
  • the arm connected between the AC end and the DC line 106N is referred to as the "positive side arm 109p” or "positive side arm 109p”.
  • negative side arm 109n or “negative side arm 109n.”
  • the U-phase positive side arm 109pu and the U-phase negative side arm 109nu are collectively referred to as a U-phase leg circuit 108u.
  • the V-phase positive arm 109pv and the V-phase negative arm 109nv are collectively referred to as a V-phase leg circuit 108v.
  • the W-phase positive arm 109pw and the W-phase negative arm 109nw are collectively referred to as a W-phase leg circuit 108w.
  • the U-phase leg circuit 108u, the V-phase leg circuit 108v, and the W-phase leg circuit 108w are collectively referred to as a leg circuit 108, or any one of them is referred to as a leg circuit 108.
  • Each arm 109 includes N converter cells 110 (N: a natural number of 2 or more) connected in series, and arm reactors (5up, 5vp, 5wp, 5un) connected in series to the N converter cells 110. , 5vn, or 5wn).
  • the arm reactor may be provided on either the positive side arm 109p or the negative side arm 109n of each phase.
  • each converter cell 110 is the same as that of the converter cell 6 of the power conversion device 1 according to the first embodiment described with reference to FIGS. 2 and 3, so the description will not be repeated.
  • the power converter 100 includes an arm current detection section 13 disposed corresponding to each arm 109, a capacitor voltage detection section 11 disposed in each converter cell 110, and a DC current detection section 11 disposed in a positive electrode side DC line 106P. It further includes a current detection section 111, a DC voltage detection section 112p placed on the positive side DC line 106P, and a DC voltage detection section 112n placed on the negative side DC line 106N.
  • the arm current detection unit 13 detects arm currents Ipu and Inu passing through arms 109pu and 109nu on the positive and negative sides of the U phase, respectively, and arm currents passing through arms 109pv and 109nv on the positive and negative sides of the V phase, respectively. Ipv, Inv and arm currents Ipw, Inw passing through the arms 109pw, 109nw on the positive and negative sides of the W phase, respectively, are detected. The detected arm currents Ipu, Inu, Ipv, Inv, Ipw, and Inw are input to the control device 107 of the power conversion device 100.
  • the capacitor voltage detection unit 11 detects the voltage of the power storage element 7 (capacitor voltage Vcap) for each converter cell 110.
  • the detected value of capacitor voltage Vcap is input to control device 107 of power conversion device 100.
  • the DC current detection unit 111 detects the DC current Idc flowing through the positive side DC line 106P.
  • the DC voltage detection unit 112p detects the DC voltage Vdcp of the positive side DC line 106P.
  • the DC voltage detection unit 112n detects the DC voltage Vdcn of the negative electrode side DC line 106N.
  • the voltage difference between the DC voltage Vdcp and the DC voltage Vdcn times (1/2) is defined as the DC voltage Vdcc.
  • the DC voltage Vdcc that is, the voltage command value Vdcc* of the DC voltage applied to each arm 109, is determined in advance.
  • the power conversion device 100 includes an AC voltage detection unit 15 and an output current detection unit 14 (also referred to as AC current detection unit 14) arranged in the AC power system 12, as in the case of Embodiment 1.
  • the detection values of the three-phase system AC voltages Vu, Vv, Vw by the AC voltage detection unit 15 and the detection values of the three-phase AC output currents Iu, Iv, Iw of the AC power system 12 by the output current detection unit 14 are as follows. It is input to the control device 107 of the power conversion device 100.
  • FIG. 11 is a diagram for explaining the current flowing through the power converter 101.
  • each current element is as follows.
  • Ipu, Ipv, Ipw Currents flowing through the U-phase positive arm 109pu, the V-phase positive arm 109pv, and the W-phase positive arm 109pw.
  • Iu U-phase alternating current that passes through the AC system, and 1/2 of this alternating current Iu is shunted to the U-phase positive side arm 109pu and the U-phase negative side arm 109nu.
  • Iv V-phase alternating current that passes through the AC system, and 1/2 of this alternating current Iv is shunted to the V-phase positive side arm 109pv and the V-phase negative side arm 109nv.
  • Iw W-phase alternating current that passes through the alternating current system, and 1/2 of this alternating current Iw is shunted to the W-phase positive side arm 109pw and the W-phase negative side arm 109nw.
  • Idc A current that passes through the DC system, and 1/3 of Idc flows through the U-phase arm, V-phase arm, and W-phase arm, respectively.
  • Izu A current component obtained by subtracting the current Iu/2 passing through the AC power system from the currents Ipu and Inu flowing in the U-phase arm, and the following relationships (6A) and (6B) hold true.
  • Izuc A circulating current component that circulates between the phases of the leg circuits 108u, 108v, and 108w without passing through the AC system or the DC system.
  • the current component obtained by subtracting the current Iv/2 passing through the AC power system from the current Ipv, Inv flowing in the V-phase arm is Izv
  • the current component flowing in the W-phase arm Ipw, Inw minus the AC current component is Izv.
  • Izw be the current component excluding the current Iw/2 passing through the power system.
  • Current components Izv and Izw are expressed by the following equations (8A) and (8B). Therefore, the circulating current components Izvc and Izwc are expressed by the following equations (8C) and (8D).
  • FIG. 12 is a block diagram showing a schematic configuration of the control device 107 in FIG. 1.
  • the control device 107 balances the capacitor voltage Vcap of the PLL (phase locked loop) section 20, the negative phase voltage compensation section 21, the total voltage control section 200, the current control section 300, and each converter cell 110. It includes a phase balance control section 500, a positive/negative balance control section 600, a voltage command value calculation section 700, and a gate signal generation section 900.
  • the PLL unit 20 outputs system voltages Vu, Vv.
  • a phase ⁇ synchronized with the grid voltage is extracted from the detected value of Vw.
  • the operation of the PLL section 20 is the same as in the first embodiment.
  • the negative phase voltage compensator 21 adjusts the system voltages Vu, Vv.
  • the detected value of Vw and the phase ⁇ output from the PLL section 20 are input.
  • the negative-sequence voltage compensator 21 is configured to compensate for negative-sequence voltage based on the above input when a period in which the grid voltage is in a steady state and its unbalanced component is relatively small continues for a certain period of time or more.
  • Phase current command values Idnavr*, Iqnavr* are output.
  • the detailed configuration example and operation of the negative phase voltage compensator 21 are the same as those in the first embodiment described with reference to FIGS. 4 and 5 and the second embodiment described with reference to FIG. Therefore, I will not repeat the detailed explanation.
  • the total voltage control unit 200 detects the detected value of the capacitor voltage Vcap of all converter cells 110 (that is, 6N in all phases and all arms, N is the number of converter cells in each arm), and the capacitor voltage Vcap for all converter cells 110. It receives input of voltage command value Vcap* (hereinafter referred to as total voltage command value Vcap*) and DC current command value Idc*.
  • the total voltage control unit 200 calculates a value Vcap_av equivalent to the average value of the capacitor voltages Vcap of all converter cells 110, and controls the controller so that this value Vcap_av follows a predetermined total voltage command value Vcap*. Control.
  • the total voltage control section 200 calculates the effective current command value Iq* by adding the DC current command value Idc* to the output of this controller. Since the difference between AC power and DC power in power converter 101 becomes common active power for all converter cells 110, capacitor voltage Vcap of all converter cells 110 is controlled by active current Iq. Details of the operation of the total voltage control section 200 will be described later with reference to FIG. 13.
  • the current control unit 300 (also referred to as a first generation unit) controls alternating currents Iu, Iv, and Iw output from the power converter 101. Specifically, the current control unit 300 uses the phase ⁇ that is synchronized with the AC system voltage extracted by the PLL unit 20 and the detected values of the currents Iu, Iv, and Iw of the AC power system 12 detected by the AC current detection unit 14. , the active current command value Iq* generated by the total voltage control unit 200, the reactive current command value Id* determined from the operating conditions of the power converter 100, and the negative sequence active current generated by the negative sequence voltage compensation unit 21. Receives input of command value Iqnavr* and reverse phase reactive current command value Idnavr*. The active current command value Iq* and the reactive current command value Id* are also collectively referred to as positive-sequence current command values Id*, Iq*.
  • Current control unit 300 converts active current Iq and reactive current Id based on currents Iu, Iv, and Iw of AC power system 12 into active current command value Iq*, reactive current command value Id*, and negative phase active current command value Iqnavr*. , and negative phase reactive current command value Idnavr*, U-phase AC voltage command value Vacu*, V-phase AC voltage command value Vacv*, and W-phase AC voltage command value Vacw* (when collectively referred to as AC voltage A command value Vac* (also referred to as a first voltage command value) is generated. Details of the operation of the current control section 300 will be described later with reference to FIG. 14.
  • the phase balance control unit 500 (also referred to as a second generation unit) detects the capacitor voltage Vcap of all converter cells 110 (6N, where N is the number of converter cells in each arm) and the capacitor voltage Vcap detected by the arm current detection unit 13.
  • the phase balance control section 500 Based on these inputs, the phase balance control section 500 outputs values Vcapu, Vcapv, and Vcapw corresponding to the average value of the capacitor voltage of each phase (U phase, V phase, W phase) from the total voltage control section 200.
  • the voltage command values VzU*, VzV*, VzW* (collectively referred to as In this case, a second voltage command value (denoted as Vz*, also referred to as a second voltage command value) is generated. Details of the operation of the phase balance control section 500 will be described later with reference to FIG. 15.
  • the positive/negative balance control section 600 receives input of the detected values of the capacitor voltages Vcap of all the converter cells 110. Based on these inputs, the positive/negative balance control unit 600 balances the capacitor voltage Vcap of the positive arm 109p and the capacitor voltage Vcap of the negative arm 109n in the leg circuits (108u, 108v, 108w) of each phase. Control as follows. Then, the positive/negative balance control section 600 generates a circulating current command value Izpn* (Izpna*, Izpnb) for this positive/negative balance control and outputs it to the phase balance control section 500.
  • Izpn* Izpna*, Izpnb
  • the positive/negative balance control unit 600 further generates an AC voltage command value Vpn* (VpnU*, VpnV*, VpnW*, also referred to as a third voltage command value) for positive/negative balance control, and outputs the AC voltage command value Vpn* (also referred to as a third voltage command value) to the voltage command value calculation unit 700. Output to. Details of the operation of the positive/negative balance control section 600 will be described later with reference to FIG. 16.
  • the voltage command value calculation unit 700 calculates a predetermined DC voltage command value Vdcc* and a first voltage command value Vac* (Vacu*, Vacv*, Vacw*), the second voltage command value Vz* (VzU*, VzV*, VzW*) for circulating current control output from the phase balance control unit 500 (second generation unit), and the positive/negative balance control unit
  • the third voltage command value Vpn* (VpnU*, VpnV*, VpnW*) for positive/negative balance outputted from 600 (third generation unit) is received.
  • the DC voltage command value Vdcc* is a voltage command value equivalent to 1/2 of the DC terminal voltage Vdc.
  • the voltage command value calculation unit 700 generates a voltage command value Vref for each arm 109 by distributing these voltage command values. Furthermore, the voltage command value calculation unit 700 divides the voltage command value Vref for each arm 109 by the total value VcapXX of the capacitor voltages of the arm 109 inputted from the total voltage control unit 200. The arm modulation command value Kref is generated. Voltage command value calculation unit 700 outputs arm modulation command value Kref for each arm 109 to each of the N gate signal generation units 900 of the corresponding arm 109.
  • N gate signal generation units 900 are provided corresponding to N converter cells 110 of each arm 109, respectively.
  • Each gate signal generation section 900 outputs a gate signal Ga for controlling on/off of the semiconductor switching element 8 provided in the corresponding converter cell 110 based on the arm modulation command value Kref.
  • the negative phase voltage compensation section 21, total voltage control section 200, current control section 300, phase balance control section 500, positive/negative balance control section 600, voltage command value calculation section 700, and gate signal generation section 900 have at least one It can be configured based on at least one computer including a CPU and at least one memory. Alternatively, at least a portion of the control device 107 may be configured using a PLD such as an FPGA and a dedicated circuit such as an ASIC.
  • FIG. 13 is a block diagram showing a configuration example of the total voltage control section 200 of FIG. 12.
  • the total voltage control section 200 includes a first representative value calculation section 210, a subtracter 215, a controller 220, an adder 225, and an adder 240. The operation of each component will be explained below.
  • the first representative value calculation unit 210 receives input of the capacitor voltage Vcap of all converter cells 110 (that is, 6N cells for all phases and all arms, where N is the number of converter cells in each arm). Then, the first representative value calculating section 210 calculates a value Vcap_av corresponding to the average value of the capacitor voltages Vcap of all converter cells 110.
  • the value equivalent to the average value Vcap_av may be any value that represents the capacitor voltage Vcap of all the converter cells 110. For example, it may be the average value of the capacitor voltages Vcap of all the converter cells 110, or the value It may be a value, and is not particularly limited as long as it reflects the magnitude of the capacitor voltage Vcap of all converter cells 6.
  • the value Vcap_av which corresponds to the average value of the capacitor voltages Vcap of all converter cells, may be a value passed through a filter in order to suppress steep fluctuations.
  • the capacitor voltages of all the converter cells 110 are collectively referred to or when representing any one capacitor voltage, it is written as Vcap.
  • the N capacitor voltages on the U-phase positive side arm are written as Vcappu1,..., VcappuN
  • the N capacitor voltages on the U-phase negative side arm are written as Vcapnu1.
  • the voltages of the N capacitors on the W-phase positive arm are written as Vcappw1, . . . , VcappwN
  • the capacitor voltages on the W-phase negative arm are written as Vcapnw1, .
  • the total value of capacitor voltages Vcap is collectively referred to as VcapXX.
  • the first representative value calculation unit 210 further calculates a total value Vcappu of the capacitor voltages Vcap of the converter cells 110 of the U-phase positive side arm 109pu, and a total value of capacitor voltages Vcap of the converter cells 110 of the U-phase negative side arm 109nu.
  • Vcapnu total value Vcap of capacitor voltages Vcap of converter cells 110 of V-phase positive arm 109pv
  • total value Vcapnv of capacitor voltages Vcap of converter cells 110 of V-phase negative arm 109nv conversion of W-phase positive arm 109pw.
  • a total value Vcapw of the capacitor voltages Vcap of the converter cell 110 and a total value Vcapnw of the capacitor voltages Vcap of the converter cell 110 of the W-phase negative arm 109nw are calculated.
  • the subtracter 215 calculates the difference between capacitor voltage command values Vcap* for all converter cells 110 (referred to as total voltage command value Vcap*) and a value Vcap_av corresponding to the average value of capacitor voltages Vcap of all converter cells 110. calculate.
  • Controller 220 In order to make the difference between the value Vcap_av equivalent to the average value of the capacitor voltages of all converter cells 110 and the total voltage command value Vcap* to zero, the controller 220 sets the value Vcap_av equivalent to the average value of all capacitor voltages to zero. A feedback calculation is performed to make Vcap* follow the total voltage command value Vcap*. Controller 220 may be a PI controller or some other controller.
  • the adder 225 is activated by adding the DC current command value Idc* to the manipulated variable 230 output from the controller 220 or by adding the detected value of the DC current Idc detected by the DC current detector 111. Generate current command value Iq*.
  • the total voltage control section 200 outputs the generated effective current command value Iq* to the current control section 300. Further, the total voltage control section 200 outputs a value Vcap_av corresponding to the average value of all capacitor voltages generated by the first representative value calculation section 210 to the phase balance control section 500 as the first representative value Vcap_av*. Furthermore, the total voltage control unit 200 calculates the total value of the capacitor voltage Vcap for each arm (Vcappu, Vcapnu, Vcapv, Vcapnv, Vcappw, Vcapnw) generated by the first representative value calculation unit 210 to the voltage command value calculation unit 700. Output to.
  • FIG. 14 is a block diagram showing a configuration example of the current control section 300 of FIG. 12.
  • the current control unit 300 includes a three-phase/two-phase converter 310, adders 311, 312, subtracters 313, 314, controllers 320, 330, and a two-phase/three-phase converter.
  • a container 350 is provided. The operation of each component will be explained below.
  • the three-phase/two-phase converter 310 converts the detected values of the currents Iu, Iv, and Iw of the AC system into three-phase/two-phase according to the following equation (9) based on the phase ⁇ synchronized with the AC system voltage.
  • an effective current Iq and a reactive current Id are generated.
  • the transformation in equation (9) involves converting the currents Iu, Iv, and Iw into currents I ⁇ and I ⁇ on ⁇ coordinates by three-phase/two-phase transformation, and converting currents I ⁇ and I ⁇ on ⁇ coordinates by rotating coordinate transformation using the reference phase ⁇ . , and converted into currents Id and Iq of dq coordinates.
  • the adder 311 adds the active current command value Iq* generated by the total voltage control unit 200 and the negative phase active current command value Iqnavr* generated by the negative phase voltage compensation unit 21.
  • the subtracter 313 calculates the difference between the addition result of the adder 311 and the effective current Iq generated by the three-phase/two-phase converter 310.
  • the controller 320 makes the difference calculation result by the subtractor 313 zero, that is, makes the active current Iq follow the value obtained by adding the active current command value Iq* and the negative phase active current command value Iqnavr*. Perform feedback calculations.
  • Controller 320 may be a PI controller or some other controller.
  • the adder 312 receives a reactive current command value Id* determined from the operating conditions of the power converter 100 and a negative phase reactive current command generated by the negative phase voltage compensator 21.
  • the value Idnavr* is added.
  • the subtracter 314 calculates the difference between the addition result of the adder 312 and the reactive current Id generated by the three-phase/two-phase converter 310.
  • the controller 330 is configured to make the difference calculation result by the subtractor 314 zero, that is, to make the reactive current Id follow the sum of the reactive current command value Id* and the negative phase reactive current command value Idnavr*. Perform feedback calculations. Controller 330 may be a PI controller or some other controller.
  • controllers 320 and 330 each output an effective voltage command value Vq* and a reactive voltage command value Vd* on the dq axes as manipulated variables.
  • the two-phase/three-phase converter 350 uses the following equation (10) to convert the voltage command values Vd* and Vq* on the dq axes into three phases (U phase, V phase, W phase). are converted into AC voltage command values Vacu*, Vacv*, and Vacw*. Equation (10) is an inverse transformation of the three-phase/two-phase conversion of Equation (9). Two-phase/three-phase converter 350 outputs generated AC voltage command value Vac* (Vacu*, Vacv*, Vacw*) to voltage command value calculation section 700.
  • FIG. 15 is a block diagram showing a configuration example of the phase balance control section 500 of FIG. 12.
  • the phase balance control section 500 includes a second representative value calculation section 510, filters 511, 512, 513, a three-phase/two-phase converter 520, subtracters 523, 524, adders 525, 526, subtracters 527, 528, controllers 531, 532, two-phase/three-phase converter 540, circulating current calculation section 550, three-phase/two-phase converter A container 560 is provided. The operation of each component will be explained below.
  • the second representative value calculation unit 510 calculates a value Vcapu equivalent to the average value of the capacitor voltages of all the converter cells 110 in the U-phase leg circuit 108u, and an average value of the capacitor voltages of all the converter cells 110 in the V-phase leg circuit 108v. A value Vcapv corresponding to the value and a value Vcapw corresponding to the average value of the capacitor voltages of all converter cells 110 in the W-phase leg circuit 108w are calculated.
  • the values Vcapu, Vcapv, and Vcapw corresponding to the average value of the capacitor voltage of each phase include a component that oscillates at a frequency twice the system frequency. Therefore, the filters 511, 512, and 513 remove frequency components twice the system frequency from the values Vcapu, Vcapv, and Vcapw, which are equivalent to the average value of the capacitor voltage of the corresponding phase, respectively. Values corresponding to the average values of the capacitor voltages that have passed through the filters 511, 512, and 513 are written as Vcapu-, Vcapv-, and Vcapw-, respectively. As the filters 511, 512, 513, a moving average filter or a notch filter having a frequency twice the system frequency can be applied.
  • the three-phase/two-phase converter 520 converts the values Vcapu-, Vcapv-, and Vcapw-, which are equivalent to the average value of the capacitor voltages that have passed through the filters 511, 512, and 513, into three-phase/two-phase according to the following equation (11). By doing so, control values Vcapa and Vcapb are generated.
  • the subtracter 523 outputs a value (first representative value) Vcap_av* equivalent to the average value of all capacitor voltages output from the total voltage control unit 200 and a control value Vcapa generated by the three-phase/two-phase converter 520.
  • Calculate the deviation of The controller 521 executes a feedback calculation to make this deviation zero, that is, to make the control value Vcapa follow the value (first representative value) Vcap_av* equivalent to the average value of all capacitor voltages.
  • a circulating current command value Iza* for phase balance is generated.
  • the subtracter 524 uses the value (first representative value) Vcap_av* equivalent to the average value of all capacitor voltages output from the total voltage control unit 200 and the control generated by the three-phase/two-phase converter 520. Calculate the deviation from the value Vcapb.
  • the controller 522 executes a feedback calculation to make this deviation zero, that is, to make the control value Vcapb follow the value (first representative value) Vcap_av* equivalent to the average value of all capacitor voltages.
  • a circulating current command value Izb* for phase balance is generated.
  • the controllers 521 and 522 described above may be PI controllers or other controllers.
  • the adder 525 adds the circulating current command value Iza* for phase balance generated by the controller 521 and the circulating current command value Izpna* for positive/negative balance generated by the positive/negative balance control section 600. Further, the adder 526 adds the circulating current command value Izb* for phase balance generated by the controller 521 and the circulating current command value Izpnb* for positive/negative balance generated by the positive/negative balance control section 600.
  • the circulating current calculation unit 550 detects the detected values of the arm currents Ipu, Inu, Ipv, Inv, Ipw, and Inw detected by the arm current detection unit 13 and the DC current Idc detected by the DC current detection unit 111. Receive input with value. Using these values, the circulating current calculation unit 550 calculates the U-phase, V-phase, and W-phase circulating currents Izuc, Izvc, and Izwc according to equations (7B), (8C), and (8D) described above.
  • the three-phase/two-phase converter 560 converts the circulating currents Izuc, Izvc, and Izwc calculated by the circulating current calculation unit 550 into three-phase/two-phase converters according to the following equation (12) to obtain the control values Iza, Izb. generate.
  • the subtracter 527 adds the result of addition of the circulating current command value Iza* for phase balance and the circulating current command value Izpna* for positive/negative balance by the adder 525 described above, and the sum generated by the three-phase/two-phase converter 560.
  • the deviation from the control value Iza is calculated.
  • Controller 531 executes a feedback calculation to make this deviation zero, that is, to make control value Iza follow the sum of circulating current command values Iza* and Izpna*.
  • controller 532 executes a feedback calculation to make this deviation zero, that is, to make control value Izb follow the sum of circulating current command values Izb* and Izpnb*.
  • the controllers 531 and 532 described above may be PI controllers or other controllers.
  • the two-phase/three-phase converter 540 performs two-phase/three-phase conversion on the manipulated variables 531a and 531b output from the controllers 531 and 532, respectively.
  • W-phase voltage command values VzU*, VzV*, and VzW* are generated.
  • Two-phase/three-phase converter 540 is the inverse of three-phase/two-phase converters 520 and 560.
  • voltage command values VzU*, VzV*, and VzW* are collectively referred to, they are written as voltage command value Vz* as shown in FIG.
  • the generated circulating current voltage command value Vz* is output to the voltage command value calculation section 700.
  • FIG. 16 is a block diagram showing a configuration example of the positive/negative balance control section 600 of FIG. 12.
  • the positive/negative balance control section 600 includes a third representative value calculation section 610, subtracters 611 to 613, constant multipliers 614 to 616, filters 621 to 623, and controllers 631 to 633. , multipliers 651 to 653, three-phase/two-phase converter 660, adder 665, constant multiplier 670, subtractors 671 to 673, and controllers 681 to 683.
  • third representative value calculation section 610 receives input of detected values of capacitor voltage values Vcap of all converter cells 110. Based on these inputs, the third representative value calculation unit 610 calculates a value equivalent to the average value of the capacitor voltage Vcap of all converter cells 110 for each arm 109 (Vcapup_av, Vcapun_av, Vcapvp_av, Vcapvn_av, Vcapwp_av, Vcapwn_av). Calculate.
  • the subtracter 611 calculates the difference between a value Vcapup_av corresponding to the average value of the capacitor voltage of the U-phase positive side arm 109pu and a value Vcapun_av corresponding to the average value of the capacitor voltage of the U-phase negative side arm 109nu.
  • Constant multiplier 614 multiplies this difference value by 1/2.
  • Filter 621 removes these frequency oscillations from the multiplication result of constant multiplier 614.
  • the controller 631 performs a feedback operation on the value passed through the filter 621 in order to bring the difference between the values Vcapup_av and Vcapun_av, which correspond to the above average value, close to zero.
  • the subtracter 612 calculates the difference between the value Vcapvp_av, which corresponds to the average value of the capacitor voltage of the V-phase positive side arm 109pv, and the value Vcapvn_av, which corresponds to the average value of the capacitor voltage of the V-phase negative side arm 109nv.
  • Constant multiplier 615 multiplies this difference value by 1/2. In the value equivalent to the average value of the capacitor voltage of each arm 109, there are frequency vibrations that are the same as the system frequency and frequency vibrations that are twice the system frequency. Filter 622 removes these frequency oscillations from the multiplication result of constant multiplier 615.
  • the controller 632 performs a feedback operation on the value passed through the filter 622 in order to bring the difference between the values Vcapvp_av and Vcapvn_av, which correspond to the above average value, close to zero.
  • the subtracter 613 calculates the difference between the value Vcapwp_av, which corresponds to the average value of the capacitor voltage of the W-phase positive side arm 109pw, and the value Vcapwn_av, which corresponds to the average value of the capacitor voltage of the W-phase negative side arm 109nw.
  • Constant multiplier 616 multiplies this difference value by 1/2. In the value equivalent to the average value of the capacitor voltage of each arm 109, there are frequency vibrations that are the same as the system frequency and frequency vibrations that are twice the system frequency. Filter 623 removes these frequency oscillations from the multiplication result of constant multiplier 616.
  • the controller 633 performs a feedback operation on the value passed through the filter 623 in order to bring the difference between the values Vcapwp_av and Vcapwn_av, which correspond to the above average value, close to zero.
  • a moving average filter with the same frequency as the system frequency may be used, or a notch filter with the same frequency as the system frequency and a notch filter with twice the frequency may be used.
  • the controllers 631 to 633 for example, PI controllers or other controllers may be used.
  • the direction of the power flowing into the capacitor 7 (that is, the current (charging/discharging direction) must be reversed.
  • the AC voltage input and output to the power converter 101 has opposite polarity between the positive arm 109p and the negative arm 109n.
  • the output values of the controllers 631 to 633 described above are the magnitude of the alternating current necessary for balancing the capacitor voltage Vcap in the positive arm 109p and negative arm 109n of the U phase, V phase, and W phase, respectively. represents.
  • the multiplier 651 multiplies the output value of the controller 631 by a unit sine wave Vuunit, which is in phase with the U-phase AC voltage Vu and has a size of 1, to obtain the AC current of the U-phase fundamental wave component.
  • the multiplier 652 multiplies the output value of the controller 632 by a unit sine wave Vvunit, which is in phase with the V-phase AC voltage Vv and has a magnitude of 1, to obtain the AC current of the V-phase fundamental wave component.
  • the multiplier 653 multiplies the output value of the controller 633 by a unit sine wave Vwunit, which is in phase with the W-phase AC voltage Vw and has a magnitude of 1, to obtain the AC current of the W-phase fundamental wave component.
  • the three-phase/two-phase converter 660 performs three-phase/two-phase conversion on the multiplication results of the multipliers 651 to 653, thereby converting circulating current command values Izpna*, Izpnb* (generally referred to as (denoted as Izpn*).
  • the three-phase/two-phase converter 660 outputs the generated circulating current command value Izpn* for positive/negative balance to the phase balance control section 500.
  • the conversion matrix for the three-phase/two-phase conversion described above is the same as that described in equation (12) above.
  • AC voltage command value VpnU*, VpnV*, VpnW* (collectively referred to as AC voltage command value Vpn*) for U-phase, V-phase, and W-phase for positive/negative balance control. do.
  • the adder 665 adds the values that have passed through the filters 621 to 623. Constant multiplier 670 multiplies the addition result of adder 665 by 1/3. As a result, the neutral point voltage V0 is determined.
  • the subtracter 671 calculates the difference between the value passed through the filter 621 and the neutral point voltage V0.
  • the controller 681 generates a U-phase AC voltage command value VpnU* for positive/negative balance by executing a feedback calculation to make this difference zero.
  • the subtracter 672 calculates the difference between the value passed through the filter 622 and the neutral point voltage V0.
  • the controller 682 generates a V-phase AC voltage command value VpnV* for positive/negative balance by executing a feedback calculation to make this difference zero.
  • the subtracter 673 calculates the difference between the value passed through the filter 623 and the neutral point voltage V0.
  • the controller 683 generates the W-phase AC voltage command value VpnW* for positive/negative balance by executing a feedback calculation to make this difference zero.
  • the generated AC voltage command values Vpn* (VpnU*, VpnV*, VpnW*) for each phase are output to the voltage command value calculation unit 700 in FIG. 12.
  • controllers 681 to 683 for example, PI controllers or other controllers may be used.
  • the positive/negative balance control unit 600 outputs each phase DC component as a circulating current command value Izpn* (Izpna*, Izpnb*), and outputs each phase AC component as an AC voltage command value Vpn* (VpnU*, VpnV* , VpnW*).
  • the voltage command value calculation unit 700 uses a predetermined DC voltage command value Vdcc* and a voltage command value Vac* (Vacu*, Vacv*) output from the current control unit 300. , Vacw*), the voltage command value Vz* (VzU*, VzV*, VzW*) for circulating current control output from the phase balance control unit 500, and the voltage command value for positive/negative balance output from the positive/negative balance control unit 600.
  • An input of voltage command value Vpn* (VpnU*, VpnV*, VpnW*) is received.
  • the DC voltage command value Vdcc* is a voltage command value equivalent to 1/2 of the DC terminal voltage Vdc.
  • the voltage command value calculation unit 700 generates a voltage command value Vref for each arm 109 by distributing these voltage command values. Specifically, the voltage command value calculation unit 700 calculates the voltage command value Vrefpu for the U-phase positive arm 109pu, the voltage command value Vrefpv for the V-phase positive arm 109pv, and the voltage command value Vrefpv for the W-phase positive arm 109pw, according to the following equation (13). , the voltage command value Vrefpw of the U-phase negative arm 109nu, the voltage command value Vrefnv of the V-phase negative arm 109nv, and the voltage command value Vrefnw of the W-phase negative arm 109nw are calculated.
  • the voltage command value calculation unit 700 receives from the total voltage control unit 200 a total value Vcappu of the capacitor voltages of the U-phase positive arm 109pu, a total value Vcappv of the capacitor voltages of the V-phase positive arm 109pv, a total value Vcappv of the capacitor voltages of the V-phase positive arm 109pv, and a total value Vcappv of the capacitor voltages of the V-phase positive arm 109pv.
  • 109pw capacitor voltage total Vcappw U-phase negative arm 109nu total capacitor voltage Vcapnu, V-phase negative arm 109nv capacitor voltage total Vcapnv, and W-phase negative arm 109nw capacitor voltage total.
  • the voltage command value calculation unit 700 generates the arm modulation command value Krefpu for the U-phase positive arm by dividing the voltage command value Vrefpu for the U-phase positive arm by the total value Vcappu of the capacitor voltages of the same arm. Similarly, the voltage command value calculation unit 700 generates the arm modulation command value Krefpv for the V-phase positive side arm by dividing the voltage command value Vrefpv for the V-phase positive side arm by the total value Vcappv of the capacitor voltages of the same arm. do. The voltage command value calculation unit 700 generates the arm modulation command value Krefpw for the W-phase positive arm by dividing the voltage command value Vrefpw for the W-phase positive arm by the total value Vcappw of the capacitor voltages of the same arm.
  • the voltage command value calculation unit 700 generates the arm modulation command value Krefnu for the U-phase negative arm by dividing the voltage command value Vrefnu for the U-phase negative arm by the total value Vcapnu of the capacitor voltages of the same arm. . Similarly, the voltage command value calculation unit 700 generates the arm modulation command value Krefnv for the V-phase negative arm by dividing the voltage command value Vrefnv for the V-phase negative arm by the total value Vcapnv of the capacitor voltages of the same arm. do.
  • the voltage command value calculation unit 700 generates the arm modulation command value Krefnw of the W-phase negative arm by dividing the voltage command value Vrefnw of the W-phase negative arm by the total value Vcapnw of the capacitor voltages of the same arm.
  • arm modulation command value Kref When collectively referring to the arm modulation command values of each arm 109 or when indicating the arm modulation command value of any arm 109, it is written as arm modulation command value Kref.
  • the voltage command value calculation unit 700 outputs the arm modulation command value Kref of each arm 109 to the N gate signal generation units 900 corresponding to the N converter cells 110 that constitute the arm 109.
  • Each gate signal generation section 900 outputs a gate signal Ga for controlling on/off of the semiconductor switching element 8 provided in the corresponding converter cell 110 based on the arm modulation command value Kref.
  • each gate signal generation unit 900 generates a gate signal Ga that controls the on/off of the semiconductor switching element 8 of the corresponding converter cell 110 in PWM (Pulse Width Modulation) based on the comparison between the arm modulation command value Kref and the carrier wave. generate.
  • the negative phase voltage compensator 21 is the same as in the first and second embodiments.
  • negative sequence voltage control is enabled during steady state and disabled during system faults. Thereby, the system voltage can be stabilized while preventing the capacitor voltage of the three-phase Y-connected MMC converter from becoming unbalanced between phases.

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PCT/JP2022/031724 WO2024042612A1 (ja) 2022-08-23 2022-08-23 電力変換装置
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WO2014162620A1 (ja) 2013-04-02 2014-10-09 三菱電機株式会社 電力変換装置
JP2017163765A (ja) * 2016-03-11 2017-09-14 富士電機株式会社 電力変換器の制御装置
JP2020178425A (ja) * 2019-04-16 2020-10-29 富士電機株式会社 電力変換装置
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JPH06113466A (ja) 1992-09-30 1994-04-22 Chubu Electric Power Co Inc 電圧不平衡補償装置の制御装置
JP2013005694A (ja) * 2011-06-21 2013-01-07 Central Research Institute Of Electric Power Industry 無効電力補償装置、無効電力補償方法、および無効電力補償プログラム
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WO2026013795A1 (ja) * 2024-07-10 2026-01-15 三菱電機株式会社 電力変換装置

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