WO2024001050A1 - 显示驱动电路及显示装置 - Google Patents

显示驱动电路及显示装置 Download PDF

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Publication number
WO2024001050A1
WO2024001050A1 PCT/CN2022/136626 CN2022136626W WO2024001050A1 WO 2024001050 A1 WO2024001050 A1 WO 2024001050A1 CN 2022136626 W CN2022136626 W CN 2022136626W WO 2024001050 A1 WO2024001050 A1 WO 2024001050A1
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Prior art keywords
field effect
thin film
effect transistor
film field
module
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PCT/CN2022/136626
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English (en)
French (fr)
Inventor
袁鑫
周秀峰
李荣荣
Original Assignee
绵阳惠科光电科技有限公司
惠科股份有限公司
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Priority to EP22896849.1A priority Critical patent/EP4325474A1/en
Priority to BR112023023993A priority patent/BR112023023993A2/pt
Priority to KR1020237020347A priority patent/KR20240002975A/ko
Publication of WO2024001050A1 publication Critical patent/WO2024001050A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

Definitions

  • the present application relates to the field of display technology, and in particular to display driving circuits and display devices.
  • a display device is usually provided with several pixel circuits.
  • an OLED (Organic Light-Emitting Diode, organic light-emitting diode) display device is usually provided with several pixel circuits including OLEDs.
  • the plurality of pixels The circuits are arranged in an array, and the power end of each pixel circuit is connected to a power line to receive the power signal. Different pixel circuits are connected to different power lines.
  • the disadvantage of the existing technology is that since each pixel circuit is connected to a separate power line, the number of power lines in the display device is large, and the wiring of the power lines is relatively complicated, which can easily lead to a large amount of parasitic capacitance between the power lines. , and the signal interference between power lines is relatively serious. In addition, it is easy for the power lines to occupy too much space, which imposes great restrictions on the circuit design in the display device. Therefore, affected by the above factors, existing display devices The display effect is poor.
  • the main technical problem solved by this application is how to improve the display effect of the display device.
  • the first technical solution adopted in this application is: a display driving circuit, including a plurality of pixel circuits; the data end of each pixel circuit is connected to a corresponding data line, and the data line is used to provide a data signal ; The gate terminal of each pixel circuit is connected to the corresponding gate line, and the gate line is used to provide the gate signal; the power terminals of the N1 pixel circuits in the multiple pixel circuits are all connected to the same first common line, and the A common line is used to provide a power supply voltage signal, and N1 is greater than 1 and not greater than the first common number; the first common number is related to the characteristic parameters of the thin film field effect transistor in the pixel circuit and the current in one of the N1 pixel circuits.
  • a display driving circuit including a plurality of pixel circuits; the data end of each pixel circuit is connected to a corresponding data line, and the data line is used to provide a data signal ;
  • the gate terminal of each pixel circuit is connected to the corresponding gate line,
  • the characteristic parameters of the thin film field effect transistor in the pixel circuit are also positively correlated with the mobility of the thin film field effect transistor and the structural capacitance of the thin film field effect transistor.
  • the characteristic parameter of the thin film field effect transistor is the quotient obtained by dividing the fourth value by the length of the channel of the thin film field effect transistor.
  • the fourth value is the mobility of the thin film field effect transistor and the width of the channel of the thin film field effect transistor. and the product of the structural capacitance of the thin film field effect transistor.
  • the first common number is a quarter power of the first value
  • the first value is the quotient obtained by dividing the first preset constant by the second value
  • the second value is the thin film field effect transistor in the pixel circuit.
  • the product of the characteristic parameter and a third value, the third value being the square of the product of the resistance of the power supply voltage signal line between adjacent pixel circuits in the plurality of pixel circuits and the current in the pixel circuit.
  • the first shared quantity is a value determined based on the first calculation formula; the first calculation formula is:
  • n 1 is the first common number
  • H 1 is the first preset constant
  • k is the characteristic parameter of the thin film field effect transistor
  • I is the current in the pixel circuit
  • R 1 is the current between adjacent pixel circuits in multiple pixel circuits.
  • the resistance of the power supply voltage signal line ⁇ is the mobility of the thin film field effect transistor
  • W is the channel width of the thin film field effect transistor
  • L is the channel length of the thin film field effect transistor
  • C is the structural capacitance of the thin film field effect transistor. .
  • the first preset constant has a positive correlation with the current in the pixel circuit and a negative correlation with the current fluctuation value between adjacent pixel circuits.
  • the initialization signal receiving ends of N2 pixel circuits in the plurality of pixel circuits are all connected to the same second common line, and the second common line is used to provide the initialization signal, and N2 is greater than 1 and not greater than the second common number;
  • the number of shares is negatively correlated with the characteristic parameters of the thin film field effect transistor in the pixel circuit, the current in one pixel circuit among the N2 pixel circuits, and the resistance of the initialization signal line between adjacent pixel circuits in the N2 pixel circuits.
  • the characteristic parameters of the thin film field effect transistor in the pixel circuit are also positively correlated with the mobility of the thin film field effect transistor and the structural capacitance of the thin film field effect transistor.
  • the pixel circuit includes a first light-emitting control module, a driving module, a second light-emitting control module, a switch module, a storage module, an initialization module, a data writing module and a light-emitting module; the input end of the data writing module is used to receive data signals, The output end of the data writing module is connected to the input end of the second light-emitting control module. The input end of the first light-emitting control module is used to receive the power supply voltage signal. The output end of the first light-emitting control module is connected to the input end of the driving module.
  • the output end is connected to the input end of the second light-emitting control module, the output end of the second light-emitting control module is connected to the input end of the light-emitting module, the output end of the light-emitting module is used to receive the ground voltage signal, and the input end of the initialization module is used to receive the initialization signal.
  • the first output end of the initialization module is connected to the input end of the storage module, the second output end of the initialization module is connected to the input end of the light-emitting module, the first output end of the storage module is connected to the input end of the switch module, and the second output end of the storage module is connected to The driving end of the driving module and the output end of the switch module are connected to the input end of the driving module.
  • the second technical solution adopted by this application is: a display device including a light-emitting display module and the above-mentioned display driving circuit.
  • N1 pixel circuits sharing the same first common line to receive the power supply voltage signal are provided to reduce the display cost.
  • the number of first common lines in the device reduces wiring complexity and parasitic capacitance between lines, reduces signal interference between lines, and reduces the space occupied by lines.
  • the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit due to the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit, the current in one pixel circuit among the N1 pixel circuits, and the power supply voltage signal line between adjacent pixel circuits among the N1 pixel circuits
  • the resistances of the thin film field effect transistor are negatively correlated, and the characteristic parameters of the thin film field effect transistor are positively correlated with the channel width to length ratio of the thin film field effect transistor.
  • the first common number can be determined through the above correlations, and make N1 greater than 2 and not Greater than the first common number, it avoids pixel circuits connected to the same first common line from having pixel circuits with greatly different line lengths connected to the first common line, and further avoids large differences in line resistance due to large line length differences.
  • the present application reduces the number of first common lines and prevents other negative effects caused by reducing the number of first common lines, thereby improving the display effect of the display device.
  • Figure 2 is a schematic structural diagram of an embodiment of the pixel circuit of the present application.
  • Figure 3 is a schematic structural diagram of an embodiment of the display device of the present application.
  • FIG. 4 is a schematic structural diagram of an embodiment of the display driving circuit of the present application.
  • first and second in this application are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • plural means at least two, such as two, three, etc., unless otherwise clearly and specifically limited.
  • the terms “including” and “having” and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes Other steps or units inherent to such processes, methods, products or devices.
  • the display driving circuit in this application may include multiple pixel circuits composed of multiple "2T1C pixel circuits".
  • FIG. 4 is a schematic structural diagram of an embodiment of the display driving circuit of the present application.
  • the display driving circuit includes multiple pixel circuits 11.
  • One pixel circuit 11 includes two thin film field effect transistors and a capacitor. Multiple pixels
  • the power terminals of the circuits 11 are all connected to the same common power line (VDD), and each pixel circuit 11 is also connected to the negative power line (VSS), the data line (DATA) and the gate line (GATE) respectively.
  • VDD common power line
  • VSS negative power line
  • DATA data line
  • GATE gate line
  • the pixel circuit in the display driving circuit of the present application can also be other types of pixel circuits besides the "2T1C pixel circuit". The details can be determined according to actual needs and are not limited here.
  • FIG. 1 is a schematic structural diagram of an embodiment of the display driving circuit of this application.
  • the display driving circuit includes a plurality of pixel circuits 11 .
  • each pixel circuit 11 is connected to a corresponding data line, and the data line is used to provide data signals.
  • the gate terminal of each pixel circuit 11 is connected to a corresponding gate line, and the gate line is used to provide gate signals.
  • the power terminals of the N1 pixel circuits 11 in the plurality of pixel circuits 11 are respectively connected to the same first common line to receive the power supply voltage signal provided by the same first common line.
  • the total number of the N1 pixel circuits is greater than 2 and Not greater than the first common number, that is, N1 is greater than 2 and not greater than the first common number.
  • the first common number is related to the characteristic parameters of the thin film field effect transistors in the pixel circuit 11, the current in one pixel circuit 11 among the N1 pixel circuits 11, and the current between adjacent pixel circuits 11 among the N1 pixel circuits 11.
  • the resistance of the power supply voltage signal line is negatively correlated, and the characteristic parameters of the thin film field effect transistor are positively correlated with the channel width to length ratio of the thin film field effect transistor. Based on the above positive correlation and negative correlation, the first common number can always adapt to the actual situation of the display driving circuit.
  • the first pixel circuit set 20 may include the above-mentioned N1 pixel circuits.
  • Each pixel circuit 11 in the display driving circuit of a display device usually belongs to the pixel circuit 11 of the same specification, that is, multiple pixel circuits 11 .
  • the characteristic parameters of the thin film field effect transistor corresponding to each pixel circuit 11 in the pixel circuit 11, the resistance of the power supply voltage signal line between adjacent pixel circuits 11 in the plurality of pixel circuits 11, and the current of one pixel circuit 11 are all the same or can be regarded as the same.
  • the quantity calculation method determines the above-mentioned first shared quantity.
  • the pixel circuit can be an OLED pixel circuit or other types of pixel circuits. The details can be determined according to actual needs and are not limited here. In practice, a layer of metal jumper can be added to the traditional pixel circuit to connect the first common line, or the pixel circuit can be connected to the first common line through other methods, which are not limited here.
  • the maximum number of pixel circuits 11 sharing the same first common line (ie, the above-mentioned first common number) can be determined based on the relevant data between the pixel circuits 11 in the display driving circuit, and such that the N1 pixels
  • the number of circuits 11 does not exceed the maximum number, so that the total resistance of the connection lines between the N1 pixel circuits 11 and the power supply voltage signal line 111 is almost the same, which improves the efficiency of each pixel in the N1 pixel circuits 11.
  • the uniformity of the amplitude of the power supply voltage signal received by the circuit 11 improves the display effect of the display device including the display driving circuit.
  • N1 pixel circuits sharing the same first common line to receive the power supply voltage signal are provided, so as to reduce the number of first common lines in the display device. quantity, reduce wiring complexity and parasitic capacitance between lines, reduce signal interference between lines, and reduce the space occupied by lines.
  • the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit due to the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit, the current in one pixel circuit among the N1 pixel circuits, and the power supply voltage signal line between adjacent pixel circuits among the N1 pixel circuits
  • the resistances of the thin film field effect transistor are negatively correlated, and the characteristic parameters of the thin film field effect transistor are positively correlated with the channel width to length ratio of the thin film field effect transistor.
  • the first common number can be determined through the above correlations, and make N1 greater than 2 and not Greater than the first common number, it avoids pixel circuits connected to the same first common line from having pixel circuits with greatly different line lengths connected to the first common line, and further avoids large differences in line resistance due to large line length differences.
  • the present application reduces the number of first common lines and prevents other negative effects caused by reducing the number of first common lines, thereby improving the display effect of the display device.
  • the characteristic parameters of the thin film field effect transistor in the pixel circuit 11 are also positively correlated with the mobility of the thin film field effect transistor and the structural capacitance of the thin film field effect transistor.
  • the larger the channel width-to-length ratio of a thin film field effect transistor the larger the characteristic parameters of the corresponding thin film field effect transistor will be.
  • the size of the characteristic parameters of the thin film field effect transistors in the pixel circuit 11 can be further accurately determined, thereby improving the rationality of the first common number, thereby further improving the display effect of the display device.
  • the characteristic parameter of the thin film field effect transistor is a quotient obtained by dividing the fourth value by the length of the channel of the thin film field effect transistor.
  • the fourth value is the mobility of the thin film field effect transistor, the channel of the thin film field effect transistor. The product of the width and the construction capacitance of the thin film field effect transistor.
  • the pixel circuit 11 is usually equipped with a TFT (Thin Film Transistor, thin film field effect transistor), and the mobility, channel width, and channel length of any TFT in the pixel circuit 11 can be obtained, and the TFT in the TFT can be obtained.
  • the capacitance value of the capacitor composed of the metal layer, the insulating layer and the active layer is recorded as the structural capacitance.
  • the characteristic parameters of the TFT in the pixel circuit 11 can be determined according to various parameters of the TFT, so that the above-mentioned first common number can be further determined based on the characteristic parameters, so as to increase the power supply voltage received by each pixel circuit 11
  • the uniformity of signal amplitude improves the display effect of the display device.
  • the first common number is a quarter power of a first value
  • the first value is a quotient obtained by dividing the first preset constant by a second value
  • the second value is the thin film in the pixel circuit
  • the product of the characteristic parameter of the field effect transistor and a third value, the third value being the square of the product of the resistance of the power supply voltage signal line between adjacent pixel circuits in the plurality of pixel circuits and the current in the pixel circuit.
  • the first common number can be obtained by combining the relevant parameters of each pixel circuit 11 in the display driving circuit.
  • the first common quantity may be a value determined based on the first calculation process.
  • the first calculation process includes:
  • the second value is obtained by multiplying the current of one pixel circuit by the resistance of the power supply voltage signal line between adjacent pixel circuits.
  • the fourth value is raised to the fourth power to obtain the first common quantity.
  • the above-mentioned first value is the characteristic parameter of the above-mentioned thin film field effect transistor.
  • the above-mentioned first calculation process can also be expressed by a first calculation formula, that is, the first common quantity can be a value determined based on the first calculation formula.
  • the first calculation formula is as follows:
  • n 1 is the first common number
  • H 1 is the first preset constant
  • k is the characteristic parameter of the thin film field effect transistor
  • I is the current in the pixel circuit
  • R 1 is The resistance of the power supply voltage signal line between adjacent pixel circuits in the plurality of pixel circuits
  • ⁇ is the mobility of the thin film field effect transistor
  • W is the width of the channel of the thin film field effect transistor
  • L is the The length of the channel of the thin film field effect transistor
  • C is the structural capacitance of the thin film field effect transistor.
  • the first preset constant has a positive correlation with the current in the pixel circuit 11 and a negative correlation with the current fluctuation value between adjacent pixel circuits.
  • the current fluctuation value between adjacent pixel circuits is the current difference between adjacent pixel circuits 11 .
  • the current difference usually needs to be limited to 2%-3% of the current in the pixel circuit 11 .
  • the first preset constant may also be within a first preset constant range, and the preset constant range may be determined based on the actual operating hardware conditions and/or operating environment conditions of the display device, for example, the first A preset constant range may be 0.08-0.12, or may be other ranges, which are not limited here.
  • the initialization signal receiving ends of the N2 pixel circuits in the plurality of pixel circuits 11 are respectively connected to the same second common line to receive the initialization signal provided by the same second common line.
  • the N2 pixel circuits The total quantity is greater than 2 and not greater than the second common quantity, that is, N2 is greater than 2 and not greater than the second common quantity.
  • the second common number is related to the characteristic parameters of the thin film field effect transistors in the pixel circuit 11, the current in one pixel circuit 11 among the N2 pixel circuits 11, and the current between adjacent pixel circuits 11 among the N2 pixel circuits 11.
  • the resistance of the initialization signal lines is negatively correlated, and the characteristic parameters of the thin film field effect transistor are positively correlated with the channel width to length ratio of the thin film field effect transistor. Based on the above positive correlation and negative correlation, the second common number can always adapt to the actual situation of the display driving circuit.
  • the second pixel circuit set 30 may include the above-mentioned N2 pixel circuits.
  • Each pixel circuit 11 in the display driving circuit of a display device usually belongs to the pixel circuit 11 of the same specification, that is, multiple pixel circuits 11 .
  • the characteristic parameters of the thin film field effect transistor corresponding to each pixel circuit 11 in the pixel circuit 11, the resistance of the initialization signal line between adjacent pixel circuits 11 in the plurality of pixel circuits 11, and the current of one pixel circuit 11 are all the same or can be are regarded as the same, therefore, based on the characteristic parameter and the resistance corresponding to any one pixel circuit 11, and the resistance of the initialization signal line 112 between any two adjacent pixel circuits 11, according to the second common number Calculation method to determine the second shared quantity above.
  • the maximum number of pixel circuits 11 sharing the same second common line (ie, the above-mentioned second common number) can be determined based on the relevant data between the pixel circuit 11 and adjacent pixel circuits 11, and such that the N2 pixels
  • the number of pixel circuits 11 in the circuit 11 does not exceed the maximum number, so that the total resistance of the connection lines between each of the N2 pixel circuits 11 and the initialization signal line 112 is almost the same, which improves the
  • the uniformity of the amplitude of the initialization signal received by each pixel circuit 11 makes the results of the initialization processing performed by each pixel circuit 11 based on the initialization signal consistent, improving the display effect of the display device including the display driving circuit.
  • the pixel circuits 11 included in a first pixel circuit set 20 and a second pixel circuit set 30 may be completely identical, completely different, or partially identical, that is, connected to the same first pixel circuit set 30 .
  • the plurality of pixel circuits 11 of the common line may all be connected to the same second common line, part of them may be connected to the same second common line, or they may all be connected to different second common lines. For example, as shown in FIG. 1 , among the first pixel circuit set 20 and the second pixel circuit set 30 , only two pixel circuits 11 are connected to the same first common line 12 and the same second common line 13 at the same time. .
  • the characteristic parameters of the thin film field effect transistor in the pixel circuit 11 are also positively correlated with the mobility of the thin film field effect transistor and the structural capacitance of the thin film field effect transistor respectively.
  • the larger the channel width-to-length ratio of a thin film field effect transistor the larger the characteristic parameters of the corresponding thin film field effect transistor will be.
  • the size of the characteristic parameters of the thin film field effect transistors in the pixel circuit 11 can be further accurately determined, thereby improving the rationality of the first common number, thereby further improving the display effect of the display device.
  • the characteristic parameter of the thin film field effect transistor is a quotient obtained by dividing the fourth value by the length of the channel of the thin film field effect transistor.
  • the fourth value is the mobility of the thin film field effect transistor, the channel length of the thin film field effect transistor.
  • a TFT Thin Film Transistor, thin film field effect transistor
  • the mobility, channel width, and channel length of any TFT in the pixel circuit 11 can be obtained, and the TFT in the TFT can be obtained.
  • the capacitance value of the capacitor composed of the metal layer, the insulating layer and the active layer is recorded as the structural capacitance.
  • the characteristic parameters of the TFT in the pixel circuit 11 can be determined according to various parameters of the TFT, so that the above-mentioned second common number can be further determined based on the characteristic parameters, so as to improve the initialization signal received by each pixel circuit 11
  • the uniformity of the amplitude improves the display effect of the display device.
  • the second common number is the fourth power of the fifth value
  • the fifth value is the quotient obtained by dividing the second preset constant by the sixth value
  • the sixth value is the thin film field effect in the pixel circuit
  • the product of the characteristic parameter of the transistor and a seventh value, the seventh value being the square of the product of the resistance of the initialization signal line between adjacent pixel circuits in the plurality of pixel circuits and the current in the pixel circuit.
  • the second common quantity may be a value determined based on the second calculation process.
  • a sixth value is obtained by multiplying the current of one pixel circuit by the resistance of the initialization signal line between adjacent pixel circuits.
  • the eighth value is raised to the fourth power to obtain the second common quantity.
  • the fifth value is the characteristic parameter of the thin film field effect transistor.
  • the above-mentioned second calculation process can also be expressed by a second calculation formula, that is, the second common quantity can be a value determined based on the second calculation formula.
  • the second calculation formula is as follows:
  • n 2 is the second common number
  • H 2 is the second preset constant
  • k is the characteristic parameter of the thin film field effect transistor
  • I is the current in the pixel circuit
  • R 2 is The resistance of the initialization signal line between adjacent pixel circuits in the plurality of pixel circuits
  • ⁇ is the mobility of the thin film field effect transistor
  • W is the width of the channel of the thin film field effect transistor
  • L is the The length of the channel of the thin film field effect transistor
  • C is the structural capacitance of the thin film field effect transistor.
  • the pixel circuit 11 includes a first light-emitting control module 41, a driving module 42, a second light-emitting control module 43, and a switch.
  • Module 44 storage module 45, initialization module 46, data writing module 47 and light emitting module 48.
  • the input end of the data writing module 47 is used to receive data signals
  • the output end of the data writing module 47 is connected to the input end of the second lighting control module 43
  • the input end of the first lighting control module 41 is used to receive the power supply voltage signal.
  • the output end of a light-emitting control module 41 is connected to the input end of the driving module 42
  • the output end of the driving module 42 is connected to the input end of the second light-emitting control module 43
  • the output end of the second light-emitting control module 43 is connected to the input end of the light-emitting module 48.
  • the output end of the light-emitting module 48 is used to receive the ground voltage signal
  • the input end of the initialization module 46 is used to receive the initialization signal
  • the first output end of the initialization module 46 is connected to the input end of the storage module 45
  • the second output end of the initialization module 46 is connected to
  • the input terminal of the light-emitting module 48 and the first output terminal of the storage module 45 are connected to the input terminal of the switch module 44.
  • the second output terminal of the storage module 45 is connected to the driving terminal of the driving module 42.
  • the output terminal of the switching module 44 is connected to the driving terminal of the driving module 42. input terminal.
  • the pixel circuit 11 further includes a thin film field effect transistor 49 .
  • the output end of the data writing module 47 is connected to the first end of the thin film field effect transistor 49, the second end of the thin film field effect transistor 49 is connected to the input end of the second light emitting control module 43, and the driving end of the thin film field effect transistor 49 is used to receive The gate signal, the driving end of the first lighting control module 41 and the driving end of the second lighting control module 43 are both used to receive the lighting control signal.
  • FIG. 3 is a schematic structural diagram of an embodiment of the display device of this application.
  • the display device 50 includes a light-emitting display module 51 and a display driving circuit 52.
  • the display driving circuit 52 can It is any display driving circuit in the previous embodiments.
  • the display device may be a vehicle-mounted display device, a television, a mobile terminal display, or other types of display devices, which are not limited here.
  • N1 pixel circuits sharing the same first common line to receive the power supply voltage signal are provided, so as to reduce the number of first common lines in the display device. quantity, reduce wiring complexity and parasitic capacitance between lines, reduce signal interference between lines, and reduce the space occupied by lines.
  • the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit due to the first common number and the characteristic parameters of the thin film field effect transistor in the pixel circuit, the current in one pixel circuit among the N1 pixel circuits, and the power supply voltage signal line between adjacent pixel circuits among the N1 pixel circuits
  • the resistances of the thin film field effect transistor are negatively correlated, and the characteristic parameters of the thin film field effect transistor are positively correlated with the channel width to length ratio of the thin film field effect transistor.
  • the first common number can be determined through the above correlations, and make N1 greater than 2 and not Greater than the first common number, it avoids pixel circuits connected to the same first common line from having pixel circuits with greatly different line lengths connected to the first common line, and further avoids large differences in line resistance due to large line length differences.
  • the present application reduces the number of first common lines and prevents other negative effects caused by reducing the number of first common lines, thereby improving the display effect of the display device.

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Abstract

显示驱动电路及显示装置，该显示驱动电路包括多个像素电路（11）；每一个像素电路（11）的数据端与对应的数据线连接，数据线用于提供数据信号；每一个像素电路（11）的栅极端与对应的栅极线连接，栅极线用于提供栅极信号；多个像素电路（11）中的N1个像素电路（11）的电源端均与同一条第一公共线（12）连接，第一公共线（12）用于提供电源电压信号，N1大于1且不大于第一共用数量；第一共用数量与像素电路（11）中的薄膜场效应晶体管的特性参数、N1个像素电路（11）中的一像素电路（11）中的电流和N1个像素电路（11）中的相邻像素电路（11）之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系。基于该方式，可有效改善显示装置的显示效果。

Description

显示驱动电路及显示装置
相关申请的交叉引用
本申请要求享有于2022年06月27日提交的名称为“显示驱动电路及显示装置”的中国专利申请2022107440219的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本申请涉及显示技术领域，特别是涉及显示驱动电路及显示装置。
背景技术
现有技术中，显示装置中通常会设置有若干个像素电路，例如在OLED(Organic Light-Emitting Diode，有机发光二极管)显示装置中通常会设置有若干个包含OLED的像素电路，该若干个像素电路按照阵列排布，并使得每一个像素电路的电源端分别与一电源线连接以接收电源信号，不同像素电路所连接的电源线不同。
现有技术的缺陷在于，由于每一个像素电路均连接了单独一条电源线，使得显示装置中电源线的数量较多，电源线走线较为复杂，易导致电源线之间产生的寄生电容较多，且电源线之间的信号干扰较为严重，此外，还易导致电源线占用过多空间，从而对显示装置中的电路设计造成了较大限制，因此，受上述因素的影响，现有显示装置的显示效果较差。
发明内容
本申请主要解决的技术问题是如何改善显示装置的显示效果。
为了解决上述技术问题，本申请采用的第一个技术方案是：一种显示驱动电路，包括多个像素电路；每一个像素电路的数据端与对应的数据线连接，数据线用于提供数据信号；每一个像素电路的栅极端与对应的栅极线连接，栅极线用于提供栅极 信号；多个像素电路中的N1个像素电路的电源端均与同一条第一公共线连接，第一公共线用于提供电源电压信号，N1大于1且不大于第一共用数量；第一共用数量与像素电路中的薄膜场效应晶体管的特性参数、N1个像素电路中的一像素电路中的电流和N1个像素电路中的相邻像素电路之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系。
其中，像素电路中的薄膜场效应晶体管的特性参数还分别与薄膜场效应晶体管的迁移率、薄膜场效应晶体管的构造电容呈正相关关系。
其中，薄膜场效应晶体管的特性参数为将第四值除以薄膜场效应晶体管的沟道的长度得到的商，第四值为薄膜场效应晶体管的迁移率、薄膜场效应晶体管的沟道的宽度和薄膜场效应晶体管的构造电容的乘积。
其中，第一共用数量为第一值的四分之一次方，第一值为将第一预设常数除以第二值得到的商，第二值为像素电路中的薄膜场效应晶体管的特性参数与第三值的乘积，第三值为多个像素电路中相邻像素电路之间的电源电压信号线路的电阻与像素电路中的电流的乘积的二次方。
其中，第一共用数量为基于第一计算公式确定的值；第一计算公式为：
Figure PCTCN2022136626-appb-000001
n 1为第一共用数量，H 1为第一预设常数，k为薄膜场效应晶体管的特性参数，I为像素电路中的电流，R 1为多个像素电路中相邻像素电路之间的电源电压信号线路的电阻，μ为薄膜场效应晶体管的迁移率，W为薄膜场效应晶体管的沟道的宽度，L为薄膜场效应晶体管的沟道的长度，C为薄膜场效应晶体管的构造电容。
其中，第一预设常数与像素电路中的电流呈正相关关系，且与相邻像素电路之间的电流波动值呈负相关关系。
其中，多个像素电路中的N2个像素电路的初始化信号接收端均与同一条第二公共线连接，第二公共线用于提供初始化信号，N2大于1且不大于第二共用数量；第 二共用数量与像素电路中的薄膜场效应晶体管的特性参数、N2个像素电路中的一像素电路中的电流和N2个像素电路中的相邻像素电路之间的初始化信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系。
其中，像素电路中的薄膜场效应晶体管的特性参数还分别与薄膜场效应晶体管的迁移率、薄膜场效应晶体管的构造电容呈正相关关系。
其中，像素电路包括第一发光控制模块、驱动模块、第二发光控制模块、开关模块、存储模块、初始化模块、数据写入模块和发光模块；数据写入模块的输入端用于接收数据信号，数据写入模块的输出端连接第二发光控制模块的输入端，第一发光控制模块的输入端用于接收电源电压信号，第一发光控制模块的输出端连接驱动模块的输入端，驱动模块的输出端连接第二发光控制模块的输入端，第二发光控制模块的输出端连接发光模块的输入端，发光模块的输出端用于接收地电压信号，初始化模块的输入端用于接收初始化信号，初始化模块的第一输出端连接存储模块的输入端，初始化模块的第二输出端连接发光模块的输入端，存储模块的第一输出端连接开关模块的输入端，存储模块的第二输出端连接驱动模块的驱动端，开关模块的输出端连接驱动模块的输入端。
为了解决上述技术问题，本申请采用的第二个技术方案是：一种显示装置，包括发光显示模组和上述显示驱动电路。
本申请的有益效果在于：区别于现有技术，在本申请的技术方案中，多个像素电路中，设置有共用同一条第一公共线以接收电源电压信号的N1个像素电路，以减少显示装置中第一公共线的数量，降低走线复杂度和线路间的寄生电容，降低线路间的信号干扰，减少线路所占用空间。此外，由于第一共用数量与像素电路中的薄膜场效应晶体管的特性参数、N1个像素电路中的一像素电路中的电流和N1个像素电路中的相邻像素电路之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系，可通过上述各相关关系确定出第一共用数量，并使得N1大于2且不大于第一共用数量，避免使得连接同一第一公共线的像素电路中，出现连接第一公共线的线路长度相差较大的像素电路，进一步避免因线路长度相差较大而导致线路电阻相差较大，进而导致各像素电路所接收到的 电源电压信号不均一的情况发生。本申请基于上述方式，减少了第一公共线的数量且防止因减少第一公共线数量而引发其它负面影响，改善了显示装置的显示效果。
附图说明
图1是本申请显示驱动电路的一实施例的结构示意图；
图2是本申请像素电路的一实施例的结构示意图；
图3是本申请显示装置的一实施例的结构示意图；
图4是本申请显示驱动电路的一实施例的结构示意图。
附图标记：像素电路11，电源电压信号线路111，初始化信号线路112，第一公共线12，第二公共线13，第一像素电路集合20，第二像素电路集合30，第一发光控制模块41，驱动模块42，第二发光控制模块43，开关模块44，存储模块45，初始化模块46，数据写入模块47和发光模块48，薄膜场效应晶体管49，显示装置50，发光显示模组51，显示驱动电路52。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，均属于本申请保护的范围。
本申请中的术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。此外，术语“包括”和“具有”以及它们任何变形，意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元，而是可选地还包括没有列出的步骤或单元，或可选地还包括对于这些过程、方法、产品或设备固有的其它步骤或单元。
首先对本申请提及的显示装置中的多个像素电路进行举例说明，本申请中的显示驱动电路，可以包括由多个“2T1C像素电路”构成的多个像素电路，具体请参见图4，图4是本申请显示驱动电路的一实施例的结构示意图，如图4所示，显示驱动电路 包括多个像素电路11，一个像素电路11中包括两个薄膜场效应晶体管和一个电容，多个像素电路11的电源端均连接同一条电源公共线(VDD)，各像素电路11还分别与电源负极线(VSS)、数据线(DATA)和栅极线(GATE)连接。基于上述方式，即可构造出多个像素电路11均与同一条电源公共线连接的显示驱动电路，也是后续本申请显示驱动电路的基本构造。
此外，本申请显示驱动电路中的像素电路还可以是除“2T1C像素电路”以外的其它类型的像素电路，具体可根据实际需求而定，此处不作限定。
本申请首先提出一种显示驱动电路，如图1所示，图1是本申请显示驱动电路的一实施例的结构示意图，显示驱动电路包括多个像素电路11。
每一个像素电路11的数据端与对应的数据线连接，数据线用于提供数据信号，每一个像素电路11的栅极端与对应的栅极线连接，栅极线用于提供栅极信号。
多个像素电路11中的N1个像素电路11的电源端分别与同一条第一公共线连接，以接收同一条第一公共线提供的电源电压信号，该N1个像素电路的总数量大于2且不大于第一共用数量，也即，N1大于2且不大于第一共用数量。
其中，第一共用数量与像素电路11中的薄膜场效应晶体管的特性参数、N1个像素电路11中的一像素电路11中的电流和N1个像素电路11中的相邻像素电路11之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系。基于上述正相关关系和负相关关系，可使得第一共用数量总能适应显示驱动电路的实际情况。
具体地，如图1所示，第一像素电路集合20可包括上述N1个像素电路，一显示装置的显示驱动电路中的各像素电路11通常属于同一规格的像素电路11，也即，多个像素电路11中的各像素电路11所对应的薄膜场效应晶体管的特性参数、多个像素电路11中相邻像素电路11之间的电源电压信号线路的电阻、一像素电路11的电流均相同或可视作相同，因此，可基于任意一像素电路11所对应的该特性参数和该电阻，以及任意两个相邻像素电路11之间的电源电压信号线路111的电阻，根据上述第第一共用数量的计算方式，确定上述第一共用数量。
像素电路可以是OLED像素电路，也可以是其它类型的像素电路，具体可根据实际需求而定，此处不作限定。在实际中，可在传统像素电路的基础上增加一层金属跨线，用于连接第一公共线，也可通过其它方式使像素电路连接第一公共线，此处不 作限定。
基于上述方式，可基于显示驱动电路中的各像素电路11之间的相关数据，确定共用同一第一公共线的像素电路11的最大数量(即上述第一共用数量)，并使得该N1个像素电路11的数量不超过该最大数量，进而可使得N1个像素电路11分别与电源电压信号线路111之间的连接线路的总电阻均相差不大，提高了N1个像素电路11中的每一个像素电路11所接收到的电源电压信号的幅值的均一性，改善了包含该显示驱动电路的显示装置的显示效果。
区别于现有技术，在本申请的技术方案中，多个像素电路中，设置有共用同一条第一公共线以接收电源电压信号的N1个像素电路，以减少显示装置中第一公共线的数量，降低走线复杂度和线路间的寄生电容，降低线路间的信号干扰，减少线路所占用空间。此外，由于第一共用数量与像素电路中的薄膜场效应晶体管的特性参数、N1个像素电路中的一像素电路中的电流和N1个像素电路中的相邻像素电路之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系，可通过上述各相关关系确定出第一共用数量，并使得N1大于2且不大于第一共用数量，避免使得连接同一第一公共线的像素电路中，出现连接第一公共线的线路长度相差较大的像素电路，进一步避免因线路长度相差较大而导致线路电阻相差较大，进而导致各像素电路所接收到的电源电压信号不均一的情况发生。本申请基于上述方式，减少了第一公共线的数量且防止因减少第一公共线数量而引发其它负面影响，改善了显示装置的显示效果。
在一实施例中，像素电路11中的薄膜场效应晶体管的特性参数还分别与薄膜场效应晶体管的迁移率、薄膜场效应晶体管的构造电容呈正相关关系。
具体地，由上述相关关系可知，薄膜场效应晶体管的沟道宽长比越大，则相应薄膜场效应晶体管的特性参数越大。薄膜场效应晶体管的迁移率越大，则相应薄膜场效应晶体管的特性参数越大。薄膜场效应晶体管的构造电容越大，则相应薄膜场效应晶体管的特性参数越大。
基于上述方式，可进一步精确确定像素电路11中的薄膜场效应晶体管的特性参数的大小，进而提高第一共用数量的合理性，从而进一步改善显示装置的显示效果。
可选地，薄膜场效应晶体管的特性参数为将第四值除以薄膜场效应晶体管的沟 道的长度得到的商，第四值为薄膜场效应晶体管的迁移率、薄膜场效应晶体管的沟道的宽度和薄膜场效应晶体管的构造电容的乘积。
具体地，像素电路11中通常设置有TFT(Thin Film Transistor，薄膜场效应晶体管)，可获取任意一像素电路11中的TFT的迁移率、沟道的宽度、沟道的长度，并获取TFT中由金属层、绝缘层和有源层所构成电容的电容值，记作构造电容。
基于上述方式，可根据像素电路11中的TFT的各项参数确定TFT的特性参数，以便于可进一步根据该特性参数确定上述第一共用数量，以提高每一个像素电路11所接收到的电源电压信号的幅值的均一性，改善显示装置的显示效果。
在一实施例中，第一共用数量为第一值的四分之一次方，第一值为将第一预设常数除以第二值得到的商，第二值为像素电路中的薄膜场效应晶体管的特性参数与第三值的乘积，第三值为多个像素电路中相邻像素电路之间的电源电压信号线路的电阻与像素电路中的电流的乘积的二次方。
基于上述方式，可结合显示驱动电路中各像素电路11的相关参数，得到第一共用数量。
可选地，第一共用数量可为基于第一计算流程确定的值。
其中，第一计算流程包括：
将迁移率乘以宽度，除以长度，乘以构造电容，得到第一值。
将一像素电路的电流乘以相邻像素电路之间的电源电压信号线路的电阻，得到第二值。
将第二值的平方乘以第一值，得到第三值。
将预设常数除以第三值，得到第四值。
对第四值开四次方，得到第一共用数量。
具体地，上述第一值即为上述薄膜场效应晶体管的特性参数。
或者，上述第一计算流程也可通过第一计算公式进行表示，也即，第一共用数量可为基于第一计算公式确定的值，第一计算公式如下：
Figure PCTCN2022136626-appb-000002
式(1)中，n 1为所述第一共用数量，H 1为第一预设常数，k为所述薄膜场效应晶体管的特性参数，I为所述像素电路中的电流，R 1为所述多个像素电路中相邻像素电路之间的电源电压信号线路的电阻，μ为所述薄膜场效应晶体管的迁移率，W为所述薄膜场效应晶体管的沟道的宽度，L为所述薄膜场效应晶体管的沟道的长度，C为所述薄膜场效应晶体管的构造电容。
基于上述方式，可通过第一计算流程或第一计算公式，合理运用各项参数计算得到较为合理的第一共用数量，用于对该N1个像素电路11中所包括的像素电路11的数量进行限制，改善了显示装置的显示效果。
可选地，在一种示例中，第一预设常数与像素电路11中的电流呈正相关关系，且与相邻像素电路之间的电流波动值呈负相关关系。具体地，相邻像素电路之间的电流波动值为相邻像素电路11之间的电流差值。为确保显示装置中各像素电路所显示亮度的均一性，该电流差值通常需限制为像素电路11中的电流的2％-3％内。
在另一种示例中，第一预设常数具体也可以在第一预设常数范围内，该预设常数范围可根据显示装置的实际运行硬件条件和/或运行环境条件决定，例如，该第一预设常数范围可以是0.08-0.12，也可以是其它范围，此处不作限定。
在一实施例中，多个像素电路11中的N2个像素电路的初始化信号接收端分别与同一条第二公共线连接，以接收同一条第二公共线提供的初始化信号，该N2个像素电路的总数量大于2且不大于第二共用数量，也即，N2大于2且不大于第二共用数量。
其中，第二共用数量与像素电路11中的薄膜场效应晶体管的特性参数、N2个像素电路11中的一像素电路11中的电流和N2个像素电路11中的相邻像素电路11之间的初始化信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系。基于上述正相关关系和负相关关系，可使得第二共用数量总能适应显示驱动电路的实际情况。
具体地，如图1所示，第二像素电路集合30可包括上述N2个像素电路，一显示装置的显示驱动电路中的各像素电路11通常属于同一规格的像素电路11，也即，多个像素电路11中的各像素电路11所对应的薄膜场效应晶体管的特性参数、多个像素电路11中相邻像素电路11之间的初始化信号线路的电阻、一像素电路11的电流均相同或可视作相同，因此，可基于任意一像素电路11所对应的该特性参数和该电阻，以 及任意两个相邻像素电路11之间的初始化信号线路112的电阻，根据上述第第二共用数量的计算方式，确定上述第二共用数量。
基于上述方式，可基于像素电路11及相邻像素电路11之间的相关数据，确定共用同一第二公共线的像素电路11的最大数量(即上述第二共用数量)，并使得该N2个像素电路11中的像素电路11的数量不超过该最大数量，进而可使得N2个像素电路11中每一个像素电路11分别与初始化信号线路112之间的连接线路的总电阻均相差不大，提高了每一个像素电路11所接收到的初始化信号的幅值的均一性，进而使得各像素电路11基于初始化信号进行初始化处理的结果保持一致，改善了包含该显示驱动电路的显示装置的显示效果。
需要说明的是，一个第一像素电路集合20和一个第二像素电路集合30所包含的像素电路11之间，可以完全相同，也可以完全不同，也可以部分相同，也即，连接同一第一公共线的多个像素电路11可以全部连接同一第二公共线，也可以部分连接同一第二公共线，也可均连接不同第二公共线。举例说明，如图1所示，该第一像素电路集合20和该第二像素电路集合30中，仅有两个像素电路11是同时连接同一第一公共线12且连接同一第二公共线13。
可选地，像素电路11中的薄膜场效应晶体管的特性参数还分别与薄膜场效应晶体管的迁移率、薄膜场效应晶体管的构造电容呈正相关关系。
具体地，由上述相关关系可知，薄膜场效应晶体管的沟道宽长比越大，则相应薄膜场效应晶体管的特性参数越大。薄膜场效应晶体管的迁移率越大，则相应薄膜场效应晶体管的特性参数越大。薄膜场效应晶体管的构造电容越大，则相应薄膜场效应晶体管的特性参数越大。
基于上述方式，可进一步精确确定像素电路11中的薄膜场效应晶体管的特性参数的大小，进而提高第一共用数量的合理性，从而进一步改善显示装置的显示效果。
进一步地，薄膜场效应晶体管的特性参数为将第四值除以薄膜场效应晶体管的沟道的长度得到的商，第四值为薄膜场效应晶体管的迁移率、薄膜场效应晶体管的沟道的宽度和薄膜场效应晶体管的构造电容的乘积。
具体地，像素电路11中通常设置有TFT(Thin Film Transistor，薄膜场效应晶体管)，可获取任意一像素电路11中的TFT的迁移率、沟道的宽度、沟道的长度， 并获取TFT中由金属层、绝缘层和有源层所构成电容的电容值，记作构造电容。
基于上述方式，可根据像素电路11中的TFT的各项参数确定TFT的特性参数，以便于可进一步根据该特性参数确定上述第二共用数量，以提高每一个像素电路11所接收到的初始化信号的幅值的均一性，改善显示装置的显示效果。
可选地，第二共用数量为第五值的四分之一次方，第五值为将第二预设常数除以第六值得到的商，第六值为像素电路中的薄膜场效应晶体管的特性参数与第七值的乘积，第七值为多个像素电路中相邻像素电路之间的初始化信号线路的电阻与像素电路中的电流的乘积的二次方。
基于上述方式，可结合显示驱动电路中各像素电路11的相关参数，得到第二共用数量。
进一步地，第二共用数量可为基于第二计算流程确定的值。
其中，第二计算流程包括：
将迁移率乘以宽度，除以长度，乘以构造电容，得到第五值。
将一像素电路的电流乘以相邻像素电路之间的初始化信号线路的电阻，得到第六值。
将第六值的平方乘以第五值，得到第七值。
将预设常数除以第七值，得到第八值。
对第八值开四次方，得到第二共用数量。
具体地，上述第五值即为上述薄膜场效应晶体管的特性参数。
或者，上述第二计算流程也可通过第二计算公式进行表示，也即，第二共用数量可为基于第二计算公式确定的值，第二计算公式如下：
Figure PCTCN2022136626-appb-000003
式(2)中，n 2为所述第二共用数量，H 2为第二预设常数，k为所述薄膜场效应晶体管的特性参数，I为所述像素电路中的电流，R 2为所述多个像素电路中相邻像素电路之间的初始化信号线路的电阻，μ为所述薄膜场效应晶体管的迁移率，W为所述薄膜场效应晶体管的沟道的宽度，L为所述薄膜场效应晶体管的沟道的长度，C为 所述薄膜场效应晶体管的构造电容。
基于上述方式，可通过第二计算流程或第二计算公式，合理运用各项参数计算得到较为合理的第二共用数量，用于对该N2个像素电路11中所包括的像素电路11的数量进行限制，改善了显示装置的显示效果。
更进一步地，在一种示例中，第二预设常数与像素电路11中的电流呈正相关关系，且与相邻像素电路之间的电流波动值呈负相关关系。具体地，相邻像素电路之间的电流波动值为相邻像素电路11之间的电流差值。为确保显示装置中各像素电路所显示亮度的均一性，该电流差值通常需限制为像素电路11中的电流的2％-3％内。
在另一种示例中，第二预设常数具体也可以在第二预设常数范围内，该预设常数范围可根据显示装置的实际运行硬件条件和/或运行环境条件决定，例如，该第二预设常数范围可以是0.08-0.12，也可以是其它范围，此处不作限定。
在一实施例中，如图2所示，图2是本申请像素电路的一实施例的结构示意图，像素电路11包括第一发光控制模块41、驱动模块42、第二发光控制模块43、开关模块44、存储模块45、初始化模块46、数据写入模块47和发光模块48。
数据写入模块47的输入端用于接收数据信号，数据写入模块47的输出端连接第二发光控制模块43的输入端，第一发光控制模块41的输入端用于接收电源电压信号，第一发光控制模块41的输出端连接驱动模块42的输入端，驱动模块42的输出端连接第二发光控制模块43的输入端，第二发光控制模块43的输出端连接发光模块48的输入端，发光模块48的输出端用于接收地电压信号，初始化模块46的输入端用于接收初始化信号，初始化模块46的第一输出端连接存储模块45的输入端，初始化模块46的第二输出端连接发光模块48的输入端，存储模块45的第一输出端连接开关模块44的输入端，存储模块45的第二输出端连接驱动模块42的驱动端，开关模块44的输出端连接驱动模块42的输入端。
可选地，如图2所示，像素电路11还包括薄膜场效应晶体管49。
数据写入模块47的输出端连接薄膜场效应晶体管49的第一端，薄膜场效应晶体管49的第二端连接第二发光控制模块43的输入端，薄膜场效应晶体管49的驱动端用于接收栅极信号，第一发光控制模块41的驱动端和第二发光控制模块43的驱动端均用于接收发光控制信号。
本申请还提出一种显示装置，如图3所示，图3是本申请显示装置的一实施例 的结构示意图，显示装置50包括发光显示模组51和显示驱动电路52，显示驱动电路52可以是前文实施例中的任意一种显示驱动电路。
该显示装置可以是车载显示装置，也可以是电视，还可以是移动终端显示器，更可以是其它类型的显示装置，此处不作限定。
区别于现有技术，在本申请的技术方案中，多个像素电路中，设置有共用同一条第一公共线以接收电源电压信号的N1个像素电路，以减少显示装置中第一公共线的数量，降低走线复杂度和线路间的寄生电容，降低线路间的信号干扰，减少线路所占用空间。此外，由于第一共用数量与像素电路中的薄膜场效应晶体管的特性参数、N1个像素电路中的一像素电路中的电流和N1个像素电路中的相邻像素电路之间的电源电压信号线路的电阻均呈负相关关系，薄膜场效应晶体管的特性参数与薄膜场效应晶体管的沟道宽长比呈正相关关系，可通过上述各相关关系确定出第一共用数量，并使得N1大于2且不大于第一共用数量，避免使得连接同一第一公共线的像素电路中，出现连接第一公共线的线路长度相差较大的像素电路，进一步避免因线路长度相差较大而导致线路电阻相差较大，进而导致各像素电路所接收到的电源电压信号不均一的情况发生。本申请基于上述方式，减少了第一公共线的数量且防止因减少第一公共线数量而引发其它负面影响，改善了显示装置的显示效果。
以上所述仅为本申请的实施方式，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (15)

  1. 一种显示驱动电路，其中，包括多个像素电路；
    每一个所述像素电路的数据端与对应的数据线连接，所述数据线用于提供数据信号；每一个所述像素电路的扫描栅极端与对应的栅极线连接，所述栅极线用于提供栅极信号；所述多个像素电路中的N1个像素电路的电源端均与同一条第一公共线连接，所述第一公共线用于提供电源电压信号，所述N1大于2且不大于第一共用数量；
    所述第一共用数量与所述像素电路中的薄膜场效应晶体管的特性参数、所述N1个像素电路中的一像素电路中的电流和所述N1个像素电路中的相邻像素电路之间的电源电压信号线路的电阻均呈负相关关系，所述薄膜场效应晶体管的特性参数与所述薄膜场效应晶体管的沟道宽长比呈正相关关系。
  2. 根据权利要求1所述的显示驱动电路，其中，所述像素电路中的薄膜场效应晶体管的特性参数还分别与所述薄膜场效应晶体管的迁移率、所述薄膜场效应晶体管的构造电容呈正相关关系。
  3. 根据权利要求2所述的显示驱动电路，其中，所述构造电容为相应所述薄膜场效应晶体管中由金属层、绝缘层和有源层所构成电容的电容值。
  4. 根据权利要求2所述的显示驱动电路，其中，所述薄膜场效应晶体管的特性参数为将第四值除以所述薄膜场效应晶体管的沟道的长度得到的商，所述第四值为所述薄膜场效应晶体管的迁移率、所述薄膜场效应晶体管的沟道的宽度和所述薄膜场效应晶体管的构造电容的乘积。
  5. 根据权利要求1所述的显示驱动电路，其中，所述第一共用数量为第一值的四分之一次方，所述第一值为将第一预设常数除以第二值得到的商，所述第二值为所述像素电路中的薄膜场效应晶体管的特性参数与第三值的乘积，所述第三值为所述多个像素电路中相邻像素电路之间的电源电压信号线路的电阻与所述像素电路中的电流的乘积的二次方。
  6. 根据权利要求5所述的显示驱动电路，其中，所述第一共用数量为基于第一计算公式确定的值；
    其中，所述第一计算公式为：
    Figure PCTCN2022136626-appb-100001
    其中，n 1为所述第一共用数量，H 1为第一预设常数，k为所述薄膜场效应晶体管的特性参数，I为所述像素电路中的电流，R 1为所述多个像素电路中相邻像素电路之间的电源电压信号线路的电阻，μ为所述薄膜场效应晶体管的迁移率，W为所述薄膜场效应晶体管的沟道的宽度，L为所述薄膜场效应晶体管的沟道的长度，C为所述薄膜场效应晶体管的构造电容。
  7. 根据权利要求5所述的显示驱动电路，其中，所述第一预设常数与所述像素电路中的电流呈正相关关系，且与相邻所述像素电路之间的电流波动值呈负相关关系。
  8. 根据权利要求1所述的显示驱动电路，其中，所述多个像素电路中的N2个像素电路的初始化信号接收端均与同一条第二公共线连接，所述第二公共线用于提供初始化信号，所述N2大于2且不大于第二共用数量；
    所述第二共用数量与所述像素电路中的薄膜场效应晶体管的特性参数、所述N2个像素电路中的一像素电路中的电流和所述N2个像素电路中的相邻像素电路之间的初始化信号线路的电阻均呈负相关关系，所述薄膜场效应晶体管的特性参数与所述薄膜场效应晶体管的沟道宽长比呈正相关关系。
  9. 根据权利要求8所述的显示驱动电路，其中，所述像素电路中的薄膜场效应晶体管的特性参数还分别与所述薄膜场效应晶体管的迁移率、所述薄膜场效应晶体管的构造电容呈正相关关系。
  10. 根据权利要求8所述的显示驱动电路，其中，所述第二共用数量为第五值的四分之一次方，所述第五值为将第二预设常数除以第六值得到的商，所述第六值为所述像素电路中的薄膜场效应晶体管的特性参数与第七值的乘积，所述第七值为所述多个像素电路中相邻像素电路之间的初始化信号线路的电阻与所述像素电路中的电流的乘积的二次方。
  11. 根据权利要求10所述的显示驱动电路，其中，所述第二共用数量为基于第二计算流程确定的值；
    其中，所述第二计算公式为：
    Figure PCTCN2022136626-appb-100002
    其中，n 2为所述第二共用数量，H 2为第二预设常数，k为所述薄膜场效应晶体管的特性参数，I为所述像素电路中的电流，R 2为所述多个像素电路中相邻像素电路之间的初始化信号线路的电阻，μ为所述薄膜场效应晶体管的迁移率，W为所述薄膜场效应晶体管的沟道的宽度，L为所述薄膜场效应晶体管的沟道的长度，C为所述薄膜场效应晶体管的构造电容。
  12. 根据权利要求11所述的显示驱动电路，其中，所述第二预设常数与所述像素电路中的电流呈正相关关系，且与相邻所述像素电路之间的电流波动值呈负相关关系。
  13. 根据权利要求1所述的显示驱动电路，其中，所述像素电路包括第一发光控制模块、驱动模块、第二发光控制模块、开关模块、存储模块、初始化模块、数据写入模块和发光模块；
    所述数据写入模块的输入端用于接收数据信号，所述数据写入模块的输出端连接所述第二发光控制模块的输入端，所述第一发光控制模块的输入端用于接收电源电压信号，所述第一发光控制模块的输出端连接所述驱动模块的输入端，所述驱动模块的输出端连接所述第二发光控制模块的输入端，所述第二发光控制模块的输出端连接所述发光模块的输入端，所述发光模块的输出端用于接收地电压信号，所述初始化模块的输入端用于接收初始化信号，所述初始化模块的第一输出端连接所述存储模块的输入端，所述初始化模块的第二输出端连接所述发光模块的输入端，所述存储模块的第一输出端连接所述开关模块的输入端，所述存储模块的第二输出端连接所述驱动模块的驱动端，所述开关模块的输出端连接所述驱动模块的输入端。
  14. 根据权利要求13所述的显示驱动电路，其中，所述像素电路还包括薄膜场效应晶体管；
    所述数据写入模块的输出端连接所述薄膜场效应晶体管的第一端，所述薄膜场效应晶体管的第二端连接所述第二发光控制模块的输入端，所述薄膜场效应晶体管的驱动端用于接收栅极信号，所述第一发光控制模块的驱动端和所述第二发光控制模块的 驱动端均用于接收发光控制信号。
  15. 一种显示装置，其中，包括发光显示模组和如权利要求1所述的显示驱动电路。
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