WO2023276333A1 - Composant électronique composite - Google Patents

Composant électronique composite Download PDF

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Publication number
WO2023276333A1
WO2023276333A1 PCT/JP2022/013415 JP2022013415W WO2023276333A1 WO 2023276333 A1 WO2023276333 A1 WO 2023276333A1 JP 2022013415 W JP2022013415 W JP 2022013415W WO 2023276333 A1 WO2023276333 A1 WO 2023276333A1
Authority
WO
WIPO (PCT)
Prior art keywords
coil
patterns
electronic component
insulating layer
coil patterns
Prior art date
Application number
PCT/JP2022/013415
Other languages
English (en)
Japanese (ja)
Inventor
敏之 阿部
和俊 露谷
武史 奥村
啓太 古橋
満 三浦
祐樹 橋本
Original Assignee
Tdk株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tdk株式会社 filed Critical Tdk株式会社
Publication of WO2023276333A1 publication Critical patent/WO2023276333A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present invention relates to a composite electronic component, and more particularly to a composite electronic component comprising an insulating layer in which an electronic component is embedded and a coil pattern.
  • Patent Document 1 discloses a composite electronic component comprising an insulating layer in which an electronic component is embedded and a coil pattern.
  • FIG. 3 of Patent Document 1 discloses a configuration in which two coil patterns are laminated on an insulating layer in which electronic components are embedded.
  • FIG. 7 of Patent Document 1 discloses a configuration in which two coil patterns are arranged side by side on an insulating layer in which electronic components are embedded.
  • a composite electronic component according to the present invention comprises an insulating layer, first and second coil patterns provided on one surface of the insulating layer and magnetically coupled to each other, and magnetically coupled patterns provided on the other surface of the insulating layer. It is characterized by comprising third and fourth coil patterns, and an electronic component embedded in an insulating layer and connected to at least the first and second coil patterns.
  • the coil patterns are arranged on both sides of the insulating layer in which the electronic components are embedded, sufficient inductance can be secured. Moreover, since the symmetry in the stacking direction is enhanced, the occurrence of warping is also suppressed.
  • the composite electronic component according to the present invention further comprises first, second, third and fourth signal terminals and a ground terminal, the electronic component being connected between the first and second signal terminals and the ground terminal.
  • An ESD protection component one ends of the first and second coil patterns are connected to the first and second signal terminals, respectively, and one ends of the third and fourth coil patterns are connected to the third and fourth signal terminals, respectively.
  • the other ends of the first and second coil patterns may be connected to the other ends of the third and fourth coil patterns, respectively. According to this, it becomes possible to provide a common mode filter with an ESD protection function.
  • the first coil pattern and the second coil pattern overlap each other
  • the third coil pattern and the fourth coil pattern overlap each other
  • the first and second coil patterns have a diameter or number of turns. It doesn't matter if it's different. This facilitates design changes for characteristic adjustment.
  • the composite electronic component according to the present invention includes fifth and sixth coil patterns provided on one surface side of the insulating layer and magnetically coupled to each other, and seventh and sixth coil patterns provided on the other surface side of the insulating layer and magnetically coupled to each other.
  • 8 coil patterns and fifth, sixth, seventh and eighth signal terminals, the ESD protection component is further connected between the fifth and sixth signal terminals and the ground terminal; and sixth coil patterns are connected to the fifth and sixth signal terminals, respectively; one ends of the seventh and eighth coil patterns are connected to the seventh and eighth signal terminals, respectively; and the other ends of the sixth coil patterns may be connected to the other ends of the seventh and eighth coil patterns, respectively. According to this, it is possible to provide an array product with two built-in common mode filters.
  • the first coil pattern and the fifth coil pattern are formed on the same wiring layer and are symmetrical in plan view
  • the second coil pattern and the sixth coil pattern are formed on the same wiring layer. and is symmetrical in plan view
  • the third coil pattern and the seventh coil pattern are formed in the same wiring layer, and are symmetrical in plan view
  • the fourth coil pattern and the eighth coil The patterns may be formed in the same wiring layer and may be symmetrical in plan view. According to this, the characteristics of the two common mode filters can be matched, and the pattern design can be facilitated.
  • FIG. 1 is a schematic perspective view showing the appearance of a composite electronic component 1 according to one embodiment of the invention.
  • 2(a) is a schematic cross-sectional view taken along line AA shown in FIG. 1
  • FIG. 2(b) is a schematic cross-sectional view taken along line BB shown in FIG.
  • FIG. 3 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L1.
  • FIG. 4 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L2.
  • FIG. 5 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L3.
  • FIG. 6 is a schematic plan view showing the shape of a conductor pattern provided on the conductor layer LESD.
  • FIG. 7 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L4.
  • FIG. 8 is a schematic plan view showing the shape of the conductor pattern provided on the conductor layer L5.
  • FIG. 9 is an equivalent circuit diagram of the composite electronic component 1.
  • FIG. 1 is a schematic perspective view showing the appearance of a composite electronic component 1 according to one embodiment of the present invention.
  • a composite electronic component 1 according to this embodiment is a surface-mounted chip component, and as shown in FIG. and
  • FIG. 2(a) is a schematic cross-sectional view taken along line AA shown in FIG. 1
  • FIG. 2(b) is a schematic cross-sectional view taken along line BB shown in FIG.
  • the element body 10 has a structure in which insulating layers 11 to 14 made of resin or the like are laminated. Among them, the insulating layer 14 is provided on one surface 11a side of the insulating layer 11, and the insulating layers 12 and 13 are provided on the other surface 11b side of the insulating layer 11. As shown in FIG. A conductor layer L4 is formed on one surface 11a of the insulating layer 11 . Conductive layer L4 is covered with insulating layer 14 . A conductor layer L5 is formed on the surface of the insulating layer 14 . Conductive layer L5 is covered with solder resist 32 . A conductor layer L3 is formed on the other surface 11b of the insulating layer 11 .
  • Conductive layer L3 is covered with insulating layer 12 .
  • a conductor layer L2 is formed on the surface of the insulating layer 12 .
  • Conductive layer L2 is covered with insulating layer 13 .
  • a conductor layer L ⁇ b>1 is formed on the surface of the insulating layer 13 .
  • Conductive layer L1 is covered with solder resist 31 .
  • An ESD protection component 2 is embedded in the insulating layer 11 . Since the ESD protection component 2 is composed of a semiconductor substrate, its coefficient of thermal expansion is significantly different from that of the insulating layers 11-14. However, in the present embodiment, the ESD protection component 2 is embedded substantially in the central portion in the stacking direction, and the insulating layers 12 to 14 are provided on both sides thereof. Warpage of the entire composite electronic component 1 caused by this is less likely to occur. The ESD protection component 2 is embedded in the insulating layer 11 in a face-down manner, and terminal electrodes of the ESD protection component 2 are connected to conductor patterns provided on the conductor layer LESD.
  • 3 to 8 are schematic plan views showing shapes of conductor patterns provided on conductor layers L1, L2, L3, LESD, L4 and L5, respectively.
  • conductor patterns 41 to 49 are provided on the conductor layer L1.
  • the conductor patterns 41-49 are connected to the signal terminals 21-28 and the ground terminal 29, respectively.
  • the conductor layer L2 is provided with coil patterns C3 and C7 and conductor patterns 51 to 59, 53a and 57a.
  • the conductor patterns 51-59 are connected to the conductor patterns 41-49 through vias provided in the insulating layer 13, respectively.
  • the outer peripheral end and the inner peripheral end of the coil pattern C3 are connected to the conductor patterns 53, 53a, respectively.
  • the outer peripheral end and the inner peripheral end of the coil pattern C7 are connected to the conductor patterns 57, 57a, respectively.
  • the conductor layer L3 is provided with coil patterns C4 and C8 and conductor patterns 61 to 69, 64a and 68a.
  • the conductor patterns 61 to 69 are connected to the conductor patterns 51, 52, 53a, 54 to 56, 57a, 58, 59 through vias provided in the insulating layer 12, respectively.
  • the outer peripheral end and the inner peripheral end of the coil pattern C4 are connected to the conductor patterns 64, 64a, respectively.
  • the outer peripheral end and the inner peripheral end of the coil pattern C8 are connected to the conductor patterns 68, 68a, respectively.
  • Each of the coil patterns C3, C4, C7, and C8 has a configuration in which a conductor pattern is wound for about 3 turns.
  • the coil pattern C3 and the coil pattern C4 are overlapped in the stacking direction, and the pattern shapes are substantially the same except for the positions of the outer peripheral end and the inner peripheral end.
  • the coil pattern C7 and the coil pattern C8 overlap in the stacking direction, and their pattern shapes are substantially the same except for the positions of the outer peripheral end and the inner peripheral end.
  • the pattern shapes of the coil pattern C3 and the coil pattern C7 are symmetrical in plan view
  • the pattern shapes of the coil pattern C4 and the coil pattern C8 are symmetrical in plan view.
  • conductor patterns 71 to 78 and terminal electrodes 81, 82, 85, 86, 89 of the ESD protection component 2 are provided on the conductor layer LESD.
  • the conductor patterns 71-78 and the terminal electrode 89 are connected to the conductor patterns 61-63, 64a, 65-67, 68a and 69 through vias provided in the insulating layer 11, respectively.
  • Terminal electrodes 81 , 82 , 85 and 86 are connected to conductor patterns 61 , 62 , 65 and 66 through vias provided in insulating layer 11 .
  • the conductor layer L4 is provided with coil patterns C1 and C5 and conductor patterns 91-98.
  • the conductor patterns 91-98 are connected to the conductor patterns 71-78 through vias provided in the insulating layer 11, respectively.
  • the outer peripheral end and the inner peripheral end of the coil pattern C1 are connected to the conductor patterns 91 and 93, respectively.
  • the outer and inner ends of the coil pattern C5 are connected to conductor patterns 95 and 97, respectively.
  • coil patterns C2 and C6 and conductor patterns 102, 104, 106 and 108 are provided on the conductor layer L5.
  • Conductive patterns 102 , 104 , 106 and 108 are connected to conductive patterns 92 , 94 , 96 and 98 through vias provided in insulating layer 14 .
  • the outer peripheral end and the inner peripheral end of the coil pattern C2 are connected to the conductor patterns 102 and 104, respectively.
  • the outer and inner peripheral ends of the coil pattern C6 are connected to conductor patterns 106 and 108, respectively.
  • Each of the coil patterns C1, C2, C5, and C6 has a configuration in which a conductor pattern is wound about four turns.
  • the coil pattern C1 and the coil pattern C2 overlap in the stacking direction, and their pattern shapes are substantially the same except for the positions of the outer peripheral end and the inner peripheral end.
  • the coil pattern C5 and the coil pattern C6 are overlapped in the stacking direction, and the pattern shapes are substantially the same except for the positions of the outer peripheral end and the inner peripheral end.
  • the pattern shapes of the coil pattern C1 and the coil pattern C5 are symmetrical in plan view
  • the pattern shapes of the coil pattern C2 and the coil pattern C6 are symmetrical in plan view.
  • FIG. 9 is an equivalent circuit diagram of the composite electronic component 1 according to this embodiment.
  • coil patterns C1 and C3 are connected in series between signal terminals 21 and 23, and coil patterns C2 and C4 are connected in series between signal terminals 22 and 24.
  • the coil patterns C5 and C7 are connected in series between the signal terminals 25 and 27, and the coil patterns C6 and C8 are connected in series between the signal terminals 26 and .
  • Coil patterns C1 and C2 are magnetically coupled
  • coil patterns C3 and C4 are magnetically coupled
  • coil patterns C5 and C6 are magnetically coupled
  • coil patterns C7 and C8 are magnetically coupled.
  • the composite electronic component 1 constitutes an array of common mode filters with an ESD protection function.
  • Coil patterns C1, C2, C5, and C6 are arranged on one surface 11a of the insulating layer 11 in which the ESD protection component 2 is embedded, and coil patterns C3, C4, C7, and C8 are arranged on the other surface 11b.
  • the inductance of each common mode filter can be sufficiently increased, and the warpage of the composite electronic component 1 caused by the difference in thermal expansion coefficient between the insulating layers 11 to 14 and the ESD protection component 2 can be reduced. It becomes possible.
  • the coil patterns C1, C2, C5, C6 and the coil patterns C3, C4, C7, C8 are sufficiently separated in the stacking direction, and the pattern shapes of both, specifically, the diameter and the number of turns, are different from each other. Therefore, the magnetic coupling between them is suppressed. Therefore, even if the pattern shapes of the coil patterns C1, C2, C5, and C6 are changed for the purpose of adjusting the characteristics, the characteristics of the coil patterns C3, C4, C7, and C8 hardly change, so design changes are easy. becomes. Moreover, since the two coil patterns located on the same conductor layer are symmetrical in plan view, there is almost no characteristic difference between the two common mode filters, and pattern design is easy.
  • the ESD protection component 2 is embedded in the insulating layer 11, but the electronic component embedded in the insulating layer 11 is not limited to this.
  • the composite electronic component 1 according to the above embodiment is an array product containing two common mode filters, the present invention is not limited to this.
  • ESD protection component 10 base body 11-14 insulating layer 11a one surface 11b of insulating layer other surface 21-28 of insulating layer signal terminal 29 ground terminals 31, 32 solder resist 41-49, 51-57 , 53a, 57a, 61 to 69, 64a, 68a, 71 to 78, 91 to 98, 102, 104, 106, 108 conductor patterns 81, 82, 85, 86, 89 terminal electrodes C1 to C8 coil patterns L1 to L5, LESD conductor layer

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

Le problème décrit par la présente invention consiste à assurer une inductance suffisante et supprimer l'apparition de gauchissement dans un composant électronique composite comprenant une couche d'isolation dans laquelle un composant électronique est intégré. La solution selon l'invention porte sur un composant électronique composite 1 qui comprend : une couche d'isolation 11 ; des motifs de bobine C1, C2 qui sont disposés sur le côté d'une surface 11a de la couche d'isolation 11b et qui sont couplés magnétiquement l'un à l'autre ; des motifs de bobine C3, C4 qui sont disposés sur le côté d'une autre surface 11b de la couche d'isolation 11 et qui sont couplés magnétiquement l'un à l'autre ; et un composant de protection contre les décharges électrostatiques 2 qui est intégré dans la couche d'isolation 11 et qui est connecté au moins aux motifs de bobine C1, C2. Ceci garantit une inductance suffisante parce que les motifs de bobine sont disposés des deux côtés de la couche d'isolation 11 dans laquelle le composant de protection contre les décharges électrostatiques 2 est incorporé. De plus, l'apparition d'un gauchissement est supprimée du fait que la symétrie dans la direction de stratification est améliorée.
PCT/JP2022/013415 2021-06-30 2022-03-23 Composant électronique composite WO2023276333A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021109156A JP2023006519A (ja) 2021-06-30 2021-06-30 複合電子部品
JP2021-109156 2021-06-30

Publications (1)

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WO2023276333A1 true WO2023276333A1 (fr) 2023-01-05

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WO (1) WO2023276333A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024112364A (ja) * 2023-02-08 2024-08-21 Tdk株式会社 複合電子部品
JP2024116689A (ja) * 2023-02-16 2024-08-28 Tdk株式会社 複合電子部品

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066848A (ja) * 2004-07-26 2006-03-09 Mitsubishi Materials Corp 複合コモンモードチョークコイル
JP2011249876A (ja) * 2010-05-21 2011-12-08 Tdk Corp コモンモードノイズフィルタ
JP2013012702A (ja) * 2011-05-31 2013-01-17 Murata Mfg Co Ltd コモンモードチョークコイルおよび高周波部品
WO2014115434A1 (fr) * 2013-01-22 2014-07-31 株式会社村田製作所 Composant composite lc
JP2015043439A (ja) * 2011-11-04 2015-03-05 株式会社村田製作所 コモンモードチョークコイル及び高周波電子機器
JP2018170315A (ja) * 2017-03-29 2018-11-01 Tdk株式会社 コイル部品

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066848A (ja) * 2004-07-26 2006-03-09 Mitsubishi Materials Corp 複合コモンモードチョークコイル
JP2011249876A (ja) * 2010-05-21 2011-12-08 Tdk Corp コモンモードノイズフィルタ
JP2013012702A (ja) * 2011-05-31 2013-01-17 Murata Mfg Co Ltd コモンモードチョークコイルおよび高周波部品
JP2015043439A (ja) * 2011-11-04 2015-03-05 株式会社村田製作所 コモンモードチョークコイル及び高周波電子機器
WO2014115434A1 (fr) * 2013-01-22 2014-07-31 株式会社村田製作所 Composant composite lc
JP2018170315A (ja) * 2017-03-29 2018-11-01 Tdk株式会社 コイル部品

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